公开(公告)号：US20070059917A1

公开(公告)日：2007-03-15

申请号：US11520729

申请日：2006-09-14

申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Ki-Hwan Kim ,  Sung-Yong Kim

发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Ki-Hwan Kim ,  Sung-Yong Kim

IPC分类号： H01L21/44 ,  H01L21/4763

CPC分类号： H05K3/4664 ,  H05K3/0023 ,  H05K3/1216 ,  H05K3/1258 ,  H05K3/207 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/465 ,  H05K2201/09536 ,  H05K2203/0143 ,  H05K2203/0568

摘要： A manufacturing method for a printed circuit board having a fine pattern is disclosed, comprising: providing a carrier plate; coating the carrier plate with a photosensitive material; forming a first circuit pattern on the photosensitive material; forming a first circuit layer by drying a conductive paste printed into a space between the photosensitive materials where the first circuit pattern is formed; depositing an insulation layer on the first circuit layer; processing via holes penetrating the insulation layer; coating the insulation layer with the photosensitive material and then forming a second circuit pattern in the photosensitive material; forming a second circuit layer and filling the via holes by drying the conductive paste printed into a space between the photosensitive materials, where the second circuit pattern is formed, and the via holes; and removing the carrier plate.

摘要翻译： 公开了一种具有精细图案的印刷电路板的制造方法，包括：提供载板; 用感光材料涂覆载体板; 在感光材料上形成第一电路图案; 通过干燥印刷在形成有第一电路图案的感光材料之间的空间中的导电浆料形成第一电路层; 在第一电路层上沉积绝缘层; 通过贯穿绝缘层的孔加工; 用感光材料涂覆绝缘层，然后在感光材料中形成第二电路图案; 形成第二电路层，并通过干燥印刷在其中形成第二电路图案的感光材料之间的空间中的导电浆料和通孔来填充通孔; 并移除载体板。

公开(公告)号：US20120088334A1

公开(公告)日：2012-04-12

申请号：US13007444

申请日：2011-01-14

申请人： Mi Sun HWANG ,  Keung Jin SOHN ,  Eung Suek LEE ,  Myung Sam KANG

发明人： Mi Sun HWANG ,  Keung Jin SOHN ,  Eung Suek LEE ,  Myung Sam KANG

IPC分类号： H01L21/60

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/16237 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/81192 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/15311 ,  H05K3/06 ,  H05K3/4038 ,  H05K3/4647 ,  H05K2203/0384 ,  H01L2924/00015 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Disclosed herein is a method for manufacturing a semiconductor package which uses a base member 120 in which a first metal layer 113, a barrier layer 115, and a second metal layer 117 are stacked on both surface thereof in sequence based on an adhesive member 111 to simultaneously manufacture two printed circuit boards through a single sheet process, thereby making it possible to improve manufacturing efficiency; electrically connects a semiconductor chip 300 to a printed circuit board through a solder bump 250, thereby making it possible to implement a high-density package substrate; and forms a metal post 140 instead of a through hole to required in an interlayer circuit connection, thereby making it possible to reduce costs required in the processing/plating of the through hole.

摘要翻译： 本发明公开了一种半导体封装件的制造方法，该半导体封装件使用基片120，其中第一金属层113，阻挡层115和第二金属层117依次以两个表面层叠在第一金属层113，阻挡层115和第二金属层117上， 同时通过单片工艺制造两个印刷电路板，从而可以提高制造效率; 通过焊料凸块250将半导体芯片300电连接到印刷电路板，从而可以实现高密度封装基板; 并且形成金属柱140而不是层间电路连接所需的通孔，从而可以降低通孔的加工/电镀所需的成本。

公开(公告)号：US07973248B2

公开(公告)日：2011-07-05

申请号：US12219381

申请日：2008-07-21

申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Youn-Soo Seo ,  Hee-Bum Shin ,  Yoong Oh ,  Byung-Bae Seo ,  Tae-Kyoung Kim ,  Dong-Jin Park

发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Youn-Soo Seo ,  Hee-Bum Shin ,  Yoong Oh ,  Byung-Bae Seo ,  Tae-Kyoung Kim ,  Dong-Jin Park

IPC分类号： H01R12/04 ,  H05K1/11

CPC分类号： H05K3/462 ,  H01R12/523 ,  H05K3/4069 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/0353 ,  Y10T29/49155

摘要： A printed circuit board using paste bumps and manufacturing method thereof are disclosed. The method of manufacturing a printed circuit board using paste bumps, includes: (a) perforating a core board to form at least one via hole, (b) filling the at least one via hole by fill-plating and forming a circuit pattern on at least one surface of the core board, (c) stacking a paste bump board on at least one surface of the core board, and (d) forming an outer layer circuit on a surface of the paste bump board, a structurally stable all-layer IVH structure can be implemented due to increased strength in the BVH's of the plated core boards, the manufacture time can be reduced due to parallel processes and collective stacking, implementing micro circuits can be made easy due to the copper foils of the paste bump boards stacked on the outermost layers, the manufacture costs can be reduced as certain plating and drilling processes may be omitted, the interlayer connection area is increased between circuit patterns for improved connection reliability, and dimple coverage can be obtained.

摘要翻译： 公开了一种使用糊状凸块的印刷电路板及其制造方法。 使用糊状凸块制造印刷电路板的方法包括：（a）穿孔芯板以形成至少一个通孔，（b）通过填充电镀填充至少一个通孔并在其上形成电路图案 芯板的至少一个表面，（c）在芯板的至少一个表面上堆叠焊料凸块，以及（d）在焊料凸块的表面上形成外层电路，结构稳定的全层 由于镀层芯板的BVH的强度增加，可以实现IVH结构，由于并行处理和集体堆叠，制造时间可以减少，由于粘贴凸块的铜箔堆叠而实现微电路变得容易 在最外层，可以减少制造成本，因为可以省略某些电镀和钻孔工艺，在电路图案之间增加层间连接面积以提高连接可靠性，并且可以获得凹坑覆盖 d。

公开(公告)号：US20100230146A1

公开(公告)日：2010-09-16

申请号：US12544959

申请日：2009-08-20

申请人： Eung Suek LEE ,  Je Gwang Yoo ,  Chang Sup Ryu ,  Jun Oh Hwang ,  Jee Soo Mok

发明人： Eung Suek LEE ,  Je Gwang Yoo ,  Chang Sup Ryu ,  Jun Oh Hwang ,  Jee Soo Mok

IPC分类号： H05K1/09 ,  C25D5/02

CPC分类号： H05K3/108 ,  B82Y10/00 ,  C23C18/38 ,  C25D5/022 ,  C25D5/10 ,  C25D9/08 ,  H05K3/249 ,  H05K2201/026 ,  H05K2201/0347 ,  H05K2203/135

摘要： Disclosed herein is a circuit layer including CNTs including an electroless copper plating layer formed on an insulating layer, and a CNT layer deposited on the electroless copper plating layer, thus the circuit layer has excellent electrical properties.

摘要翻译： 本发明公开了一种电路层，其包括在绝缘层上形成的化学镀铜层的CNT和沉积在化学镀铜层上的CNT层，因此电路层具有优异的电性能。

公开(公告)号：US20090229875A1

公开(公告)日：2009-09-17

申请号：US12453741

申请日：2009-05-20

申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Ki-Hwan Kim ,  Sung-Yong Kim

发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Ki-Hwan Kim ,  Sung-Yong Kim

IPC分类号： H05K1/11

CPC分类号： H05K3/4664 ,  H05K3/0023 ,  H05K3/1216 ,  H05K3/1258 ,  H05K3/207 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/465 ,  H05K2201/09536 ,  H05K2203/0143 ,  H05K2203/0568

摘要： A printed circuit board having a fine pattern and related manufacturing method that includes providing a carrier plate; coating the carrier plate with a photosensitive material; forming a first circuit pattern on the photosensitive material; forming a first circuit layer by drying a conductive paste printed into a space between the photosensitive materials where the first circuit pattern is formed; depositing an insulation layer on the first circuit layer; processing via holes penetrating the insulation layer; coating the insulation layer with the photosensitive material and then forming a second circuit pattern in the photosensitive material; forming a second circuit layer and filling the via holes by drying the conductive paste printed into a space between the photosensitive materials, where the second circuit pattern is formed, and the via holes; and removing the carrier plate.

摘要翻译： 一种具有精细图案和相关制造方法的印刷电路板，包括提供载板; 用感光材料涂覆载体板; 在感光材料上形成第一电路图案; 通过干燥印刷在形成有第一电路图案的感光材料之间的空间中的导电浆料形成第一电路层; 在第一电路层上沉积绝缘层; 通过贯穿绝缘层的孔加工; 用感光材料涂覆绝缘层，然后在感光材料中形成第二电路图案; 形成第二电路层，并通过干燥印刷在其中形成第二电路图案的感光材料之间的空间中的导电浆料和通孔来填充通孔; 并移除载体板。

公开(公告)号：US20090114425A1

公开(公告)日：2009-05-07

申请号：US12178285

申请日：2008-07-23

申请人： Eung-Suek LEE ,  Seung-Hyun BAIK ,  Young-Jin KIM ,  Young-Seok OH ,  Jae-Boong CHOI ,  Dae-Woo SUH ,  Je-Gwang YOO ,  Chang-Sup RYU ,  Jun-Oh HWANG ,  Jee-Soo MOK

发明人： Eung-Suek LEE ,  Seung-Hyun BAIK ,  Young-Jin KIM ,  Young-Seok OH ,  Jae-Boong CHOI ,  Dae-Woo SUH ,  Je-Gwang YOO ,  Chang-Sup RYU ,  Jun-Oh HWANG ,  Jee-Soo MOK

IPC分类号： H05K1/00 ,  H01B1/14

CPC分类号： H05K1/095 ,  B82Y10/00 ,  H01B1/24 ,  H05K3/4069 ,  H05K3/4614 ,  H05K2201/026 ,  H05K2203/1189

摘要： A conductive paste and a printed circuit board using the conductive paste are disclosed. The conductive paste including conductive particles and carbon nanotubes according to the invention, can improve an electrical conductivity of the conductive paste.

摘要翻译： 公开了一种导电浆料和使用导电浆料的印刷电路板。 包含根据本发明的导电颗粒和碳纳米管的导电糊可以提高导电浆的导电性。

公开(公告)号：US20090083975A1

公开(公告)日：2009-04-02

申请号：US12078949

申请日：2008-04-08

申请人： Eung-Suek Lee ,  Young-Jin Kim ,  Seung-Hyun Baik ,  Jae-Boong Cho ,  Young-Seok Oh ,  Dae-Woo Suh ,  Je-Gwang Yoo ,  Jee-Soo Mok ,  Chang-Sup Ryu

发明人： Eung-Suek Lee ,  Young-Jin Kim ,  Seung-Hyun Baik ,  Jae-Boong Cho ,  Young-Seok Oh ,  Dae-Woo Suh ,  Je-Gwang Yoo ,  Jee-Soo Mok ,  Chang-Sup Ryu

IPC分类号： H05K3/36

CPC分类号： H05K3/4069 ,  B82Y10/00 ,  H05K1/095 ,  H05K3/4614 ,  H05K3/4647 ,  H05K2201/026 ,  H05K2201/0355 ,  H05K2201/10378 ,  H05K2203/1461 ,  Y10T29/49126

摘要： A method of interconnecting layers of a printed circuit board is disclosed. The method includes: forming at least one bump on a first metal layer using a conductive paste containing carbon nanotubes, stacking an insulation layer on the first metal layer such that the bumps penetrate the insulation layer, and stacking a second metal layer on the insulation layer such that the second metal layer is electrically connected with the first metal layer by the bump.

摘要翻译： 公开了一种互连印刷电路板的层的方法。 该方法包括：使用含有碳纳米管的导电浆料在第一金属层上形成至少一个凸块，在第一金属层上堆叠绝缘层，使凸块穿透绝缘层，并将第二金属层堆叠在绝缘层上 使得第二金属层通过凸块与第一金属层电连接。

公开(公告)号：US20080052902A1

公开(公告)日：2008-03-06

申请号：US11976617

申请日：2007-10-25

申请人： Keun-Ho Kim ,  Dek-Gin Yang ,  Jong-Guk Kim ,  Il-Kyoon Jeon ,  Eung-Suek Lee

发明人： Keun-Ho Kim ,  Dek-Gin Yang ,  Jong-Guk Kim ,  Il-Kyoon Jeon ,  Eung-Suek Lee

IPC分类号： H05K3/00

CPC分类号： H05K3/4641 ,  H05K1/0206 ,  H05K1/0207 ,  H05K1/056 ,  H05K3/4069 ,  H05K3/4608 ,  H05K3/4614 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2203/1189 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A printed circuit board and manufacturing method thereof. A printed circuit board has an insulation substrate, which includes an insulation layer, a circuit pattern formed on one side of the insulation layer, and an interlayer passage joined to the insulation layer and configured to electrically connect with the circuit pattern, and a heat-release layer, which is stacked on the other side of the insulation layer to be stacked on the insulation substrate, can provide a high heat-releasing effect and high bending strength, by means of inner layers or ground layers formed by the heat-release layers.

摘要翻译： 印刷电路板及其制造方法。 印刷电路板具有绝缘基板，该绝缘基板包括绝缘层，形成在绝缘层的一侧的电路图案，以及与该绝缘层接合并被构造为与电路图形电连接的层间通道， 层叠在绝缘层的另一方的层叠在绝缘基板上的剥离层能够通过由散热层形成的内层或接地层提供高散热效果和高弯曲强度 。

公开(公告)号：US08415200B2

公开(公告)日：2013-04-09

申请号：US13007444

申请日：2011-01-14

申请人： Mi Sun Hwang ,  Keung Jin Sohn ,  Eung Suek Lee ,  Myung Sam Kang

发明人： Mi Sun Hwang ,  Keung Jin Sohn ,  Eung Suek Lee ,  Myung Sam Kang

IPC分类号： H01L23/48

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/16237 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/81192 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/15311 ,  H05K3/06 ,  H05K3/4038 ,  H05K3/4647 ,  H05K2203/0384 ,  H01L2924/00015 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Disclosed herein is a method for manufacturing a semiconductor package which uses a base member 120 in which a first metal layer 113, a barrier layer 115, and a second metal layer 117 are stacked on both surface thereof in sequence based on an adhesive member 111 to simultaneously manufacture two printed circuit boards through a single sheet process, thereby making it possible to improve manufacturing efficiency; electrically connects a semiconductor chip 300 to a printed circuit board through a solder bump 250, thereby making it possible to implement a high-density package substrate; and forms a metal post 140 instead of a through hole to required in an interlayer circuit connection, thereby making it possible to reduce costs required in the processing/plating of the through hole.

摘要翻译： 本发明公开了一种半导体封装件的制造方法，该半导体封装件使用基片120，其中第一金属层113，阻挡层115和第二金属层117依次以两个表面层叠在第一金属层113，阻挡层115和第二金属层117上， 同时通过单片工艺制造两个印刷电路板，从而可以提高制造效率; 通过焊料凸块250将半导体芯片300电连接到印刷电路板，从而可以实现高密度封装基板; 并且形成金属柱140而不是层间电路连接所需的通孔，从而可以降低通孔的加工/电镀所需的成本。

公开(公告)号：US08166647B2

公开(公告)日：2012-05-01

申请号：US12352090

申请日：2009-01-12

申请人： Jun-Oh Hwang ,  Jee-Soo Mok ,  Jun-Heyoung Park ,  Kyung-Ah Lee ,  Eung-Suek Lee

发明人： Jun-Oh Hwang ,  Jee-Soo Mok ,  Jun-Heyoung Park ,  Kyung-Ah Lee ,  Eung-Suek Lee

IPC分类号： H05K3/02

CPC分类号： B82Y10/00 ,  H05K1/0206 ,  H05K1/056 ,  H05K1/183 ,  H05K3/005 ,  H05K3/4069 ,  H05K3/4608 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/026 ,  H05K2201/0323 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2203/0108 ,  H05K2203/1131 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165

摘要： A printed circuit board and a method for manufacturing the printed circuit board are disclosed. The method can include; providing an insulated layer, in which a first metal layer is formed on one side of the insulated layer; forming a groove on the insulated layer; forming a metallic substance on an inner side of the groove and on another side of the insulated layer; and forming a first circuit pattern on at least one of one side of the insulated layer and the metallic substance formed on the groove by removing a portion of the first metal layer. The present invention provides the printed circuit board having a high efficiency of heat emission by disposing a heat sink in direct contact with a board and the method of manufacturing the printed circuit board.

摘要翻译： 公开了印刷电路板和印刷电路板的制造方法。 该方法可以包括 提供绝缘层，其中第一金属层形成在绝缘层的一侧上; 在绝缘层上形成凹槽; 在所述槽的内侧和所述绝缘层的另一侧上形成金属物质; 以及通过去除所述第一金属层的一部分，在所述绝缘层的一侧中的至少一个和形成在所述凹槽上的所述金属物质之间形成第一电路图案。 本发明通过设置与基板直接接触的散热器和印刷电路板的制造方法来提供具有高发热效率的印刷电路板。