Method and apparatus for transmitting and receiving IP-based two-way advertisement
    11.
    发明申请
    Method and apparatus for transmitting and receiving IP-based two-way advertisement 审中-公开
    用于发送和接收基于IP的双向广告的方法和装置

    公开(公告)号:US20090106106A1

    公开(公告)日:2009-04-23

    申请号:US12217956

    申请日:2008-07-10

    IPC分类号: G06Q30/00

    摘要: Provided is a method of transmitting and receiving a two-way advertisement. The method is performed separately from a broadcasting being received by a client. When the client calls for the two-way advertisement, an Internet Protocol (IP)-based two-way advertisement receiving apparatus of the client requests and receives the two-way advertisement from an IP-based two-way advertisement server; stores the two-way advertisement in an advertisement storage unit, wherein the two-way advertisement is transmitted from the IP-based two-way advertisement server which refers to an advertisement area code included in the two-way advertisement and transmits the two-way advertisement by using a multicast group address corresponding to the advertisement area code; and displays the two-way advertisement on a screen of a client using terminal of the client. In the case where the client receives a summary advertisement and desires to obtain more detailed information, the client can receive a detailed advertisement and order a product via the screen.

    摘要翻译: 提供了一种发送和接收双向广告的方法。 该方法与客户端正在接收的广播分开执行。 当客户端要求双向广告时,客户端基于互联网协议(IP)的双向广告接收设备从基于IP的双向广告服务器请求并接收双向广告; 在广告存储单元中存储双向广告,其中从基于IP的双向广告服务器发送双向广告,该广告服务器参考包括在双向广告中的广告区域代码,并且传送双向广告 通过使用与广告区域代码相对应的多播组地址进行广告; 并使用客户端的终端在客户端的屏幕上显示双向广告。 在客户端接收到摘要广告并希望获得更详细信息的情况下,客户端可以通过屏幕接收详细的广告并订购产品。

    Synchronous semiconductor memory device
    12.
    发明授权
    Synchronous semiconductor memory device 有权
    同步半导体存储器件

    公开(公告)号:US07499370B2

    公开(公告)日:2009-03-03

    申请号:US11850754

    申请日:2007-09-06

    IPC分类号: G11C8/00

    摘要: A synchronous semiconductor memory device includes an output control signal generator, which generates an output control signal corresponding to a signal obtained by delaying a read information signal in response to a delay internal clock signal obtained by dividing an internal clock signal by n, first and second sampling signals obtained by delaying the internal clock signal, a first output control clock signal obtained by dividing the internal clock signal by n, and a column address strobe (CAS) latency signal. The synchronous semiconductor memory device also includes a data output buffer, which outputs data by buffering internal data in response to the output control signal and the first output control clock signal.

    摘要翻译: 一个同步半导体存储器件包括一个输出控制信号发生器,它产生一个输出控制信号,该输出控制信号对应于通过将内部时钟信号除以n而获得的延迟内部时钟信号延迟读取信息信号获得的信号,第一和第二 通过延迟内部时钟信号获得的采样信号,通过将内部时钟信号除以n获得的第一输​​出控制时钟信号和列地址选通(CAS)等待时间信号。 同步半导体存储器件还包括数据输出缓冲器,其通过响应于输出控制信号和第一输出控制时钟信号缓冲内部数据而输出数据。

    Latency signal generator and method thereof
    13.
    发明申请
    Latency signal generator and method thereof 失效
    延迟信号发生器及其方法

    公开(公告)号:US20080056019A1

    公开(公告)日:2008-03-06

    申请号:US11896788

    申请日:2007-09-06

    IPC分类号: G11C7/10 G11C8/00

    CPC分类号: G11C7/22 G11C7/222

    摘要: A latency signal generator and method thereof are provided. The example latency signal generator may include a sampling clock signal generator adjusting a plurality of initial sampling clock signals based on a received clock signal to generate a plurality of adjusted sampling clock signals, a latch enable signal supply unit adjusting a plurality of initial latch enable signals based on a given one of the plurality of initial sampling clock signals to generate a plurality of adjusted latch enable signals and a latch unit including a plurality of latency latches, each of the plurality of latency latches selectively latching a given internal read command based on one of the plurality of adjusted sampling clock signals and one of the plurality of adjusted latch enable signals.

    摘要翻译: 提供了一种等待时间信号发生器及其方法。 示例性延迟信号发生器可以包括采样时钟信号发生器,其基于所接收的时钟信号来调整多个初始采样时钟信号,以产生多个经调整的采样时钟信号;锁存使能信号供应单元,调整多个初始锁存使能信号 基于所述多个初始采样时钟信号中的给定一个以产生多个调整的锁存使能信号,以及包括多个延迟锁存器的锁存单元,所述多个延迟锁存器中的每一个基于一个等待锁存器选择性地锁存给定的内部读取命令 多个经调整的采样时钟信号中的一个和多个调整的锁存使能信号中的一个。

    Latency control circuit and method of latency control
    14.
    发明授权
    Latency control circuit and method of latency control 失效
    延迟控制电路和延时控制方法

    公开(公告)号:US07298667B2

    公开(公告)日:2007-11-20

    申请号:US11202314

    申请日:2005-08-12

    IPC分类号: G11C8/00

    摘要: In one embodiment, a latency circuit generates the latency signal based on CAS latency information and read information. For example, the latency circuit may include a clock signal generating circuit generating a plurality of transfer signals and generating a plurality of sampling clock signals based on and corresponding to the plurality of transfer signals such that a timing relationship is created between the transfer signals and the sampling clock signals. The latency circuit may further include a latency signal generator selectively storing the read information based on the sampling clock signals, and selectively outputting the stored read information as the latency signal based on the transfer signals. The latency signal generator may also delay the read information such that the delayed, read information is stored based on the sampling clock signals.

    摘要翻译: 在一个实施例中,延迟电路基于CAS等待时间信息和读取信息生成等待时间信号。 例如,等待时间电路可以包括产生多个传送信号的时钟信号发生电路,并且基于并对应于多个传送信号产生多个采样时钟信号,使得在传送信号和传输信号之间产生定时关系 采样时钟信号。 延迟电路还可以包括等待时间信号发生器,其基于采样时钟信号选择性地存储读取的信息,并且基于传送信号选择性地输出存储的读取信息作为等待时间信号。 等待时间信号发生器还可以延迟读取信息,使得基于采样时钟信号来存储延迟读取信息。

    Data training in memory device
    15.
    发明申请
    Data training in memory device 审中-公开
    存储设备中的数据训练

    公开(公告)号:US20060062286A1

    公开(公告)日:2006-03-23

    申请号:US11128795

    申请日:2005-05-13

    IPC分类号: H04B1/38

    摘要: For data training in a memory device, a selecting unit selects a subset of data bit patterns received from a controlling device. In addition, a storing unit comprised of memory cells of the memory device stores the selected subset of data bit patterns. Such stored data bit patterns are then sent back to the controlling device that determines the level of data skew. Such data training more accurately reflects the actual paths and environments of the transmitted data bits.

    摘要翻译: 对于存储器件中的数据训练,选择单元选择从控制装置接收的数据位模式的子集。 此外,由存储器件的存储器单元组成的存储单元存储所选择的数据位模式子集。 然后将这种存储的数据位模式发送回确定数据偏移水平的控制设备。 这种数据训练更准确地反映了传输数据位的实际路径和环境。

    Stent for expanding body's lumen
    16.
    发明授权
    Stent for expanding body's lumen 失效
    用于扩张体腔的支架

    公开(公告)号:US06241757B1

    公开(公告)日:2001-06-05

    申请号:US09017773

    申请日:1998-02-03

    IPC分类号: A61F206

    摘要: A stent for expanding a lumen of a body having a structural stability along the length of the stent, as well as a good expandable force. According to one embodiment of the present invention, the stent is made of a single length of a filament and includes zigzag sections, in which the filament is wound in a zigzag manner, disposed on both end portions of the stent; and a spiral section, in which the filament is wound in a spiral manner, disposed between the zigzag sections. The zigzag section includes a plurality of bands. Each of the bands includes a series of straight portions, peak portions, and valley portions, the peak and valley portions being integrally engaged with the straight portions, and each of the bands is disposed along a circumferential direction of the stent on a plane substantially perpendicular to a longitudinal axis thereof; and each valley portion of the bands is twisted with a peak portion of an adjacent band. Also, the spiral section includes a body portion formed in such a way that the filament crosses in a spiral pattern to form a plurality of segments with the filament being not engaged with each other, and upper and lower end portions having a plurality of bent points.

    摘要翻译: 一种用于扩张沿着支架长度具有结构稳定性的身体内腔的支架,以及良好的可扩张力。 根据本发明的一个实施例,支架由单丝长度制成,并且包括设置在支架的两个端部上的以锯齿形方式缠绕细丝的锯齿形部分; 以及螺旋形部分,其中丝线以螺旋方式缠绕,设置在锯齿形部分之间。 之字形部分包括多个带。 每个条带包括一系列直线部分,峰部分和谷部分,峰部分和谷部分与直线部分整体接合,并且每个条带沿着支架的圆周方向布置在基本垂直的平面上 到其纵向轴线; 并且带的每个谷部分与相邻带的峰部分扭曲。 此外,螺旋部分包括主体部分,其形成为使得细丝以螺旋图案交叉以形成多个段,其中细丝彼此不接合,并且上端部和下端部具有多个弯曲点 。

    SEMICONDUCTOR LIGHT EMITTING DIODE CHIP AND LIGHT EMITTING DEVICE HAVING THE SAME
    18.
    发明申请
    SEMICONDUCTOR LIGHT EMITTING DIODE CHIP AND LIGHT EMITTING DEVICE HAVING THE SAME 审中-公开
    半导体发光二极管芯片及其发光装置

    公开(公告)号:US20160349445A1

    公开(公告)日:2016-12-01

    申请号:US15078488

    申请日:2016-03-23

    摘要: A semiconductor light emitting device includes a wiring board including a mounting surface on which a first wiring electrode and a second wiring electrode are disposed; a semiconductor light emitting diode (LED) chip including a first surface on which a first electrode and a second electrode are disposed, the first surface facing the mounting surface, the semiconductor LED chip further including a second surface positioned opposite to the first surface, and side surfaces positioned between the first and second surfaces, the first and second electrodes being connected to the first and second wiring electrodes, respectively; and a reflective layer disposed on at least one of the second surface and the side surfaces of the semiconductor LED chip.

    摘要翻译: 一种半导体发光器件,包括:布线板,包括安装表面,第一布线电极和第二布线电极设置在该安装面上; 包括设置有第一电极和第二电极的第一表面的半导体发光二极管(LED)芯片,所述第一表面面向所述安装表面,所述半导体LED芯片还包括与所述第一表面相对定位的第二表面,以及 位于第一和第二表面之间的侧表面,第一和第二电极分别连接到第一和第二布线电极; 以及设置在半导体LED芯片的第二表面和侧表面中的至少一个上的反射层。