Abstract:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
Abstract:
A resin encapsulating apparatus for semiconductor devices is characterized by including a rectangular pot constituted by being surrounded with two opposed wall surfaces of short side each having an outwardly projecting curved surface and two opposed wall surfaces of long side which are each substantially in the form of a straight line; a plurality of cavity lines connected respectively through gates to the bottom portion of at least one said long-side wall surface of the pot, the cavity lines each consisting of cavities connected in series; and a plunger to be inserted into the pot.
Abstract:
A power module includes an upper arm circuit unit and a lower arm circuit unit each having a power semiconductor element; an insulating substrate with the units mounted on one surface thereof; a metal base bonded onto the other surface of the substrate opposite to the one surface where the units are mounted; a first connection conductor for supplying a high potential to the upper unit from outside; a second connection conductor for supplying a low potential to the lower unit from outside; an insulating sheet interposed between the conductors; and a resin case disposed on the metal base to support the conductors, the conductors are flat conductors and laminated with the sheet sandwiched therebetween; the sheet extends from one end of the laminated structure to secure the creepage distance between the conductors; and the case is furnished with a recess for containing the laminated structure.
Abstract:
A semiconductor device with enhanced heat releasability and low-cost manufacturability is disclosed. This device has a substrate with an electronic circuit disposed on a first principal surface, a semiconductor element which is provided at the first surface of the substrate and electrically connected by wire bonding to the electronic circuit, a metallic core layer which is provided in the substrate and electrically connected to the semiconductor element, a plurality of conductive bumps provided on a second principal surface opposite to the first surface of the substrate, a thermal hardenable sealing resin for sealing at least the semiconductor element and the first surface side of the substrate, and a metal plate provided at the second surface for being electrically connected to the metal core layer. An electronic control module using the device is also disclosed.
Abstract:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
Abstract:
A ball screw mechanism (20) compact in size, employing a minimized number of component parts and having a high load capacity includes a rotary nut (22) having an internally threaded helical groove (26) and a mounting hole (30) both defined therein, and a simplified bridge member (24) mounted in the rotary nut (22). The bridge member (24) has a plurality of connecting grooves (28) defined on an inner surface thereof each operable to communicate neighboring convolutions of the internally threaded helical groove (26). The bridge member (24) has its opposite side edges formed with respective guide walls (36) protruding in a direction radially outwardly of the rotary nut (22) that are crimped to allow the bridge member (24) to be fixedly retained within the mounting hole (30).
Abstract:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
Abstract:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
Abstract:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
Abstract:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.