公开(公告)号：US06933594B2

公开(公告)日：2005-08-23

申请号：US09802678

申请日：2001-03-09

申请人： Neil McLellan ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan ,  Wing Him Lau

发明人： Neil McLellan ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan ,  Wing Him Lau

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L21/68 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/1134 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.

摘要翻译： 无引线塑料芯片载体是通过将封装设计的一面或两面半蚀刻到引线框条上构建的，以便产生独特的设计特征，例如围绕芯片附接焊盘的电源和/或接地环，用于触点的互锁铆钉头结构 垫，以及用于管芯附接垫的互锁图案。 在引线接合和模制之后，进行另外的蚀刻来隔离和暴露接触焊盘。 然后通过锯切单模或冲模进行从引线框条单独的单个芯片封装。

公开(公告)号：US08610262B1

公开(公告)日：2013-12-17

申请号：US11061895

申请日：2005-02-18

申请人： Neil McLellan ,  Ming Wang Sze ,  Kwok Cheung Tsang ,  Wing Keung Lam ,  Wai Kit Tam

发明人： Neil McLellan ,  Ming Wang Sze ,  Kwok Cheung Tsang ,  Wing Keung Lam ,  Wai Kit Tam

IPC分类号： H01L23/10

CPC分类号： H01L23/49568 ,  H01L21/56 ,  H01L23/10 ,  H01L23/24 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/42 ,  H01L23/4334 ,  H01L23/49816 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00

摘要： An integrated circuit package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween and a semiconductor die mounted on the first surface of the substrate. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate and an encapsulant encapsulates the wirebonds and the semiconductor die. A heat spreader has a cap, at least a portion of the cap extending inwardly toward and being spaced from the semiconductor die. The encapsulant fills the space between the portion of the cap and the semiconductor die. The heat spreader further has at least one sidewall extending from the cap, the at least one sidewall disposed on the substrate. A ball grid array is disposed on the second surface of the substrate, bumps of the ball grid array being in electrical connection with ones of the conductive traces.

摘要翻译： 一种集成电路封装，包括具有第一和第二表面的衬底以及它们之间的多个导电迹线以及安装在衬底的第一表面上的半导体管芯。 多个引线键将半导体管芯与衬底的导电迹线连接，并且密封剂封装了引线键和半导体管芯。 散热器具有帽，帽的至少一部分向内朝向半导体管芯并且与半导体管芯间隔开。 密封剂填充盖的部分和半导体管芯之间的空间。 散热器还具有从盖延伸的至少一个侧壁，该至少一个侧壁设置在基板上。 球栅阵列设置在基板的第二表面上，球栅阵列的凸块与导电迹线电连接。

公开(公告)号：US20130001791A1

公开(公告)日：2013-01-03

申请号：US13170820

申请日：2011-06-28

申请人： Fan YEUNG ,  Raymond (Kwok Cheung) TSANG ,  Edward LAW

发明人： Fan YEUNG ,  Raymond (Kwok Cheung) TSANG ,  Edward LAW

IPC分类号： H01L23/52 ,  H01L21/50

CPC分类号： H01L21/6835 ,  H01L21/4857 ,  H01L23/145 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments described herein provide a method of manufacturing integrated circuit (IC) devices. The method includes coupling a first surface of a first intermediate substrate to a first surface of a second intermediate substrate, forming a first plurality of patterned metal layers on a second surface of the first intermediate substrate to form a first substrate and a second plurality of patterned metal layers on a second surface of the second intermediate substrate to form a second substrate, and separating the first and second substrates. Each of the first substrate and the second substrate is configured to facilitate electrical interconnection between a respective IC die and a respective printed circuit board (PCB).

摘要翻译： 本文描述的实施例提供了一种制造集成电路（IC）装置的方法。 该方法包括将第一中间衬底的第一表面耦合到第二中间衬底的第一表面，在第一中间衬底的第二表面上形成第一多个图案化金属层以形成第一衬底和第二多个图案化 在第二中间基板的第二表面上的金属层，以形成第二基板，并分离第一和第二基板。 第一基板和第二基板中的每一个被配置为便于相应的IC管芯和相应的印刷电路板（PCB）之间的电互连。

公开(公告)号：US06995460B1

公开(公告)日：2006-02-07

申请号：US11123489

申请日：2005-05-06

申请人： Neil McLellan ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan ,  Wing Him Lau

发明人： Neil McLellan ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan ,  Wing Him Lau

IPC分类号： H01L23/495

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L21/6835 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19041 ,  H05K1/185 ,  H05K1/187 ,  H05K3/205 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.

摘要翻译： 无引线塑料芯片载体是通过将封装设计的一面或两面半蚀刻到引线框条上构建的，以便产生独特的设计特征，例如围绕芯片附接焊盘的电源和/或接地环，用于触点的互锁铆钉头结构 垫，以及用于管芯附接垫的互锁图案。 在引线接合和模制之后，进行另外的蚀刻来隔离和暴露接触焊盘。 然后通过锯切单模或冲模进行从引线框条单独的单个芯片封装。

公开(公告)号：US09520306B2

公开(公告)日：2016-12-13

申请号：US13618509

申请日：2012-09-14

申请人： Geraldine Tsui Yee Lin ,  Walter de Munnik ,  Kin Pui Kwan ,  Wing Him Lau ,  Kwok Cheung Tsang ,  Chun Ho Fan ,  Neil McLellan

发明人： Geraldine Tsui Yee Lin ,  Walter de Munnik ,  Kin Pui Kwan ,  Wing Him Lau ,  Kwok Cheung Tsang ,  Chun Ho Fan ,  Neil McLellan

IPC分类号： H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/78

CPC分类号： H01L21/561 ,  H01L21/4828 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49541 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A process for fabricating an integrated circuit package includes selectively etching a leadframe strip to define a die attach pad and a plurality of contact pads. At least one side of the die attach pad has a plurality of spaced apart pad portions. A semiconductor die is mounted to the die attach pad and wires are bonded from the semiconductor die to respective ones of the contact pads. A first surface of the leadframe strip, including the semiconductor die and wire bonds, is encapsulated in a molding material such that at least one surface of the leadframe strip is exposed. The integrated circuit package is singulated from a remainder of the leadframe strip.

摘要翻译： 一种用于制造集成电路封装的工艺包括选择性地蚀刻引线框条以限定管芯附接焊盘和多个接触焊盘。 管芯附接垫的至少一侧具有多个间隔开的垫部分。 将半导体管芯安装到管芯附接焊盘，并且将导线从半导体管芯接合到相应的接触焊盘。 包括半导体管芯和引线接合的引线框条的第一表面被封装在模制材料中，使得引线框带的至少一个表面被暴露。 集成电路封装从引线框条的其余部分分离。

公开(公告)号：US20130000968A1

公开(公告)日：2013-01-03

申请号：US13173689

申请日：2011-06-30

申请人： Sam Ziqun Zhao ,  Rezaur Rahman Khan ,  Raymond Kwok Cheung Tsang

发明人： Sam Ziqun Zhao ,  Rezaur Rahman Khan ,  Raymond Kwok Cheung Tsang

IPC分类号： H05K1/11 ,  H05K3/42 ,  H05K3/02

CPC分类号： H05K3/184 ,  H05K3/242 ,  H05K3/428 ,  H05K2201/10378 ,  H05K2203/0733 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A method of manufacturing a printed circuit board is disclosed. A conductive metal layer is formed on a first surface of a dielectric substrate. One or more vias are formed through the substrate. A conductive metal layer is formed on the first surface of the substrate and is patterned to form conductive traces on the first surface of the substrate. A plating mask is formed on the second surface of the substrate. One or more openings are formed in the plating mask to correspond to the location of the via(s). Conductive metal is deposited in the via(s) sufficient to substantially fill the via(s) and make contact with the conductive metal layer on the first surface and substantially to the level of the plating mask. The plating mask is removed from the substrate such that one or more conductive posts extend outwardly from the second surface of the substrate.

摘要翻译： 公开了一种制造印刷电路板的方法。 在电介质基板的第一表面上形成导电金属层。 通过衬底形成一个或多个通孔。 导电金属层形成在衬底的第一表面上，并被图案化以在衬底的第一表面上形成导电迹线。 在基板的第二表面上形成电镀掩模。 在电镀掩模中形成一个或多个开口以对应于通孔的位置。 导电金属沉积在足以基本上填充通孔的通孔中，并与第一表面上的导电金属层接触并且基本上与电镀掩模的水平面接触。 电镀掩模从衬底移除，使得一个或多个导电柱从衬底的第二表面向外延伸。

公开(公告)号：US07270867B1

公开(公告)日：2007-09-18

申请号：US11022130

申请日：2004-12-22

申请人： Kin Pui Kwan ,  Wing Him Lau ,  Kwok Cheung Tsang ,  Chun Ho Fan ,  Neil McLellan

发明人： Kin Pui Kwan ,  Wing Him Lau ,  Kwok Cheung Tsang ,  Chun Ho Fan ,  Neil McLellan

IPC分类号： H01L21/48

CPC分类号： H01L23/49582 ,  H01L21/4821 ,  H01L21/4832 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/85001 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  Y10T428/24107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A process for fabricating a leadless plastic chip carrier includes selectively depositing a plurality of base layers on a first surface of a base of a leadframe strip to at least partially define a die attach pad and at least one row of contact pads. At least one further layer is selectively deposited on portions of the plurality of layers to further define at least the contact pads. The leadframe strip is then treated with a surface preparation. A semiconductor die is mounted to the die attach pad, followed by wire bonding the semiconductor die to at least the contact pads. Molding the semiconductor die, the wire bonds, the die attach pad and the contact pads on the surface of the leadframe strip, in a molding compound follows. The leadframe strip is etched to expose the contact pads and the die attach pad and the leadless plastic chip carrier is singulated from a remainder of the leadframe strip.

摘要翻译： 一种用于制造无引线塑料芯片载体的方法包括在引线框架条的基底的第一表面上选择性地沉积多个基层以至少部分地限定管芯附着垫和至少一排接触垫。 至少一个另外的层选择性地沉积在多个层的部分上以进一步限定至少接触焊盘。 然后用表面处理处理引线框条。 将半导体管芯安装到管芯附接焊盘，然后将半导体管芯引线接合至少于接触焊盘。 在模制化合物中，模制半导体管芯，引线接合，引线框架条的表面上的焊盘和接触焊盘。 蚀刻引线框条以暴露接触焊盘和管芯附接焊盘，并且引线框架条的其余部分分离无引线塑料芯片载体。

公开(公告)号：US06781242B1

公开(公告)日：2004-08-24

申请号：US10307279

申请日：2002-12-02

申请人： Chun Ho Fan ,  Kwok Cheung Tsang ,  William Lap Keung Chow

发明人： Chun Ho Fan ,  Kwok Cheung Tsang ,  William Lap Keung Chow

IPC分类号： H01L2348

CPC分类号： H01L23/3128 ,  H01L23/36 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit package is provided. The package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween. The substrate further has a cavity therein and a heat slug is fixed to the substrate and spans the cavity. A semiconductor die is mounted to the heat slug such that at least a portion of the semiconductor die is disposed in the cavity. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate and an encapsulating material encapsulates the wire bonds and the semiconductor die. A ball grid array is disposed on the first surface of the substrate. Bumps of the ball grid array are in electrical connection with ones of the conductive traces.

摘要翻译： 提供集成电路封装。 该封装包括具有第一和第二表面的基板和它们之间的多个导电迹线。 基板还在其中具有空腔，并且热块固定到基板并跨越空腔。 将半导体管芯安装到散热块上，使半导体管芯的至少一部分设置在空腔中。 多个引线接合将半导体管芯与衬底的导电迹线连接，并且封装材料封装引线接合和半导体管芯。 球栅阵列设置在基板的第一表面上。 球栅阵列的凸起与导电迹线中的一个导电连接。

公开(公告)号：US07358119B2

公开(公告)日：2008-04-15

申请号：US11033928

申请日：2005-01-12

申请人： Neil McLellan ,  Serafin Pedron ,  Leo M. Higgins, III ,  Kwok Cheung Tsang ,  Kin Pui Kwan

发明人： Neil McLellan ,  Serafin Pedron ,  Leo M. Higgins, III ,  Kwok Cheung Tsang ,  Kin Pui Kwan

IPC分类号： H01L21/00

CPC分类号： H01L21/561 ,  H01L21/4832 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2223/54473 ,  H01L2224/1147 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A process for fabricating an integrated circuit package. Metal is plated up on a substrate to provide a plurality of contact pads and a plurality of fiducial markings on a periphery of the contacts. A transparent mask is selectively deposited on the substrate, over the fiducial markings. A semiconductor die is mounted on the substrate such that the contact pads circumscribe the semiconductor die and the semiconductor die is wire bonded to ones of the contact pads. The wire bonds are encapsulated and the semiconductor die and contact pads are covered in a molding material. The substrate is selectively etched to thereby etch away the substrate underneath the contact pads and the semiconductor die. The integrated circuit package is singulated from other integrated circuit packages by sawing using the fiducial markings.

摘要翻译： 一种用于制造集成电路封装的工艺。 将金属电镀在基板上以在触点的周边上提供多个接触焊盘和多个基准标记。 透明掩模选择性地沉积在衬底上，超过基准标记。 半导体管芯安装在基板上，使得接触焊盘围绕半导体管芯并且半导体管芯被引线接合到一个接触焊盘。 引线键合被封装，并且半导体管芯和接触焊盘被覆盖在模制材料中。 选择性地蚀刻衬底，从而蚀刻掉接触焊盘和半导体管芯之下的衬底。 集成电路封装通过使用基准标记锯切从其他集成电路封装中分离。

公开(公告)号：US07271032B1

公开(公告)日：2007-09-18

申请号：US11123491

申请日：2005-05-06

申请人： Neil McLellan ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan ,  Wing Him Lau

发明人： Neil McLellan ,  Chun Ho Fan ,  Kwok Cheung Tsang ,  Kin Pui Kwan ,  Wing Him Lau

IPC分类号： H01L21/48

CPC分类号： H01L21/4832 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48639 ,  H01L2224/48655 ,  H01L2224/85439 ,  H01L2224/85455 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.

摘要翻译： 无引线塑料芯片载体是通过将封装设计的一面或两面半蚀刻到引线框条上构建的，以便产生独特的设计特征，例如围绕芯片附接焊盘的电源和/或接地环，用于触点的互锁铆钉头结构 垫，以及用于管芯附接垫的互锁图案。 在引线接合和模制之后，进行另外的蚀刻来隔离和暴露接触焊盘。 然后通过锯切单模或冲模进行从引线框条单独的芯片封装。