公开(公告)号：US20110017407A1

公开(公告)日：2011-01-27

申请号：US12842112

申请日：2010-07-23

申请人： Chen-Ke Hsu ,  Liang-Sheng Chi ,  Chun-Chang Chen ,  Win-Jim Su ,  Hsu-Cheng Lin ,  Mei-Ling Tsai ,  Yi Lung Liu ,  Chen Ou

发明人： Chen-Ke Hsu ,  Liang-Sheng Chi ,  Chun-Chang Chen ,  Win-Jim Su ,  Hsu-Cheng Lin ,  Mei-Ling Tsai ,  Yi Lung Liu ,  Chen Ou

IPC分类号： B32B38/10

CPC分类号： H01L22/20 ,  H01L21/67005 ,  H01L21/67132 ,  H01L21/67271 ,  Y10S156/93 ,  Y10S156/941 ,  Y10T156/1111 ,  Y10T156/1116 ,  Y10T156/1158 ,  Y10T156/1168 ,  Y10T156/1179 ,  Y10T156/1195 ,  Y10T156/1917 ,  Y10T156/1933 ,  Y10T156/1983

摘要： A chip sorting apparatus comprising a chip holder comprising a first surface and an second surface opposite to the first surface; a wafer comprising a first chip disposed on a first position of the first surface; a first chip receiver comprising a third surface and an fourth surface opposite to the third surface, wherein the third surface is opposite to the first surface; a pressurization device making the first chip and the third surface of the first chip receiver adhered to each other through pressuring the second surface at where corresponding to the first position; and a separator decreasing the adhesion between the first chip and the first surface.

摘要翻译： 一种芯片分选装置，包括：芯片保持器，其包括第一表面和与所述第一表面相对的第二表面; 晶片，其包括设置在所述第一表面的第一位置上的第一芯片; 第一芯片接收器，包括与第三表面相对的第三表面和第四表面，其中第三表面与第一表面相对; 使第一芯片的第一芯片和第三表面的加压装置通过在对应于第一位置的位置处对第二表面施加压力而彼此粘合; 以及减小第一芯片和第一表面之间的粘附性的隔板。

公开(公告)号：US20100314256A1

公开(公告)日：2010-12-16

申请号：US12854214

申请日：2010-08-11

申请人： Shih-Chieh Chang ,  Ying-Lang Wang ,  Kei-Wei Chen ,  Shih-Ho Lin ,  Chun-Chang Chen

发明人： Shih-Chieh Chang ,  Ying-Lang Wang ,  Kei-Wei Chen ,  Shih-Ho Lin ,  Chun-Chang Chen

IPC分类号： C25D5/00 ,  H01R43/00 ,  C25F3/16 ,  C25F3/22

CPC分类号： H01L21/2885 ,  C25D17/001 ,  C25D17/12 ,  Y10T29/49208 ,  Y10T29/53204

摘要： A current-leveling electrode for improving electroplating and electrochemical polishing uniformity in the electrochemical plating or electropolishing of metals on a substrate is disclosed. The current-leveling electrode includes a base electrode and at least one sub-electrode carried by the base electrode. The at least one sub-electrode has a width which is less than a width of the base electrode to impart a generally tapered, stepped or convex configuration to the current-leveling electrode.

摘要翻译： 公开了一种用于改善电化学电镀中的电镀和电化学抛光均匀性的电流调节电极或对基底上的金属的电解抛光。 电流调平电极包括基极和由基极承载的至少一个子电极。 所述至少一个子电极的宽度小于所述基极的宽度，以赋予所述电流调平电极大致锥形，阶梯形或凸形的构造。

公开(公告)号：US08657467B2

公开(公告)日：2014-02-25

申请号：US12007745

申请日：2008-01-15

申请人： Min-Hsun Hsieh ,  Chou-Chih Yin ,  Chun-Chang Chen ,  Jen-Shui Wang ,  Chia-Fen Tsai ,  Yi-Ming Chen

发明人： Min-Hsun Hsieh ,  Chou-Chih Yin ,  Chun-Chang Chen ,  Jen-Shui Wang ,  Chia-Fen Tsai ,  Yi-Ming Chen

IPC分类号： F21V5/00 ,  F21V15/01

CPC分类号： G02B19/0071 ,  F21V7/0091 ,  F21Y2115/10 ,  G02B6/0018 ,  G02B6/0021 ,  G02B6/0033 ,  G02B19/0028 ,  G02B19/0061 ,  H01L2924/01322 ,  Y10T428/31551 ,  H01L2924/00

摘要： An illumination apparatus is disclosed in the invention. The illumination apparatus includes a cavity with a diffusion surface, a light source, a light-spreading device, and at least one optically-conditioning surface with a wave-like array formed thereon. The light-spreading device and the optically-conditioning surface spread the light generated by the light source. The light-spreading device includes a wing-shaped protrusion part, a light incident surface, a recess located away from the light incident surface, and an optically-conditioning surface including a wave-like array, wherein the wave-like array has a wavefront direction.

摘要翻译： 本发明公开了一种照明装置。 照明装置包括具有扩散表面的空腔，光源，光扩散装置，以及形成有波浪形阵列的至少一个光学调节表面。 光扩散装置和光学调理表面扩散由光源产生的光。 光扩散装置包括翼形突起部分，光入射表面，远离光入射表面的凹部和包括波状阵列的光学调节表面，其中波状阵列具有波前 方向。

公开(公告)号：US06695921B2

公开(公告)日：2004-02-24

申请号：US10170957

申请日：2002-06-13

申请人： Hsi-Kuei Cheng ,  Ting-Chu Wang ,  Yu-Ku Lin ,  Chin-Te Huang ,  Huai-Tei Yang ,  Chun-Chang Chen ,  Yi-Lang Wang

发明人： Hsi-Kuei Cheng ,  Ting-Chu Wang ,  Yu-Ku Lin ,  Chin-Te Huang ,  Huai-Tei Yang ,  Chun-Chang Chen ,  Yi-Lang Wang

IPC分类号： B05C1302

CPC分类号： H01L21/68735 ,  H01L21/6875 ,  Y10S269/903

摘要： An improved hoop support for semiconductor wafers reduces contamination of the wafer during edge beveling operations through the use of support pins that make only line contact with the wafer. The support pins are spaced around the periphery of the hoop and possess a triangular cross section. Two intersecting sides of the pins form an edge that defines the line contact with the wafer. These intersecting sides are preferably inclined relative to the wafer at an angle of between 60 and 80 degrees.

摘要翻译： 用于半导体晶片的改进的环形支撑通过使用仅与晶片线接触的支撑销来减少边缘斜切操作期间晶片的污染。 支撑销围绕环的周边间隔开并且具有三角形横截面。 销的两个相交的侧面形成限定与晶片的线接触的边缘。 这些相交侧优选以60度和80度之间的角度相对于晶片倾斜。

公开(公告)号：US06531382B1

公开(公告)日：2003-03-11

申请号：US10140662

申请日：2002-05-08

申请人： Tao Cheng ,  Wen-Hsin Huang ,  Jiun-Pyng You ,  Lin-June Wu ,  Shih-Tzung Chang ,  Ming-Jei Lee ,  Chun-Chang Chen ,  Yu-Ku Lin ,  Tong-Hua Kuan ,  Ying-Lang Wang

发明人： Tao Cheng ,  Wen-Hsin Huang ,  Jiun-Pyng You ,  Lin-June Wu ,  Shih-Tzung Chang ,  Ming-Jei Lee ,  Chun-Chang Chen ,  Yu-Ku Lin ,  Tong-Hua Kuan ,  Ying-Lang Wang

IPC分类号： H01L213205

CPC分类号： H01L21/76802 ,  H01L21/76838

摘要： A process for preparing a surface of a lower level metal structure, exposed at the bottom of a sub-micron diameter opening, to allow a low resistance interface to be obtained when overlaid with an upper level metal structure, has been developed. A disposable, capping insulator layer is first deposited on the composite insulator layer in which the sub-micron diameter opening will be defined in, to protect underlying components of the composite insulator from a subsequent metal pre-metal procedure. After anisotropically defining the sub-micron diameter opening in the capping insulator, and composite insulator layers, and after removal of the defining photoresist shape, an argon sputtering procedure is used to remove native oxide from the surface of the lower level metal structure. In addition to native oxide removal the argon sputtering procedure, featuring a negative DC bias applied to the substrate, also removes the capping insulator layer from the top surface of the composite insulator layer. An in situ metal deposition then allows a clean interface to result between the overlying metal layer, and the underlying plasma treated, metal surface.

摘要翻译： 已经开发了制备在亚微米直径开口的底部露出的下层金属结构的表面以允许在与上层金属结构重叠时获得低电阻界面的方法。 首先将一次性封盖绝缘体层沉积在复合绝缘体层上，在该复合绝缘层上将限定亚微米直径的开口，以保护复合绝缘子的下面的部件免于后续的金属预金属工艺。 在各向异性地限定封盖绝缘体中的亚微米直径开口和复合绝缘体层之后，并且在去除限定的光致抗蚀剂形状之后，使用氩溅射方法从下层金属结构的表面去除自然氧化物。 除了自然氧化物除去之外，具有施加到衬底的负DC偏压的氩溅射工艺也从复合绝缘体层的顶表面去除封盖绝缘体层。 原位金属沉积然后允许在上覆的金属层和下面的等离子体处理的金属表面之间产生干净的界面。

公开(公告)号：US07803257B2

公开(公告)日：2010-09-28

申请号：US10971836

申请日：2004-10-22

申请人： Shih-Chieh Chang ,  Ying-Lang Wang ,  Kei-Wei Chen ,  Shih-Ho Lin ,  Chun-Chang Chen

发明人： Shih-Chieh Chang ,  Ying-Lang Wang ,  Kei-Wei Chen ,  Shih-Ho Lin ,  Chun-Chang Chen

IPC分类号： C25D17/14 ,  C25D17/12

CPC分类号： H01L21/2885 ,  C25D17/001 ,  C25D17/12 ,  Y10T29/49208 ,  Y10T29/53204

摘要： A current-leveling electrode for improving electroplating and electrochemical polishing uniformity in the electrochemical plating or electropolishing of metals on a substrate is disclosed. The current-leveling electrode includes a base electrode and at least one sub-electrode carried by the base electrode. The at least one sub-electrode has a width which is less than a width of the base electrode to impart a generally tapered, stepped or convex configuration to the current-leveling electrode.

摘要翻译： 公开了一种用于改善电化学电镀中的电镀和电化学抛光均匀性的电流调节电极或对基底上的金属的电解抛光。 电流调平电极包括基极和由基极承载的至少一个子电极。 所述至少一个子电极的宽度小于所述基极的宽度，以赋予所述电流调平电极大致锥形，阶梯形或凸形的构造。

公开(公告)号：US20080112156A1

公开(公告)日：2008-05-15

申请号：US12007745

申请日：2008-01-15

申请人： Min-Hsun Hsieh ,  Chou-Chih Yin ,  Chun-Chang Chen ,  Jen-Shui Wang ,  Chia-Fen Tsai ,  Yi-Ming Chen

发明人： Min-Hsun Hsieh ,  Chou-Chih Yin ,  Chun-Chang Chen ,  Jen-Shui Wang ,  Chia-Fen Tsai ,  Yi-Ming Chen

IPC分类号： G09F13/04 ,  F21V13/10

CPC分类号： G02B19/0071 ,  F21V7/0091 ,  F21Y2115/10 ,  G02B6/0018 ,  G02B6/0021 ,  G02B6/0033 ,  G02B19/0028 ,  G02B19/0061 ,  H01L2924/01322 ,  Y10T428/31551 ,  H01L2924/00

摘要： An illumination apparatus is disclosed in the invention. The illumination apparatus includes a cavity with a diffusion surface, a light source, a light-spreading device, and at least one optically-conditioning surface with a wavelike array formed thereon. The light-spreading device and the optically-conditioning surface spread the light generated by the light source. The light-spreading device includes a wing-shaped protrusion part, a light incident surface, a recess located away from the light incident surface, and an optically-conditioning surface including a wavelike array, wherein the wavelike array has a wavefront direction.

公开(公告)号：US20130131483A1

公开(公告)日：2013-05-23

申请号：US13431999

申请日：2012-03-28

申请人： Jen-Ran Chen ,  Ren-Guey Lee ,  Chien-Chih Lai ,  Hsi-Wen Wang ,  Chun-Chang Chen

发明人： Jen-Ran Chen ,  Ren-Guey Lee ,  Chien-Chih Lai ,  Hsi-Wen Wang ,  Chun-Chang Chen

IPC分类号： A61B5/0408

CPC分类号： A61B5/02455 ,  A61B5/0022 ,  A61B5/02438 ,  A61B5/6805 ,  A61B5/746

摘要： A heart rate alarm system includes an article of clothing, at least two conductive units, at least one alarm device, a heart rate measurement unit, a first transmission unit, a second transmission unit, and an operation unit. The at least two conductive units are coupled to each other through at least one conductive fibric. The heart rate measurement unit measures a heart rate through the at least two conductive units, and generates a control signal and a heart rate value according to the heart rate. The first transmission unit transmits the control signal to the at least one alarm device and transmits the heart rate value. The at least one alarm device generates at least one alarm signal according to the control signal. The operation unit calculates a heart beat period, a heart physiological age, indicators of autonomic nervous system, and/or a calorie consumption indicator.

摘要翻译： 心率报警系统包括服装，至少两个导电单元，至少一个报警装置，心率测量单元，第一传输单元，第二传输单元和操作单元。 至少两个导电单元通过至少一个导电纤维彼此连接。 心率测量单元通过至少两个导电单元测量心率，并根据心率产生控制信号和心率值。 第一发送单元将控制信号发送到至少一个报警装置，并发送心率值。 至少一个报警装置根据控制信号产生至少一个报警信号。 操作单元计算心跳周期，心脏生理年龄，自主神经系统指标和/或卡路里消耗指标。

公开(公告)号：US07168841B2

公开(公告)日：2007-01-30

申请号：US11158408

申请日：2005-06-21

申请人： Min-Hsun Hsieh ,  Chou-Chih Yin ,  Chun-Chang Chen

发明人： Min-Hsun Hsieh ,  Chou-Chih Yin ,  Chun-Chang Chen

IPC分类号： F21V8/00

CPC分类号： G02B6/0018 ,  G02B6/0008 ,  G02B6/0028 ,  G02B6/0055 ,  G02B6/0065 ,  G02B6/0068 ,  G02B6/0073

摘要： A backlight module including an independent light source is provided. The backlight module includes a light generation device, a light transmission device, a light mixing device and a planar light generation device. The light generation device may include one or more light emitting components. The light transmission device may be adopted for receiving and transmitting the light emitted by the light generation device. The light mixing device may be adopted for mixing the light emitted by the light transmission device to generate a mixed linear light. The planar light generation device may comprise a light distributing portion for receiving the mixed linear light to generate a planar light.

摘要翻译： 提供了包括独立光源的背光模块。 背光模块包括发光装置，光传输装置，光混合装置和平面光产生装置。 光产生装置可以包括一个或多个发光部件。 光传输装置可以用于接收和发送由光产生装置发射的光。 光混合装置可以用于混合由光传输装置发射的光以产生混合线性光。 平面光产生装置可以包括用于接收混合线性光以产生平面光的光分配部分。

公开(公告)号：US20050236181A1

公开(公告)日：2005-10-27

申请号：US10917543

申请日：2004-08-12

申请人： Kei-Wei Chen ,  Shih-Ho Lin ,  Chun-Chang Chen ,  Ching-Hwan Su ,  Yu-Ku Lin ,  Ying-Lang Wang ,  De-Dui Liao ,  Meng-Chao Tzeng

发明人： Kei-Wei Chen ,  Shih-Ho Lin ,  Chun-Chang Chen ,  Ching-Hwan Su ,  Yu-Ku Lin ,  Ying-Lang Wang ,  De-Dui Liao ,  Meng-Chao Tzeng

IPC分类号： H01L21/768 ,  H01L23/522 ,  H05K1/03 ,  H05K1/09 ,  H05K1/11

CPC分类号： H01L21/76816 ,  H01L21/76807 ,  H01L23/5226 ,  H01L2924/0002 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method for preventing the formation of voids and contaminants in vias during the fabrication of a metal interconnect structure such as a dual damascene structure is disclosed. The method includes providing a substrate; providing a dielectric layer having trench openings and via openings on the substrate, wherein the ratio of the sum of the areas of the trench openings to the sum of the areas of the via openings is between 1 and 300; wherein the via opening bottom has a width of less than about 25 μm; and electroplating a metal in the trench openings and via openings. An interconnect structure having at least one void-free via is further disclosed.

摘要翻译： 公开了一种用于在金属互连结构例如双镶嵌结构的制造期间防止在通孔中形成空隙和污染物的方法。 该方法包括提供基板; 在衬底上提供具有沟槽开口和通孔开口的电介质层，其中沟槽开口的面积之和与通路孔的面积之和的比值在1和300之间; 其中所述通孔开口底部具有小于约25μm的宽度; 以及在沟槽开口和通孔中电镀金属。 还公开了具有至少一个无空隙通孔的互连结构。