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公开(公告)号:US08497558B2
公开(公告)日:2013-07-30
申请号:US13183272
申请日:2011-07-14
申请人: Ulrich Krumbein , Gerhard Lohninger , Alfons Dehe
发明人: Ulrich Krumbein , Gerhard Lohninger , Alfons Dehe
CPC分类号: H01L25/16 , H01L23/10 , H01L23/4926 , H01L23/66 , H01L25/165 , H01L2224/48091 , H01L2224/49175 , H01L2924/01322 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要: In an embodiment, a semiconductor device includes a semiconductor substrate. The semiconductor substrate has a first cavity disposed through it, and conductive material covers at least the bottom portion of the first cavity. An integrated circuit is disposed on the top surface of the conductive material. The device further includes a cap disposed on the top surface of the substrate, such that a cavity disposed on a surface of the cap overlies the first cavity in the substrate.
摘要翻译: 在一个实施例中,半导体器件包括半导体衬底。 半导体衬底具有通过其设置的第一腔,并且导电材料至少覆盖第一空腔的底部。 集成电路设置在导电材料的顶表面上。 该装置还包括设置在基板的顶表面上的盖,使得设置在盖的表面上的空腔覆盖在基板中的第一空腔上。
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公开(公告)号:US20120289023A1
公开(公告)日:2012-11-15
申请号:US13365774
申请日:2012-02-03
申请人: Carsten Ahrens , Rudolf Berger , Manfred Frank , Uwe Hoeckele , Bernhard Knott , Ulrich Krumbein , Wolfgang Lehnert , Berthold Schuderer , Juergen Wagner , Stefan Willkofer
发明人: Carsten Ahrens , Rudolf Berger , Manfred Frank , Uwe Hoeckele , Bernhard Knott , Ulrich Krumbein , Wolfgang Lehnert , Berthold Schuderer , Juergen Wagner , Stefan Willkofer
IPC分类号: H01L21/762
CPC分类号: H01L21/76224 , H01L21/762 , H01L21/76232 , H01L21/78 , H01L23/31 , H01L23/3185 , H01L23/481 , H01L2924/0002 , H01L2924/00
摘要: A method for producing a semiconductor device having a sidewall insulation includes providing a semiconductor body having a first side and a second side lying opposite the first side. At least one first trench is at least partly filled with insulation material proceeding from the first side in the direction toward the second side into the semiconductor body. The at least one first trench is produced between a first semiconductor body region for a first semiconductor device and a second semiconductor body region for a second semiconductor device. An isolating trench extends from the first side of the semiconductor body in the direction toward the second side of the semiconductor body between the first and second semiconductor body regions in such a way that at least part of the insulation material of the first trench adjoins at least a sidewall of the isolating trench. The second side of the semiconductor body is partly removed as far as the isolating trench.
摘要翻译: 一种制造具有侧壁绝缘体的半导体器件的方法包括提供具有第一侧和与第一侧相对的第二侧的半导体本体。 至少一个第一沟槽至少部分地填充有绝缘材料,该绝缘材料从朝向第二侧的方向的第一侧进入半导体本体。 在第一半导体器件的第一半导体体区域和第二半导体器件的第二半导体本体区域之间产生至少一个第一沟槽。 隔离沟槽从半导体本体的第一侧沿第一和第二半导体主体区域之间的半导体本体的第二侧的方向延伸,使得第一沟槽的绝缘材料的至少一部分至少邻接 隔离沟槽的侧壁。 半导体主体的第二面部分地被去除到隔离沟槽的一侧。
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公开(公告)号:US06949797B2
公开(公告)日:2005-09-27
申请号:US10769458
申请日:2004-01-30
申请人: Ulrich Krumbein , Hans Taddiken
发明人: Ulrich Krumbein , Hans Taddiken
IPC分类号: H01L21/336 , H01L29/06 , H01L29/08 , H01L29/40 , H01L29/78 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号: H01L29/402 , H01L29/0847 , H01L29/66659 , H01L29/7835
摘要: A semiconductor structure comprises a substrate and a source region formed in the substrate. Further, a drain region is formed in the substrate. The drain region comprises a first drain portion with a first doping concentration and a second drain portion with a second doping concentration, which is lower than the first doping concentration. Between the source region and the second drain portion a channel region is defined. Further, a field plate is provided, which is disposed across the junction between the first drain portion and the second drain portion to reduce the gradient of the electrical field at the junction.
摘要翻译: 半导体结构包括衬底和形成在衬底中的源极区域。 此外,在衬底中形成漏区。 漏极区域包括具有第一掺杂浓度的第一漏极部分和具有低于第一掺杂浓度的第二掺杂浓度的第二漏极部分。 在源极区域和第二漏极部分之间限定沟道区域。 此外,设置场板,其设置在第一漏极部分和第二漏极部分之间的接合处,以减小接合处的电场的梯度。
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公开(公告)号:US20130015467A1
公开(公告)日:2013-01-17
申请号:US13183272
申请日:2011-07-14
申请人: Ulrich Krumbein , Gerhard Lohninger , Alfons Dehe
发明人: Ulrich Krumbein , Gerhard Lohninger , Alfons Dehe
IPC分类号: H01L29/16 , H01L29/772 , H01L23/48
CPC分类号: H01L25/16 , H01L23/10 , H01L23/4926 , H01L23/66 , H01L25/165 , H01L2224/48091 , H01L2224/49175 , H01L2924/01322 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要: In an embodiment, a semiconductor device includes a semiconductor substrate. The semiconductor substrate has a first cavity disposed through it, and conductive material covers at least the bottom portion of the first cavity. An integrated circuit is disposed on the top surface of the conductive material. The device further includes a cap disposed on the top surface of the substrate, such that a cavity disposed on a surface of the cap overlies the first cavity in the substrate.
摘要翻译: 在一个实施例中,半导体器件包括半导体衬底。 半导体衬底具有通过其设置的第一腔,并且导电材料至少覆盖第一空腔的底部。 集成电路设置在导电材料的顶表面上。 该装置还包括设置在基板的顶表面上的盖,使得设置在盖的表面上的空腔覆盖在基板中的第一空腔上。
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公开(公告)号:US07816791B2
公开(公告)日:2010-10-19
申请号:US11854296
申请日:2007-09-12
申请人: Carsten Ahrens , Sven Albers , Klaus Gnannt , Ulrich Krumbein , Gunther Mackh , Patrick Schelauske , Berthold Schuderer , Georg Seidemann
发明人: Carsten Ahrens , Sven Albers , Klaus Gnannt , Ulrich Krumbein , Gunther Mackh , Patrick Schelauske , Berthold Schuderer , Georg Seidemann
CPC分类号: H01L24/05 , H01L24/45 , H01L2224/04042 , H01L2224/05147 , H01L2224/05164 , H01L2224/05556 , H01L2224/05624 , H01L2224/05644 , H01L2224/45144 , H01L2224/48624 , H01L2224/48644 , H01L2924/01005 , H01L2924/01013 , H01L2924/01015 , H01L2924/0102 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/19043 , H01L2924/00014 , H01L2924/00
摘要: A bonding pad on a substrate has a first metal structure establishing an electrical connection between a device and a bonding area, and a second metal structure arranged at the bonding area. The first metal structure extends, within the bonding area, at least over part of the bonding area between the substrate and the second metal structure, so as to contact the second metal structure, the second metal structure being harder than the first metal structure.
摘要翻译: 衬底上的接合焊盘具有在器件和接合区域之间建立电连接的第一金属结构和布置在接合区域处的第二金属结构。 所述第一金属结构在所述接合区域内延伸所述基板与所述第二金属结构之间的所述接合区域的至少一部分以与所述第二金属结构接触,所述第二金属结构比所述第一金属结构硬。
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公开(公告)号:US20080067682A1
公开(公告)日:2008-03-20
申请号:US11854296
申请日:2007-09-12
申请人: Carsten Ahrens , Sven Albers , Klaus Gnannt , Ulrich Krumbein , Gunther Mackh , Patrick Schelauske , Berthold Schuderer , Georg Seidemann
发明人: Carsten Ahrens , Sven Albers , Klaus Gnannt , Ulrich Krumbein , Gunther Mackh , Patrick Schelauske , Berthold Schuderer , Georg Seidemann
IPC分类号: H01L23/52 , H01L21/4763
CPC分类号: H01L24/05 , H01L24/45 , H01L2224/04042 , H01L2224/05147 , H01L2224/05164 , H01L2224/05556 , H01L2224/05624 , H01L2224/05644 , H01L2224/45144 , H01L2224/48624 , H01L2224/48644 , H01L2924/01005 , H01L2924/01013 , H01L2924/01015 , H01L2924/0102 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/19043 , H01L2924/00014 , H01L2924/00
摘要: A bonding pad on a substrate has a first metal structure establishing an electrical connection between a device and a bonding area, and a second metal structure arranged at the bonding area. The first metal structure extends, within the bonding area, at least over part of the bonding area between the substrate and the second metal structure, so as to contact the second metal structure, the second metal structure being harder than the first metal structure.
摘要翻译: 衬底上的接合焊盘具有在器件和接合区域之间建立电连接的第一金属结构和布置在接合区域处的第二金属结构。 所述第一金属结构在所述接合区域内延伸所述基板与所述第二金属结构之间的所述接合区域的至少一部分以与所述第二金属结构接触,所述第二金属结构比所述第一金属结构硬。
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公开(公告)号:US07202529B2
公开(公告)日:2007-04-10
申请号:US10798720
申请日:2004-03-11
申请人: Ulrich Krumbein , Hans Taddiken
发明人: Ulrich Krumbein , Hans Taddiken
CPC分类号: H01L29/1095 , H01L29/0634 , H01L29/0847 , H01L29/402 , H01L29/4175 , H01L29/7835
摘要: A field effect transistor includes a substrate having a doping of a first conductivity type, a drain area in the substrate having a doping of a second conductivity type oppposite the first conductivity type, a source area in the substrate being laterally spaced from the drain area and having a doping of the second conductivity type, and a channel area in the substrate that is arranged between the source area and the drain area. In a portion of the substrate bordering the drain area, an area having a doping of the second conductivity type, which is connected to the drain area, is arranged such that in the portion alternating regions having the first conductivity type and having the second conductivity type are arranged.
摘要翻译: 场效应晶体管包括具有第一导电类型的掺杂的衬底,衬底中的漏极区域具有与第一导电类型相反的第二导电类型的掺杂,衬底中的源极区域与漏极区域横向间隔开;以及 具有第二导电类型的掺杂,以及布置在源极区域和漏极区域之间的衬底中的沟道区域。 在与漏极区域接触的衬底的一部分中,连接到漏区的具有掺杂第二导电类型的区域被布置成使得在具有第一导电类型且具有第二导电类型的部分交替区域中 被安排。
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公开(公告)号:US20060197187A1
公开(公告)日:2006-09-07
申请号:US11342294
申请日:2006-01-27
申请人: Gerhard Lohninger , Ulrich Krumbein
发明人: Gerhard Lohninger , Ulrich Krumbein
IPC分类号: H01L27/082
CPC分类号: H01L21/6835 , H01L21/78 , H01L23/3114 , H01L24/05 , H01L24/16 , H01L24/81 , H01L2221/6834 , H01L2221/68377 , H01L2224/0401 , H01L2224/05548 , H01L2224/0556 , H01L2224/0558 , H01L2224/05644 , H01L2224/13 , H01L2224/131 , H01L2224/16105 , H01L2224/16238 , H01L2224/8121 , H01L2224/81815 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01061 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/05042 , H01L2924/12043 , H01L2924/1305 , H01L2924/14 , H01L2924/00 , H01L2924/00012
摘要: The semiconductor device includes a semiconductor body having a first and an opposite second main surface and side faces connecting the main surfaces, a circuit region in the semiconductor body adjacent to the first main surface, having a circuit contact terminal, a metallization region extending from the circuit contact terminal on the first main surface onto a side face of the semiconductor body to provide an exposed contacting region on the side face of the semiconductor body, and an insulation layer arranged between the metallization region and the semiconductor body, the insulation layer having an opening for electrically connecting the circuit contact terminal to the metallization region.
摘要翻译: 半导体器件包括具有第一和相对的第二主表面和连接主表面的侧面的半导体本体,与第一主表面相邻的半导体本体中的电路区域,具有电路接触端子,从该第二主表面延伸的金属化区域 在半导体主体的侧面上设置第一主表面上的电路接触端子,以在半导体主体的侧面上提供暴露的接触区域,以及布置在金属化区域和半导体本体之间的绝缘层,绝缘层具有 用于将电路接触端子电连接到金属化区域的开口。
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公开(公告)号:US06852585B2
公开(公告)日:2005-02-08
申请号:US10148379
申请日:2000-11-30
IPC分类号: H01L21/336 , H01L27/06 , H01L29/10 , H01L29/78 , H01L21/8238
CPC分类号: H01L29/66484 , H01L27/0629 , H01L29/1079 , H01L29/7831
摘要: A semiconductor circuit arrangement includes a circuit element embedded in a semiconductor substrate of a first conductivity type in an integrated manner and is provided with at least one gate electrode and first and second terminal electrodes. The first terminal electrode includes a well region that is embedded in the semiconductor substrate and is of a second conductivity type which is opposite the first conductivity type. A sub-well region is embedded in the well region of the first terminal electrode and is of the second conductivity type and has a higher doping than said well region. The sub-well region is embedded in the surface of the substrate and ends without reaching a well region of the gate electrode which is of the first conductivity type.
摘要翻译: 半导体电路装置包括以一体化方式嵌入第一导电类型的半导体衬底中的电路元件,并且设置有至少一个栅极电极和第一和第二端子电极。 第一端子电极包括嵌入在半导体衬底中且与第一导电类型相反的第二导电类型的阱区。 子阱区域嵌入在第一端子电极的阱区域中并且是第二导电类型并且具有比所述阱区域更高的掺杂。 子阱区域嵌入在衬底的表面中并且结束而不到达第一导电类型的栅电极的阱区。
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