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公开(公告)号:US20200066629A1
公开(公告)日:2020-02-27
申请号:US16346873
申请日:2016-12-23
Applicant: Intel Corporation
Inventor: Richard E. SCHENKER , Robert L. BRISTOL , Kevin L. LIN , Florian GSTREIN , James M. BLACKWELL , Marie KRYSAK , Manish CHANDHOK , Paul A. NYHUS , Charles H. WALLACE , Curtis W. WARD , Swaminathan SIVAKUMAR , Elliot N. TAN
IPC: H01L23/528 , H01L27/088 , H01L23/532 , H01L29/78 , H01L23/522
Abstract: Advanced lithography techniques including sub-10 nm pitch patterning and structures resulting therefrom are described. Self-assembled devices and their methods of fabrication are described.
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公开(公告)号:US20190146335A1
公开(公告)日:2019-05-16
申请号:US16097960
申请日:2016-07-01
Applicant: Intel Corporation
Inventor: James M. BLACKWELL , Robert L. BRISTOL , Marie KRYSAK , Florian GSTREIN , Eungnak HAN , Kevin L. LIN , Rami HOURANI , Shane M. HARLSON
IPC: G03F7/00 , H01L21/027 , H01L21/768 , G03F7/40
Abstract: Lined photoresist structures to facilitate fabricating back end of line (BEOL) interconnects are described. In an embodiment, a hard mask has recesses formed therein, wherein liner structures are variously disposed each on a sidewall of a respective recess. Photobuckets comprising photoresist material are also variously disposed in the recesses. The liner structures variously serve as marginal buffers to mitigate possible effects of misalignment in the exposure of photoresist material to photons or an electron beam. In another embodiment, a recess has disposed therein a liner structure and a photobucket that are both formed by self-assembly of a photoresist-based block-copolymer.
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13.
公开(公告)号:US20180236440A1
公开(公告)日:2018-08-23
申请号:US15772839
申请日:2015-12-04
Applicant: Jeffery D. BIELEFELD , James M. BLACKWELL , David J. MICHALAK , Jessica M. TORRES , Marie KRYSAK , Intel Corporation
Inventor: James M. BLACKWELL , David J. Michalak , Jessica M. Torres , Marie KRYSAK , Jeffery D. Bielefeld
CPC classification number: B01J37/08 , B01J21/02 , B01J31/0284 , C08J3/245 , C08L83/16 , H01B3/22 , H01B3/46
Abstract: Catalysts for facilitating cross-linking of liquid precursors into solid dielectric materials are disclosed. Initially, catalysts are protected, either by coordination with other compounds or by conversion to an ionic salt. Protection prevents catalysts from facilitating cross-linking unless activated. A catalyst is activated upon receiving an excitation, e.g. thermal excitation by heating. Upon receiving an excitation, protection of a catalyst dissociates, decomposes, becomes neutralized, or is otherwise transformed to allow the catalyst to facilitate cross-linking of the precursors into solid dielectric materials. Methods for fabricating dielectric materials using such protected catalysts as well as devices comprising the resulting materials are also described. Dielectric materials comprising cross-linked cyclic carbosilane units having a ring structure including C and Si may be formed in this manner. Protected catalysts disclosed herein allow careful control of precursor cross-linking, resulting in higher quality dielectric materials that may be formed by coating techniques.
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公开(公告)号:US20180102282A1
公开(公告)日:2018-04-12
申请号:US15568791
申请日:2015-05-28
Applicant: Intel Corporation
Inventor: Marie KRYSAK , Robert Lindsey BRISTOL , Paul Anton NYHUS , Michael J. LEESON
IPC: H01L21/768 , H01L21/027 , G03F7/004 , G03F7/20 , G03F7/38 , G03F7/32
Abstract: Embodiments of the invention include photoresist materials and methods of patterning photoresist materials. In an embodiment a photoresist material comprises a plurality of molecular glasses (MGs). In an embodiment, a glass transition temperature Tg of the photoresist material is less than an activation temperature needed to deblock blocking groups from the MGs. Embodiments include a method of patterning a photoresist material that comprises exposing the photoresist material with ultraviolet radiation. The method may also comprise, performing a first post exposure bake at a first temperature, that is less than the activation temperature needed to deblock blocking groups from the MGs, and performing a second post exposure bake at a second temperature that is approximately equal to or greater than the activation temperature needed to deblock blocking groups from the MGs.
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公开(公告)号:US20170345643A1
公开(公告)日:2017-11-30
申请号:US15529482
申请日:2014-12-24
Applicant: INTEL CORPORATION
Inventor: Todd R. YOUNKIN , Michael J. LEESON , James M. BLACKWELL , Ernisse S. PUTNA , Marie KRYSAK , Rami HOURANI , Eungnak HAN , Robert L. BRISTOL
IPC: H01L21/027 , H01L21/768 , H01L23/528
CPC classification number: H01L21/0271 , G03F7/0035 , G03F7/094 , G03F7/095 , G03F7/115 , H01L21/76801 , H01L21/76816 , H01L21/76897 , H01L23/528 , H01L2224/16225
Abstract: Photodefinable alignment layers for chemical assisted patterning and approaches for forming photodefinable alignment layers for chemical assisted patterning are described. An embodiment of the invention may include disposing a chemically amplified resist (CAR) material over a hardmask that includes a switch component. The CAR material may then be exposed to form exposed resist portions. The exposure may produces acid in the exposed portions of the CAR material that interact with the switch component to form modified regions of the hardmask material below the exposed resist portions.
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公开(公告)号:US20220262722A1
公开(公告)日:2022-08-18
申请号:US17735006
申请日:2022-05-02
Applicant: Intel Corporation
Inventor: Richard E. SCHENKER , Robert L. BRISTOL , Kevin L. LIN , Florian GSTREIN , James M. BLACKWELL , Marie KRYSAK , Manish CHANDHOK , Paul A. NYHUS , Charles H. WALLACE , Curtis W. WARD , Swaminathan SIVAKUMAR , Elliot N. TAN
IPC: H01L23/528 , H01L23/522 , H01L23/532 , H01L27/088 , H01L29/78
Abstract: Advanced lithography techniques including sub-10 nm pitch patterning and structures resulting therefrom are described. Self-assembled devices and their methods of fabrication are described.
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17.
公开(公告)号:US20220229364A1
公开(公告)日:2022-07-21
申请号:US17712953
申请日:2022-04-04
Applicant: Intel Corporation
Inventor: Marie KRYSAK , James M. BLACKWELL , Robert L. BRISTOL , Florian GSTREIN
Abstract: A photosensitive composition including metal nanoparticles capped with an organic ligand, wherein the metal particles includes a metal that absorbs light in the extreme ultraviolet spectrum. A method including synthesizing metal particles including a diameter of 5 nanometers or less, wherein the metal particles includes a metal that absorbs light in the extreme ultraviolet spectrum; and capping the metal particles with an organic ligand. A method including depositing a photosensitive composition on a semiconductor substrate, wherein the photosensitive composition includes metal nanoparticles capped with an organic ligand and the nanoparticles include a metal that absorbs light in the extreme ultraviolet spectrum; exposing the photosensitive composition to light in an ultraviolet spectrum through a mask including a pattern; and transferring the mask pattern to the photosensitive composition.
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公开(公告)号:US20220216065A1
公开(公告)日:2022-07-07
申请号:US17701367
申请日:2022-03-22
Applicant: Intel Corporation
Inventor: Robert L. BRISTOL , Marie KRYSAK , James M. BLACKWELL , Florian GSTREIN , Kent N. FRASURE
IPC: H01L21/311 , G03F7/004 , G03F7/039 , G03F7/20 , G03F7/38 , H01L21/027 , H01L21/033 , H01L21/768
Abstract: Two-stage bake photoresists with releasable quenchers for fabricating back end of line (BEOL) interconnects are described. In an example, a photolyzable composition includes an acid-deprotectable photoresist material having substantial transparency at a wavelength, a photo-acid-generating (PAG) component having substantial transparency at the wavelength, and a base-generating component having substantial absorptivity at the wavelength.
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公开(公告)号:US20190385897A1
公开(公告)日:2019-12-19
申请号:US16463816
申请日:2016-12-28
Applicant: INTEL CORPORATION
Inventor: Manish CHANDHOK , Sudipto NASKAR , Stephanie A. BOJARSKI , Kevin LIN , Marie KRYSAK , Tristan A. TRONIC , Hui Jae YOO , Jeffery D. BIELEFELD , Jessica M. TORRES
IPC: H01L21/768 , H01L23/528 , H01L23/532
Abstract: An integrated circuit die, a semiconductor structure, and a method of fabricating the semiconductor structure are disclosed. The integrated circuit die includes a substrate and a first anchor and a second anchor disposed on the substrate in a first plane. The integrated circuit die also includes a first wire disposed on the first anchor in the first plane, a third wire disposed on the second anchor in the first plane, and a second wire and a fourth wire suspended above the substrate in the first plane. The second wire is disposed between the first wire and the third wire and the third wire is disposed between the second wire and the fourth wire. The integrated circuit die further includes a dielectric material disposed between upper portions of the first wire, the second wire, the third wire, and the fourth wire to encapsulate an air gap.
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20.
公开(公告)号:US20190302615A1
公开(公告)日:2019-10-03
申请号:US16316594
申请日:2016-09-30
Applicant: Intel Corporation
Inventor: Marie KRYSAK , James M. BLACKWELL , Robert L. BRISTOL , Florian GSTREIN
Abstract: A photosensitive composition including metal nanoparticles capped with an organic ligand, wherein the metal particles includes a metal that absorbs light in the extreme ultraviolet spectrum. A method including synthesizing metal particles including a diameter of 5 nanometers or less, wherein the metal particles includes a metal that absorbs light in the extreme ultraviolet spectrum; and capping the metal particles with an organic ligand. A method including depositing a photosensitive composition on a semiconductor substrate, wherein the photosensitive composition includes metal nanoparticles capped with an organic ligand and the nanoparticles include a metal that absorbs light in the extreme ultraviolet spectrum; exposing the photosensitive composition to light in an ultraviolet spectrum through a mask including a pattern; and transferring the mask pattern to the photosensitive composition.
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