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公开(公告)号:US09418876B2
公开(公告)日:2016-08-16
申请号:US13224575
申请日:2011-09-02
申请人: Jing-Cheng Lin , Weng-Jin Wu , Shih Ting Lin , Cheng-Lin Huang , Szu Wei Lu , Shin-Puu Jeng , Chen-Hua Yu
发明人: Jing-Cheng Lin , Weng-Jin Wu , Shih Ting Lin , Cheng-Lin Huang , Szu Wei Lu , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: H01L21/00 , H01L21/56 , H01L21/683 , H01L25/065 , H01L23/00
CPC分类号: H01L21/78 , H01L21/561 , H01L21/563 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L24/16 , H01L25/0652 , H01L2221/68327 , H01L2224/16235 , H01L2224/73204 , H01L2224/81005 , H01L2224/81193 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2224/81
摘要: A method of fabricating a three-dimensional integrated circuit comprises attaching a wafer to a carrier, mounting a plurality of semiconductor dies on top of the wafer to form a wafer stack. The method further comprises forming a molding compound layer on top of the wafer, attaching the wafer stack to a tape frame and dicing the wafer stack to separate the wafer stack into a plurality of individual packages.
摘要翻译: 制造三维集成电路的方法包括将晶片附着到载体上,将多个半导体管芯安装在晶片的顶部上以形成晶片堆叠。 该方法还包括在晶片的顶部上形成模塑复合层,将晶片堆叠连接到胶带框架上,并切割晶片堆叠以将晶片堆叠分离成多个单独的封装。
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公开(公告)号:US20130056865A1
公开(公告)日:2013-03-07
申请号:US13224575
申请日:2011-09-02
申请人: Jing-Cheng Lin , Weng-Jin Wu , Shih Ting Lin , Cheng-Lin Huang , Szu Wei Lu , Shin-Puu Jeng , Chen-Hua Yu
发明人: Jing-Cheng Lin , Weng-Jin Wu , Shih Ting Lin , Cheng-Lin Huang , Szu Wei Lu , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: H01L21/78 , H01L23/498
CPC分类号: H01L21/78 , H01L21/561 , H01L21/563 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L24/16 , H01L25/0652 , H01L2221/68327 , H01L2224/16235 , H01L2224/73204 , H01L2224/81005 , H01L2224/81193 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2224/81
摘要: A method of fabricating a three-dimensional integrated circuit comprises attaching a wafer to a carrier, mounting a plurality of semiconductor dies on top of the wafer to form a wafer stack. The method further comprises forming a molding compound layer on top of the wafer, attaching the wafer stack to a tape frame and dicing the wafer stack to separate the wafer stack into a plurality of individual packages.
摘要翻译: 制造三维集成电路的方法包括将晶片附着到载体上,将多个半导体管芯安装在晶片的顶部上以形成晶片堆叠。 该方法还包括在晶片的顶部上形成模塑复合层,将晶片堆叠连接到胶带框架上,并切割晶片堆叠以将晶片堆叠分离成多个单独的封装。
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公开(公告)号:US20120045611A1
公开(公告)日:2012-02-23
申请号:US12858211
申请日:2010-08-17
申请人: Ying-Ching Shih , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人: Ying-Ching Shih , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: H01L23/12 , B32B3/24 , B32B3/26 , B32B38/10 , H01L21/50 , B32B37/02 , B32B37/12 , B32B17/06 , B32B7/12
CPC分类号: G07F17/3213 , B32B17/10 , B32B37/1207 , B32B37/182 , B32B37/185 , B32B2457/14 , H01L21/6835 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381
摘要: A composite carrier structure for manufacturing semiconductor devices is provided. The composite carrier structure utilizes multiple carrier substrates, e.g., glass or silicon substrates, coupled together by interposed adhesive layers. The composite carrier structure may be attached to a wafer or a die for, e.g., backside processing, such as thinning processes. In an embodiment, the composite carrier structure comprises a first carrier substrate having through-substrate vias formed therethrough. The first substrate is attached to a second substrate using an adhesive such that the adhesive may extend into the through-substrate vias.
摘要翻译: 提供了一种用于制造半导体器件的复合载体结构。 复合载体结构利用多个载体衬底,例如玻璃或硅衬底,通过插入的粘合剂层耦合在一起。 复合载体结构可以附接到晶片或模具,用于例如背面处理,例如变薄处理。 在一个实施例中,复合载体结构包括具有贯穿其中形成的贯通基板通孔的第一载体基板。 使用粘合剂将第一衬底附接到第二衬底,使得粘合剂可以延伸到贯穿衬底通孔中。
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公开(公告)号:US08846499B2
公开(公告)日:2014-09-30
申请号:US12858211
申请日:2010-08-17
申请人: Ying-Ching Shih , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人: Ying-Ching Shih , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: H01L21/30
CPC分类号: G07F17/3213 , B32B17/10 , B32B37/1207 , B32B37/182 , B32B37/185 , B32B2457/14 , H01L21/6835 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381
摘要: A composite carrier structure for manufacturing semiconductor devices is provided. The composite carrier structure utilizes multiple carrier substrates, e.g., glass or silicon substrates, coupled together by interposed adhesive layers. The composite carrier structure may be attached to a wafer or a die for, e.g., backside processing, such as thinning processes. In an embodiment, the composite carrier structure comprises a first carrier substrate having through-substrate vias formed therethrough. The first substrate is attached to a second substrate using an adhesive such that the adhesive may extend into the through-substrate vias.
摘要翻译: 提供了一种用于制造半导体器件的复合载体结构。 复合载体结构利用多个载体衬底,例如玻璃或硅衬底,通过插入的粘合剂层耦合在一起。 复合载体结构可以附接到晶片或模具,用于例如背面处理,例如变薄处理。 在一个实施例中,复合载体结构包括具有贯穿其中形成的贯通基板通孔的第一载体基板。 使用粘合剂将第一衬底附接到第二衬底,使得粘合剂可以延伸到贯穿衬底通孔中。
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公开(公告)号:US20130115854A1
公开(公告)日:2013-05-09
申请号:US13290879
申请日:2011-11-07
申请人: Yi-Chao Mao , Jui-Pin Hung , Jing-Cheng Lin , Shin-Puu Jeng , Chen-Hua Yu
发明人: Yi-Chao Mao , Jui-Pin Hung , Jing-Cheng Lin , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: B24B49/10
CPC分类号: H01L22/26 , B24B7/228 , B24B37/013 , B24B49/10 , H01L22/12 , H01L23/3114 , H01L2924/0002 , H01L2924/00
摘要: A method for performing grinding includes selecting a target wheel loading for wafer grinding processes, and performing a grinding process on a wafer. With the proceeding of the grinding process, wheel loadings of the grinding process are measured. The grinding process is stopped after the target wheel loading is reached. The method alternatively includes selecting a target reflectivity of wafer grinding processes, and performing a grinding process on a wafer. With a proceeding of the grinding process, reflectivities of a light reflected from a surface of the wafer are measured. The grinding process is stopped after one of the reflectivities reaches the target reflectivity.
摘要翻译: 执行磨削的方法包括:选择用于晶片研磨工艺的目标轮加载,以及对晶片进行研磨处理。 随着研磨过程的进行,测量研磨过程的轮载荷。 在达到目标轮加载后停止研磨过程。 该方法或者包括选择晶片研磨过程的目标反射率,以及对晶片进行研磨处理。 随着研磨过程的进行,测量从晶片表面反射的光的反射率。 在一个反射率达到目标反射率之后停止研磨过程。
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公开(公告)号:US09960088B2
公开(公告)日:2018-05-01
申请号:US13290879
申请日:2011-11-07
申请人: Yi-Chao Mao , Jui-Pin Hung , Jing-Cheng Lin , Shin-Puu Jeng , Chen-Hua Yu
发明人: Yi-Chao Mao , Jui-Pin Hung , Jing-Cheng Lin , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: B24B49/10 , H01L21/66 , B24B37/013 , B24B7/22 , H01L23/31
CPC分类号: H01L22/26 , B24B7/228 , B24B37/013 , B24B49/10 , H01L22/12 , H01L23/3114 , H01L2924/0002 , H01L2924/00
摘要: A method for performing grinding includes selecting a target wheel loading for wafer grinding processes, and performing a grinding process on a wafer. With the proceeding of the grinding process, wheel loadings of the grinding process are measured. The grinding process is stopped after the target wheel loading is reached. The method alternatively includes selecting a target reflectivity of wafer grinding processes, and performing a grinding process on a wafer. With a proceeding of the grinding process, reflectivities of a light reflected from a surface of the wafer are measured. The grinding process is stopped after one of the reflectivities reaches the target reflectivity.
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公开(公告)号:US20130087951A1
公开(公告)日:2013-04-11
申请号:US13270957
申请日:2011-10-11
申请人: Jing-Cheng Lin , Hsien-Wen Liu , Jui-Pin Hung , Shin-Puu Jeng , Chen-Hua Yu
发明人: Jing-Cheng Lin , Hsien-Wen Liu , Jui-Pin Hung , Shin-Puu Jeng , Chen-Hua Yu
CPC分类号: B29C35/0805 , B29C2035/0855 , H01L21/565 , H05B6/6491 , H05B6/806
摘要: An embodiment is a molding chamber. The molding chamber comprises a mold-conforming chase, a substrate-base chase, a first radiation permissive component, and a microwave generator coupled to a first waveguide. The mold-conforming chase is over the substrate-base chase, and the mold-conforming chase is moveable in relation to the substrate-base chase. The first radiation permissive component is in one of the mold-conforming chase or the substrate-base chase. The microwave generator and the first waveguide are together operable to direct microwave radiation through the first radiation permissive component.
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公开(公告)号:US20130001776A1
公开(公告)日:2013-01-03
申请号:US13170973
申请日:2011-06-28
申请人: Chen-Hua Yu , Jing-Cheng Lin , Nai-Wei Liu , Jui-Pin Hung , Shin-Puu Jeng
发明人: Chen-Hua Yu , Jing-Cheng Lin , Nai-Wei Liu , Jui-Pin Hung , Shin-Puu Jeng
IPC分类号: H01L23/485 , H01L21/28
CPC分类号: H01L21/4853 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/78 , H01L23/3128 , H01L23/481 , H01L23/49838 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/05008 , H01L2224/05569 , H01L2224/05572 , H01L2224/12105 , H01L2224/13022 , H01L2224/13025 , H01L2224/131 , H01L2224/13147 , H01L2224/73267 , H01L2224/94 , H01L2224/96 , H01L2924/00014 , H01L2924/01029 , H01L2924/0132 , H01L2924/014 , H01L2924/181 , H01L2224/19 , H01L2224/11 , H01L2224/03 , H01L2224/05552 , H01L2924/00 , H01L2224/214
摘要: A package includes a device die having a substrate. A molding compound contacts a sidewall of the substrate. A metal pad is over the substrate. A passivation layer has a portion covering an edge portion of the metal pad. A metal pillar is over and contacting the metal pad. A dielectric layer is over the passivation layer. A package material formed of a molding compound or a polymer is over the dielectric layer. The dielectric layer includes a bottom portion between the passivation layer and the package material, and a sidewall portion between a sidewall of the metal pillar and a sidewall of the package material. A polymer layer is over the package material, the molding compound, and the metal pillar. A post-passivation interconnect (PPI) extends into the polymer layer. A solder ball is over the PPI, and is electrically coupled to the metal pad through the PPI.
摘要翻译: 封装包括具有基板的器件裸片。 模塑料与基材的侧壁接触。 金属焊盘在基板上。 钝化层具有覆盖金属焊盘的边缘部分的部分。 金属支柱已经过去并与金属垫接触。 介电层位于钝化层的上方。 由模塑料或聚合物形成的包装材料在电介质层的上面。 电介质层包括位于钝化层和封装材料之间的底部,以及在金属柱的侧壁和封装材料的侧壁之间的侧壁部分。 聚合物层在包装材料,模塑料和金属支柱之上。 后钝化互连(PPI)延伸到聚合物层中。 焊球在PPI上方,并通过PPI电耦合到金属焊盘。
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公开(公告)号:US08829676B2
公开(公告)日:2014-09-09
申请号:US13170973
申请日:2011-06-28
申请人: Chen-Hua Yu , Jing-Cheng Lin , Nai-Wei Liu , Jui-Pin Hung , Shin-Puu Jeng
发明人: Chen-Hua Yu , Jing-Cheng Lin , Nai-Wei Liu , Jui-Pin Hung , Shin-Puu Jeng
IPC分类号: H01L23/485
CPC分类号: H01L21/4853 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/78 , H01L23/3128 , H01L23/481 , H01L23/49838 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/05008 , H01L2224/05569 , H01L2224/05572 , H01L2224/12105 , H01L2224/13022 , H01L2224/13025 , H01L2224/131 , H01L2224/13147 , H01L2224/73267 , H01L2224/94 , H01L2224/96 , H01L2924/00014 , H01L2924/01029 , H01L2924/0132 , H01L2924/014 , H01L2924/181 , H01L2224/19 , H01L2224/11 , H01L2224/03 , H01L2224/05552 , H01L2924/00 , H01L2224/214
摘要: A package includes a device die having a substrate. A molding compound contacts a sidewall of the substrate. A metal pad is over the substrate. A passivation layer has a portion covering an edge portion of the metal pad. A metal pillar is over and contacting the metal pad. A dielectric layer is over the passivation layer. A package material formed of a molding compound or a polymer is over the dielectric layer. The dielectric layer includes a bottom portion between the passivation layer and the package material, and a sidewall portion between a sidewall of the metal pillar and a sidewall of the package material. A polymer layer is over the package material, the molding compound, and the metal pillar. A post-passivation interconnect (PPI) extends into the polymer layer. A solder ball is over the PPI, and is electrically coupled to the metal pad through the PPI.
摘要翻译: 封装包括具有基板的器件裸片。 模塑料与基材的侧壁接触。 金属焊盘在基板上。 钝化层具有覆盖金属焊盘的边缘部分的部分。 金属支柱已经过去并与金属垫接触。 介电层位于钝化层的上方。 由模塑料或聚合物形成的包装材料在电介质层的上面。 电介质层包括位于钝化层和封装材料之间的底部,以及在金属柱的侧壁和封装材料的侧壁之间的侧壁部分。 聚合物层在包装材料,模塑料和金属支柱之上。 后钝化互连(PPI)延伸到聚合物层中。 焊球在PPI上方,并通过PPI电耦合到金属焊盘。
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公开(公告)号:US20130049195A1
公开(公告)日:2013-02-28
申请号:US13215959
申请日:2011-08-23
申请人: Chih-Wei Wu , Szu Wei Lu , Jing-Cheng Lin , Shin-Puu Jeng , Chen-Hua Yu
发明人: Chih-Wei Wu , Szu Wei Lu , Jing-Cheng Lin , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: H01L23/488 , H01L21/78
CPC分类号: H01L21/78 , H01L21/561 , H01L23/3128 , H01L23/49816 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/48 , H01L24/81 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05025 , H01L2224/05026 , H01L2224/05572 , H01L2224/13022 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/13155 , H01L2224/1403 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/48145 , H01L2224/48227 , H01L2224/73204 , H01L2224/81193 , H01L2224/83104 , H01L2224/9202 , H01L2224/94 , H01L2224/97 , H01L2225/06506 , H01L2225/06513 , H01L2225/06541 , H01L2225/06568 , H01L2924/00014 , H01L2924/01029 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , Y02P80/30 , H01L2924/00 , H01L2224/81 , H01L2224/11 , H01L2924/00012 , H01L2924/014 , H01L2224/85 , H01L2224/05552 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A method includes performing a laser grooving to remove a dielectric material in a wafer to form a trench, wherein the trench extends from a top surface of the wafer to stop at an intermediate level between the top surface and a bottom surface of the wafer. The trench is in a scribe line between two neighboring chips in the wafer. A polymer is filled into the trench and then cured. After the step of curing the polymer, a die saw is performed to separate the two neighboring chips, wherein a kerf line of the die saw cuts through a portion of the polymer filled in the trench.
摘要翻译: 一种方法包括执行激光切槽以去除晶片中的电介质材料以形成沟槽,其中沟槽从晶片的顶表面延伸以在晶片的顶表面和底表面之间的中间水平处停止。 沟槽在晶片中的两个相邻芯片之间的划线中。 将聚合物填充到沟槽中,然后固化。 在固化聚合物的步骤之后,执行模锯以分离两个相邻的芯片,其中模具的切口线切割填充在沟槽中的聚合物的一部分。
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