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    Inexpensive method of fabricating a higher performance capacitance density MIMcap integrable into a copper interconnect scheme
    12.
    发明授权
    Inexpensive method of fabricating a higher performance capacitance density MIMcap integrable into a copper interconnect scheme 有权
    制造更高性能的电容密度MIMcap的廉价方法可以集成到铜互连方案中

    公开(公告)号：US07282404B2

    公开(公告)日：2007-10-16

    申请号：US10709829

    申请日：2004-06-01

    申请人： Douglas D. Coolbaugh ,  Ebenezer E. Eshun ,  Zhong-Xiang He ,  William J. Murphy ,  Vidhya Ramachandran

    发明人： Douglas D. Coolbaugh ,  Ebenezer E. Eshun ,  Zhong-Xiang He ,  William J. Murphy ,  Vidhya Ramachandran

    IPC分类号： H01L21/8242

    CPC分类号： H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method to integrate MIM capacitors into conductive interconnect levels, with low cost impact, and high yield, reliability and performance than existing integration methods is provided. This is accomplished by recessing a prior level dielectric for MIM capacitor level alignment followed by deposition and patterning of the MIM capacitor films. Specifically, the method includes providing a substrate including a wiring level, the wiring level comprising at least one conductive interconnect formed in a dielectric layer; selectively removing a portion of the dielectric layer to recess the dielectric layer below an upper surface of the at least one conductive interconnect; forming a dielectric stack upon the at least one conductive interconnect and the recessed dielectric layer; and forming a metal-insulator-metal (MIM) capacitor on the dielectric stack. The MIM capacitor includes a bottom plate electrode, a dielectric and a top plate electrode. The bottom and top plate electrodes can comprise the same or different conductive metal.

    摘要翻译： 提供了一种将MIM电容器集成到导电互连级别中的方法，具有低成本影响，并且提供了比现有集成方法高的产量，可靠性和性能。 这通过将用于MIM电容器电平对准的先前级别的电介质凹入，然后MIM电容器膜的沉积和图案化来实现。 具体地，该方法包括提供包括布线层的衬底，所述布线层包括形成在电介质层中的至少一个导电布线; 选择性地去除所述电介质层的一部分以使所述电介质层在所述至少一个导电互连的上表面下方凹陷; 在所述至少一个导电互连和所述凹入的介电层上形成电介质叠层; 以及在介电叠层上形成金属绝缘体金属（MIM）电容器。 MIM电容器包括底板电极，电介质和顶板电极。 底板和顶板电极可以包括相同或不同的导电金属。

    Inexpensive method of fabricating a higher performance capacitance density MIMcap integrable into a copper interconnect scheme
    14.
    发明授权
    Inexpensive method of fabricating a higher performance capacitance density MIMcap integrable into a copper interconnect scheme 失效
    制造更高性能的电容密度MIMcap的廉价方法可以集成到铜互连方案中

    公开(公告)号：US07687867B2

    公开(公告)日：2010-03-30

    申请号：US11846248

    申请日：2007-08-28

    申请人： Douglas D. Coolbaugh ,  Ebenezer E. Eshun ,  Zhong-Xiang He ,  William J. Murphy ,  Vidhya Ramachandran

    发明人： Douglas D. Coolbaugh ,  Ebenezer E. Eshun ,  Zhong-Xiang He ,  William J. Murphy ,  Vidhya Ramachandran

    IPC分类号： H01L29/72

    CPC分类号： H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method to integrate MIM capacitors into conductive interconnect levels, with low cost impact, and high yield, reliability and performance than existing integration methods is provided. This is accomplished by recessing a prior level dielectric for MIM capacitor level alignment followed by deposition and patterning of the MIM capacitor films. Specifically, the method includes providing a substrate including a wiring level, the wiring level comprising at least one conductive interconnect formed in a dielectric layer; selectively removing a portion of the dielectric layer to recess the dielectric layer below an upper surface of the at least one conductive interconnect; forming a dielectric stack upon the at least one conductive interconnect and the recessed dielectric layer; and forming a metal-insulator-metal (MIM) capacitor on the dielectric stack. The MIM capacitor includes a bottom plate electrode, a dielectric and a top plate electrode. The bottom and top plate electrodes can comprise the same or different conductive metal.

    摘要翻译： 提供了一种将MIM电容器集成到导电互连级别中的方法，具有低成本影响，并且提供了比现有集成方法高的产量，可靠性和性能。 这通过将用于MIM电容器电平对准的先前级别的电介质凹入，然后MIM电容器膜的沉积和图案化来实现。 具体地，该方法包括提供包括布线层的衬底，所述布线层包括形成在电介质层中的至少一个导电布线; 选择性地去除所述电介质层的一部分以使所述电介质层在所述至少一个导电互连的上表面下方凹陷; 在所述至少一个导电互连和所述凹入的介电层上形成电介质叠层; 以及在介电叠层上形成金属绝缘体金属（MIM）电容器。 MIM电容器包括底板电极，电介质和顶板电极。 底板和顶板电极可以包括相同或不同的导电金属。

    Method of forming refractory metal contact in an opening, and resulting structure
    15.
    发明授权
    Method of forming refractory metal contact in an opening, and resulting structure 失效
    在开口中形成难熔金属接触的方法，以及结果

    公开(公告)号：US06900505B2

    公开(公告)日：2005-05-31

    申请号：US10709174

    申请日：2004-04-19

    申请人： Jonanthan D. Chapple-Sokol ,  Randy W. Mann ,  William J. Murphy ,  Jed H. Rankin ,  Daniel S. Vanslette

    发明人： Jonanthan D. Chapple-Sokol ,  Randy W. Mann ,  William J. Murphy ,  Jed H. Rankin ,  Daniel S. Vanslette

    IPC分类号： C23C28/00 ,  H01L31/119

    CPC分类号： C23C28/00 ,  Y10T428/12

    摘要： A structure which ensures against deterioration of an underlying silicide layer over which a refractory material layer is deposited by physical vapor deposition (PVD) or chemical vapor deposition (CVD) is realized by first providing a continuous polysilicon layer prior to the refractory material deposition. The continuous polysilicon layer, preferably no thicker than 50 Å, serves a sacrificial purpose and prevents damage to an underlying silicide layer by blocking interaction between any fluorine and the underlying silicide that is released when the refractory material is formed.

    摘要翻译： 通过首先在耐火材料沉积之前提供连续的多晶硅层，来实现通过物理气相沉积（PVD）或化学气相沉积（CVD）来确保防止耐火材料层沉积下层硅化物层的劣化的结构。 连续多晶硅层优选不大于50，用于牺牲目的，并且通过阻止在形成耐火材料时释放的任何氟和下面的硅化物之间的相互作用来防止对下面的硅化物层的损伤。

    Sputtered tungsten diffusion barrier for improved interconnect robustness
    17.
    发明授权
    Sputtered tungsten diffusion barrier for improved interconnect robustness 有权
    溅射钨扩散屏障，提高互连鲁棒性

    公开(公告)号：US06245668B1

    公开(公告)日：2001-06-12

    申请号：US09157012

    申请日：1998-09-18

    申请人： Stephen B. Brodsky ,  William J. Murphy ,  Matthew J. Rutten ,  David C. Strippe ,  Daniel S. Vanslette

    发明人： Stephen B. Brodsky ,  William J. Murphy ,  Matthew J. Rutten ,  David C. Strippe ,  Daniel S. Vanslette

    IPC分类号： H01L214763

    CPC分类号： H01L21/76843 ,  C23C14/046 ,  C23C14/165 ,  C23C14/564 ,  H01L21/2855 ,  H01L21/76876

    摘要： A method of forming inter-level contacts or vias between metal layers using a tungsten film deposited into the via using non-collimated sputter deposition. The sputter chamber is configured with a pressure of about 1 mTorr to about 10 mTorr with an inert gas flow of at least at least 25 cm3/min to about 150 cm3/min. Shielding inside the chamber is coated with a material, preferably, aluminum oxide, that promotes adhesion of tungsten to the shielding. An adhesion layer of titanium may be included prior to deposition of the tungsten film. Non-collimated sputter deposition increases the target to substrate distance inside the sputter chamber; reduces the heating effect associated with traditional collimated sputtering; and provides more robust diffusion barriers.

    摘要翻译： 在金属层之间使用非平行溅射沉积沉积在通孔中的钨膜形成层间接触或通孔的方法。 溅射室配置有约1mTorr至约10mTorr的压力，惰性气流至少为25cm 3 / min至约150cm 3 / min。 在室内的屏蔽被涂覆有材料，优选氧化铝，其促进钨粘附到屏蔽层上。 在沉积钨膜之前可以包括钛的粘附层。 非准直的溅射沉积将目标增加到溅射室内的衬底距离; 降低与传统准直溅射相关的加热效应; 并提供更强大的扩散屏障。

    Electrical fuse with a current shunt
    18.
    发明授权
    Electrical fuse with a current shunt 有权
    电保险丝与电流分路

    公开(公告)号：US08586466B2

    公开(公告)日：2013-11-19

    申请号：US12967308

    申请日：2010-12-14

    申请人： Tom C. Lee ,  Thomas L. McDevitt ,  William J. Murphy

    发明人： Tom C. Lee ,  Thomas L. McDevitt ,  William J. Murphy

    IPC分类号： H01L21/44

    CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Electrical fuses and methods for forming an electrical fuse. The electrical fuse includes a current shunt formed by patterning a first layer comprised of a first conductive material and disposed on a top surface of a dielectric layer. A layer stack is formed on the current shunt and the top surface of the dielectric layer surrounding the current shunt. The layer stack includes a second layer comprised of a second conductive material and a third layer comprised of a third conductive material. The layer stack may be patterned to define a fuse link as a first portion of the layer stack directly contacting the top surface of the dielectric layer and a terminal as a second portion separated from the top surface of the dielectric layer by the current shunt.

    摘要翻译： 电熔丝和形成电熔丝的方法。 电熔丝包括通过图案化由第一导电材料构成的第一层并且设置在电介质层的顶表面上而形成的电流分流器。 在电流分路上形成层叠层，并且在电流分路周围形成介电层的顶表面。 层叠包括由第二导电材料构成的第二层和由第三导电材料构成的第三层。 层叠体可以被图案化以限定作为层叠体的第一部分的熔丝链，其直接接触电介质层的顶表面，并且通过电流分路与端子作为与电介质层的顶表面分离的第二部分。

    ELECTRICAL FUSE WITH A CURRENT SHUNT
    19.
    发明申请
    ELECTRICAL FUSE WITH A CURRENT SHUNT 有权
    电流保险丝与电流分流器

    公开(公告)号：US20120146179A1

    公开(公告)日：2012-06-14

    申请号：US12967308

    申请日：2010-12-14

    申请人： Tom C. Lee ,  Thomas L. McDevitt ,  William J. Murphy

    发明人： Tom C. Lee ,  Thomas L. McDevitt ,  William J. Murphy

    IPC分类号： H01L23/62 ,  H01L21/768

    CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Electrical fuses and methods for forming an electrical fuse. The electrical fuse includes a current shunt formed by patterning a first layer comprised of a first conductive material and disposed on a top surface of a dielectric layer. A layer stack is formed on the current shunt and the top surface of the dielectric layer surrounding the current shunt. The layer stack includes a second layer comprised of a second conductive material and a third layer comprised of a third conductive material. The layer stack may be patterned to define a fuse link as a first portion of the layer stack directly contacting the top surface of the dielectric layer and a terminal as a second portion separated from the top surface of the dielectric layer by the current shunt.

    摘要翻译： 电熔丝和形成电熔丝的方法。 电熔丝包括通过图案化由第一导电材料构成的第一层并且设置在电介质层的顶表面上而形成的电流分流器。 在电流分路上形成层叠层，并且在电流分路周围形成介电层的顶表面。 层叠包括由第二导电材料构成的第二层和由第三导电材料构成的第三层。 层叠体可以被图案化以限定作为层叠体的第一部分的熔丝链，其直接接触电介质层的顶表面，并且通过电流分路与端子作为与电介质层的顶表面分离的第二部分。