公开(公告)号：US20080246142A1

公开(公告)日：2008-10-09

申请号：US12080798

申请日：2008-04-04

申请人： Jeng-Yuan Lai ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

发明人： Jeng-Yuan Lai ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/367

CPC分类号： H01L23/4334 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A heat dissipation unit and a semiconductor package having the same are disclosed. The semiconductor package includes a carrier; an electronic component mounted on and electrically connected to the carrier; a heat dissipation unit, which includes a flat section attached to the electronic component, extension sections connected to the flat section, and a heat dissipation section connected to the extension sections; and an encapsulant encapsulating the electronic component and the heat dissipation unit, wherein stress releasing sections are at least disposed at intersectional corners between the extension sections and the flat section so as to prevent projections from being formed by concentrated stresses in a punching process of the heat dissipation unit, thereby maintaining flatness of the flat section and further preventing circuits of the electronic component from being damaged due to a contact point produced between the electronic component and the flat section in a molding process.

摘要翻译： 公开了一种散热单元和具有该散热单元的半导体封装。 半导体封装包括载体; 电子部件，其安装在所述载体上并与其电连接; 散热单元，其包括附接到所述电子部件的平坦部分，连接到所述平坦部分的延伸部分和连接到所述延伸部分的散热部分; 以及封装电子部件和散热部的密封剂，其中应力释放部至少设置在延伸部和平坦部之间的交叉角处，以防止在热冲压加工中由于集中应力而形成突起 从而保持平坦部分的平坦度，并且进一步防止电子部件的电路在模制过程中由于在电子部件和平坦部分之间产生的接触点而损坏。

公开(公告)号：US20080160678A1

公开(公告)日：2008-07-03

申请号：US11657834

申请日：2007-01-24

申请人： Yu-Po Wang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Yu-Po Wang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/60

CPC分类号： H01L23/49822 ,  H01L21/561 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/73215 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package and a method for fabricating the same are proposed. A substrate having a first circuit layer, a second circuit layer, and a core layer formed between the first and second circuit layers is provided. At least one second opening is formed on the second circuit layer. At least one first opening is formed on the first circuit layer corresponding to the second opening. A plurality of finger holes corresponding to bond fingers on the first circuit layer are formed in the core layer. A through opening is formed in the core layer and communicates with the first and second openings. At least one chip is mounted on the first circuit layer and covers the first opening, with its active surface being exposed to the first opening. An encapsulant is formed to fill the first and second openings and the through opening and encapsulate the chip.

摘要翻译： 提出了一种半导体封装及其制造方法。 提供了具有形成在第一和第二电路层之间的第一电路层，第二电路层和芯层的衬底。 在第二电路层上形成至少一个第二开口。 在对应于第二开口的第一电路层上形成至少一个第一开口。 在芯层中形成与第一电路层上的接合指状对应的多个指孔。 在芯层中形成通孔，并与第一和第二开口连通。 至少一个芯片安装在第一电路层上并且覆盖第一开口，其有源表面暴露于第一开口。 形成密封剂以填充第一和第二开口和通孔并封装芯片。

公开(公告)号：US20070096336A1

公开(公告)日：2007-05-03

申请号：US11411740

申请日：2006-04-25

申请人： Wen-Hao Lee ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

发明人： Wen-Hao Lee ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/48

CPC分类号： H01L21/563 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83051 ,  H01L2224/83102 ,  H01L2224/83385 ,  H01L2224/83951 ,  H01L2224/92125 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor package and a substrate structure thereof are provided. A solder mask layer applied on the substrate structure is formed with outwardly extended openings corresponding to corner portions of a chip mounting area of the substrate structure. When a flip-chip semiconductor chip is mounted on the chip mounting area and an underfilling process is performed, an underfill material can fill a gap between the flip-chip semiconductor chip and the substrate structure, and effectively fill the outwardly extended openings of the solder mask layer corresponding to the corner portions of the chip mounting area so as to provide sufficient protection for corners of the flip-chip semiconductor chip and prevent delamination at the corners of the flip-chip semiconductor chip during a subsequent thermal cycle.

摘要翻译： 提供半导体封装及其基板结构。 施加在基板结构上的焊接掩模层形成有对应于基板结构的芯片安装区域的角部的向外延伸的开口。 当倒装芯片半导体芯片安装在芯片安装区域并执行底部填充工艺时，底部填充材料可以填充倒装芯片半导体芯片和基板结构之间的间隙，并且有效地填充焊料的向外延伸的开口 掩模层对应于芯片安装区域的角部，以便为倒装芯片半导体芯片的拐角提供足够的保护，并防止在随后的热循环期间倒装芯片半导体芯片的拐角处的分层。

公开(公告)号：US20080017983A1

公开(公告)日：2008-01-24

申请号：US11880467

申请日：2007-07-20

申请人： Yuan-Lin Tzeng ,  Nai-Hao Kao ,  Jeng-Yuan Lai ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

发明人： Yuan-Lin Tzeng ,  Nai-Hao Kao ,  Jeng-Yuan Lai ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/48

CPC分类号： H01L21/563 ,  H01L24/31 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83951 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00

摘要： The present invention discloses a flip-chip semiconductor package and a chip carrier thereof. The chip carrier includes a groove formed around a chip-mounting area. The groove may be formed along a periphery of the chip-mounting area or at corners thereof. The groove is filled with a filler of low Young's modulus so as to absorb and eliminate thermal stress, thereby preventing delamination between an underfill and a flip chip mounted on the chip-mounting area.

摘要翻译： 本发明公开了一种倒装芯片半导体封装及其芯片载体。 芯片载体包括围绕芯片安装区域形成的凹槽。 槽可以沿着芯片安装区域的周边或其拐角处形成。 凹槽填充有低杨氏模量的填料，以吸收和消除热应力，从而防止底部填充物和安装在芯片安装区域上的倒装芯片之间的分层。

公开(公告)号：US20070273026A1

公开(公告)日：2007-11-29

申请号：US11701767

申请日：2007-02-02

申请人： Hsieh-Tsung Tien ,  Wen-Jung Chiang ,  Yu-Po Wang ,  Cheng-Hsu Hsiao ,  Sen-Yen Yang

发明人： Hsieh-Tsung Tien ,  Wen-Jung Chiang ,  Yu-Po Wang ,  Cheng-Hsu Hsiao ,  Sen-Yen Yang

IPC分类号： H01L23/488

CPC分类号： H01L23/49827 ,  H01L23/64 ,  H01L2223/6638 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/114 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09636 ,  H05K2201/09718 ,  H01L2924/00

摘要： A semiconductor package substrate is provided, which includes a substrate body having a plurality of conductive through holes formed therein, wherein at least two adjacent conductive through holes are formed as a differential pair, each of which has a ball pad formed at an end thereof; and at least one electrically integrated layer formed in the substrate body, and having an opening corresponding to the two adjacent conductive through holes formed as the differential pair and the ball pads thereof. Thus, the spacing between the conductive through holes and the electrically integrated layer and the spacing between the ball pads can be enlarged by the opening, so as to balance the impedance match.

摘要翻译： 提供了一种半导体封装基板，其包括其中形成有多个导电通孔的基板主体，其中至少两个相邻的导电通孔形成为差分对，每个导体通孔在其一端形成有球垫; 以及形成在所述基板主体中的至少一个电气集成层，并且具有与形成为所述差动对的两个相邻的导电通孔对应的开口及其球垫。 因此，可以通过开口来扩大导电通孔和电气集成层之间的间隔以及球垫之间的间隔，从而平衡阻抗匹配。

公开(公告)号：US20050253284A1

公开(公告)日：2005-11-17

申请号：US10972200

申请日：2004-10-22

申请人： Yu-Po Wang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Yu-Po Wang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L23/13 ,  H01L23/28 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L23/49822 ,  H01L21/561 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/73215 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package and a method for fabricating the same are proposed. A substrate having a first circuit layer, a second circuit layer, and a core layer formed between the first and second circuit layers is provided. At least one second opening is formed on the second circuit layer. At least one first opening is formed on the first circuit layer corresponding to the second opening. A plurality of finger holes corresponding to bond fingers on the first circuit layer are formed in the core layer. A through opening is formed in the core layer and communicates with the first and second openings. At least one chip is mounted on the first circuit layer and covers the first opening, with its active surface being exposed to the first opening. An encapsulant is formed to fill the first and second openings and the through opening and encapsulate the chip.

摘要翻译： 提出了一种半导体封装及其制造方法。 提供了具有形成在第一和第二电路层之间的第一电路层，第二电路层和芯层的衬底。 在第二电路层上形成至少一个第二开口。 在对应于第二开口的第一电路层上形成至少一个第一开口。 在芯层中形成与第一电路层上的接合指状对应的多个指孔。 在芯层中形成通孔，并与第一和第二开口连通。 至少一个芯片安装在第一电路层上并且覆盖第一开口，其有源表面暴露于第一开口。 形成密封剂以填充第一和第二开口和通孔并封装芯片。

公开(公告)号：US20080277786A1

公开(公告)日：2008-11-13

申请号：US12156874

申请日：2008-06-05

申请人： Chun-Lung Chen ,  Yu-Po Wang ,  Jeng-Yuan Lai ,  Cheng-Hsu Hsiao

发明人： Chun-Lung Chen ,  Yu-Po Wang ,  Jeng-Yuan Lai ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/48

CPC分类号： H05K1/115 ,  H01L23/3677 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0206 ,  H05K1/112 ,  H05K2201/09627 ,  H05K2201/0979 ,  H05K2201/10674 ,  H01L2224/0401

摘要： A semiconductor package substrate includes a body having an upper surface and a lower surface opposite to one another, a plurality of circuit layers formed in the body, a plurality of solder pads formed on the upper surface of the body, and a plurality of solder ball pads formed on the lower surface of the body. Each of the solder pads is electrically connected to one of the solder ball pads via the circuit layers and conductive structures disposed between the circuit layers, wherein the circuit layers and conductive structures are configured to expand outwardly in a fan-out manner so as to provide more space between the circuit layers closer to the lower surface of the body such that part of the solder pad-solder ball pad electrical connections can comprise a plurality of parallel connected conductive structures formed in the space, thereby enhancing the heat conducting passageway and the effect of heat-dissipation without having to dispose more solder pads on surface of the substrate.

摘要翻译： 半导体封装基板包括具有彼此相对的上表面和下表面的主体，形成在主体中的多个电路层，形成在主体的上表面上的多个焊盘，以及多个焊球 衬垫形成在身体的下表面上。 每个焊盘通过设置在电路层之间的电路层和导电结构电连接到焊球之一，其中电路层和导电结构被配置为以扇出方式向外扩展，以便提供 电路层之间的距离更靠近主体的下表面的空间更多，使得焊料焊盘 - 焊球焊盘电连接的一部分可以包括形成在该空间中的多个平行连接的导电结构，从而增强导热通道和效果 的散热而不必在基板的表面上设置更多的焊盘。

公开(公告)号：US20080088011A1

公开(公告)日：2008-04-17

申请号：US11974441

申请日：2007-10-12

申请人： Han-Ping Hu ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

发明人： Han-Ping Hu ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/49 ,  H01L21/58

CPC分类号： H01L21/568 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor package on which a semiconductor device can be stacked and fabrication method thereof are provided. The fabrication method includes the steps of mounting and electrically connecting at least one semiconductor chip on the substrate, mounting an electrical connecting structure consisting of an upper layer circuit board and a lower layer circuit board on the substrate and electrically connecting the electrical connecting structure to the substrate, where the semiconductor chip is received in a receiving space formed in the electrical connecting structure; forming an encapsulant on the substrate encapsulating the semiconductor chip and the electrical connecting structure, and after the encapsulant is formed, exposing top surface of the upper layer circuit board with a plurality of solder pads from the encapsulant to allow at least one semiconductor device to electrically connect the upper layer circuit board so as to form a stack structure.

摘要翻译： 提供半导体器件可堆叠的半导体封装件及其制造方法。 该制造方法包括以下步骤：在基板上安装和电连接至少一个半导体芯片，将由上层电路板和下层电路板组成的电连接结构安装在基板上，并将电连接结构电连接到 衬底，其中所述半导体芯片被容纳在形成在所述电连接结构中的接收空间中; 在封装半导体芯片和电连接结构的基板上形成密封剂，并且在形成密封剂之后，用来自密封剂的多个焊盘将上层电路板的顶表面曝光，以允许至少一个半导体器件电 连接上层电路板，形成堆叠结构。

公开(公告)号：US20070181990A1

公开(公告)日：2007-08-09

申请号：US11591974

申请日：2006-11-01

申请人： Chien-Ping Huang ,  Chih-Ming Huang ,  Han-Ping Pu ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

发明人： Chien-Ping Huang ,  Chih-Ming Huang ,  Han-Ping Pu ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/02 ,  H01L21/00

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L21/565 ,  H01L23/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stacked semiconductor structure and fabrication method thereof are provided. The method includes mounting and connecting electrically a semiconductor chip to a first substrate, mounting on the first substrate a plurality of supporting members corresponding in position to a periphery of the semiconductor chip, mounting a second substrate having a first surface partially covered with a tape and a second surface opposite to the first surface on the supporting members via the second surface, connecting electrically the first and second substrates by bonding wires, forming on the first substrate an encapsulant for encapsulating the semiconductor chip, the supporting members, the second substrate, the bonding wires, and the tape with an exposed top surface, and removing the tape to expose the first surface of the second substrate and allow an electronic component to be mounted thereon. The present invention prevents reflow-induced contamination, spares a special mold, and eliminates flash.

摘要翻译： 提供了堆叠半导体结构及其制造方法。 该方法包括将半导体芯片电连接到第一基板上，在第一基板上安装多个对应于半导体芯片的周边的支撑部件，安装第二基板，该第二基板具有部分被带覆盖的第一表面， 经由第二表面与支撑构件上的第一表面相对的第二表面，通过接合线电连接第一和第二基板，在第一基板上形成用于封装半导体芯片的密封剂，支撑构件，第二基板， 接合线和具有暴露的顶表面的带，并且移除带以露出第二基板的第一表面并允许电子部件安装在其上。 本发明防止回流引起的污染，备有特殊的模具，并消除闪光。

公开(公告)号：US07205642B2

公开(公告)日：2007-04-17

申请号：US10972200

申请日：2004-10-22

申请人： Yu-Po Wang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Yu-Po Wang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/495

CPC分类号： H01L23/49822 ,  H01L21/561 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/73215 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package and a method for fabricating the same are proposed. A substrate having a first circuit layer, a second circuit layer, and a core layer formed between the first and second circuit layers is provided. At least one second opening is formed on the second circuit layer. At least one first opening is formed on the first circuit layer corresponding to the second opening. A plurality of finger holes corresponding to bond fingers on the first circuit layer are formed in the core layer. A through opening is formed in the core layer and communicates with the first and second openings. At least one chip is mounted on the first circuit layer and covers the first opening, with its active surface being exposed to the first opening. An encapsulant is formed to fill the first and second openings and the through opening and encapsulate the chip.

摘要翻译： 提出了一种半导体封装及其制造方法。 提供了具有形成在第一和第二电路层之间的第一电路层，第二电路层和芯层的衬底。 在第二电路层上形成至少一个第二开口。 在对应于第二开口的第一电路层上形成至少一个第一开口。 在芯层中形成与第一电路层上的接合指状对应的多个指孔。 在芯层中形成通孔，并与第一和第二开口连通。 至少一个芯片安装在第一电路层上并且覆盖第一开口，其有源表面暴露于第一开口。 形成密封剂以填充第一和第二开口和通孔并封装芯片。