Abstract:
A display device includes: a first substrate; a barrier layer on the first substrate; an optical pattern layer on the barrier layer, and including a light blocking pattern, and a plurality of light transmitting patterns penetrating the light blocking pattern in a first direction; a first thin film transistor layer on the optical pattern layer; a light emitting element layer on the first thin film transistor layer; and a fingerprint sensor layer underneath the first substrate to receive light reflected from an external object.
Abstract:
Provided are color filter-integrated polarizer and method of manufacturing a color filter-integrated polarizer. A color filter-integrated polarizer includes a conductive material disposed on a substrate. The conductive material includes a polarizer region which comprises a plurality of parallel conductive wire patterns and a color filter region which comprises a plurality of holes arranged in a pattern.
Abstract:
A thin film transistor array panel includes a substrate, an insulation layer, a first semiconductor, and a second semiconductor. The insulation layer is disposed on the substrate and includes a stepped portion. The first semiconductor is disposed on the insulation layer. The second semiconductor is disposed on the insulation layer and includes a semiconductor material different than the first semiconductor. The stepped portion is spaced apart from an edge of the first semiconductor.
Abstract:
The present invention relates to a thin film transistor, a thin film transistor array panel, and a manufacturing method thereof. A thin film transistor according to an exemplary embodiments of the present invention includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a channel region overlapping the gate electrode, the gate insulating layer interposed between the channel region and the gate electrode; and a source region and a drain region, facing each other with respect to the channel region, positioned in the same layer as the channel region, and connected to the channel region, wherein the channel region, the source region, and the drain region comprise an oxide semiconductor, and wherein a carrier concentration of the source region and the drain region is larger than a carrier concentration of the channel region.
Abstract:
An etching device includes a chamber; a stage disposed in the chamber and on which a target substrate is loaded; a gas distribution unit disposed to face the stage in the chamber; a plurality of plasma generation modules disposed above the chamber; a gas supply unit that supplies gas into the chamber; a gas line connecting the gas supply unit and the plurality of plasma generation modules; and a plurality of gas inlet pipes each including an end connected to the plasma generation module and another end connected to the gas distribution unit.
Abstract:
A display device includes a substrate; a first circuit part and a second circuit part on the substrate and spaced from each other in a first direction; and an emission part between the first circuit part and the second circuit part, the emission part being located between the first circuit part and the second circuit part in a direction parallel to the substrate, wherein the first circuit part includes a first electrode extending to the emission part, wherein the second circuit part includes a second electrode extending to the emission part, and wherein the emission part includes a light emitting element located between the first electrode and the second electrode.
Abstract:
A light control member includes a light control substrate including a surface, and a scalene prism disposed on the light control substrate. The scalene prism includes a first side surface extended at a first angle with respect to the surface of the light control substrate, and a second side surface extended at a second angle with respect to the surface of the light control substrate, the second angle being greater than the first angle. The light control member includes an etching stopper disposed on the scalene prism, and at least one absorption pattern disposed on the etching stopper on the second side surface of the scalene prism.
Abstract:
A display substrate includes a substrate, a first gate electrode on the substrate, a first gate insulating layer on the first gate electrode, an active layer on the first gate insulating layer, a second gate insulating layer on the active layer, a second gate electrode on the second gate insulating layer, an interlayer insulating layer on the second gate electrode, a first electrode on the interlayer insulating layer to contact a top surface, a side wall, and a bottom surface of the active layer via a first contact hole through the interlayer insulating layer, the second gate insulating layer, the active layer, and a portion of the first gate insulating layer, and a second electrode on the interlayer insulating layer to contact the first gate electrode via a second contact hole through the interlayer insulating layer, the second gate insulating layer, and the first gate insulating layer.
Abstract:
A thin film transistor array panel includes a substrate, a light blocking film disposed on the substrate, a buffer layer covering the light blocking film, and a channel region disposed on the buffer layer. A source region and a drain region are disposed in the same layer as the channel region. A gate insulating layer is disposed on the channel region, and a gate electrode overlaps the channel region, with the gate insulating layer interposed between the gate electrode and the channel region. A passivation layer is disposed on the gate electrode, the source region, the drain region, and the buffer layer. A source electrode and a drain electrode are disposed on the passivation layer, wherein the channel region, the source region, and the drain region comprise an oxide semiconductor, and wherein a carrier concentration of the source region and the drain region is larger than in the channel region.
Abstract:
An exemplary embodiment of the present invention provides an optical sensor, including: a substrate; an infrared ray sensing thin film transistor including a first semiconductor layer that is formed on the substrate and arranged to operate by receiving infrared light, and a bandpass filter formed on the substrate and sized and arranged to pass the infrared light; a visible ray sensing thin film transistor including a second semiconductor layer formed on the substrate and arranged to operate by receiving visible light; and a switching thin film transistor including a third semiconductor layer formed on the substrate, wherein the bandpass filter may be formed of a metal material patterned to have features, successive features spaced apart from each other by a predetermined period so as to pass the infrared light and to block the visible light.