公开(公告)号：US20180138193A1

公开(公告)日：2018-05-17

申请号：US15354795

申请日：2016-11-17

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yanli Zhang ,  Jin Liu ,  Raghuveer S. Makala ,  Murshed Chowdhury ,  Johann Alsmeier

IPC: H01L27/115 ,  H01L29/06 ,  H01L23/528 ,  H01L29/08 ,  H01L29/10 ,  H01L23/522 ,  H01L21/28 ,  H01L21/762 ,  H01L21/768 ,  H01L21/3213 ,  H01L29/66

CPC classification number: H01L27/11582 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/32133 ,  H01L21/76224 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11573 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/6653 ,  H01L29/6656

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate and memory stack structures extending through the alternating stack. Each memory stack structure includes a memory film and a vertical semiconductor channel. An isolation trench laterally extends along a horizontal direction and divides at least two topmost electrically conductive layers. Two conductive rail structures are located on lengthwise sidewalls of the isolation trench and are electrically shorted to respective segments of the at least two topmost electrically conductive layers.

公开(公告)号：US09972641B1

公开(公告)日：2018-05-15

申请号：US15354795

申请日：2016-11-17

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yanli Zhang ,  Jin Liu ,  Raghuveer S. Makala ,  Murshed Chowdhury ,  Johann Alsmeier

IPC: H01L27/115 ,  H01L21/28 ,  H01L21/3213 ,  H01L21/768 ,  H01L27/11582 ,  H01L29/06 ,  H01L23/528 ,  H01L29/08 ,  H01L29/10 ,  H01L23/522 ,  H01L27/11556 ,  H01L21/762 ,  H01L29/66 ,  H01L27/11526 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11573

CPC classification number: H01L27/11582 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/32133 ,  H01L21/76224 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11573 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/6653 ,  H01L29/6656

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate and memory stack structures extending through the alternating stack. Each memory stack structure includes a memory film and a vertical semiconductor channel. An isolation trench laterally extends along a horizontal direction and divides at least two topmost electrically conductive layers. Two conductive rail structures are located on lengthwise sidewalls of the isolation trench and are electrically shorted to respective segments of the at least two topmost electrically conductive layers.

公开(公告)号：US09972640B1

公开(公告)日：2018-05-15

申请号：US15354067

申请日：2016-11-17

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： James Kai ,  Murshed Chowdhury ,  Jin Liu ,  Johann Alsmeier

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11565 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11556 ,  H01L29/423 ,  H01L21/02 ,  H01L21/311 ,  H01L29/417 ,  H01L29/51 ,  H01L21/768

CPC classification number: H01L27/11582 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02494 ,  H01L21/02587 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76805 ,  H01L21/76877 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/41741 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/512 ,  H01L29/518

Abstract: A three-dimensional memory device including self-aligned drain select level electrodes is provided. Memory stack structures extend through an alternating stack of insulating layers and spacer material layers. Each of the memory stack structures includes a memory film and a memory level channel portion. Drain select level channel portions are formed over the memory level channel portions with respective lateral shifts with respect to underlying memory stack structures. The direction of lateral shifts alternates from row to row for each row of drain select level channel portions. Drain select level gate dielectrics and drain select level gate electrodes are formed on the drain select level channel portions. Each drain select level gate electrode controls two rows of drain select level channel portions, and is laterally spaced from neighboring drain select level gate electrodes.

公开(公告)号：US09917100B2

公开(公告)日：2018-03-13

申请号：US15354116

申请日：2016-11-17

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tong Zhang ,  Johann Alsmeier ,  James Kai ,  Jin Liu ,  Yanli Zhang

IPC: H01L27/115 ,  H01L23/528 ,  H01L27/11582 ,  H01L21/768 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565

CPC classification number: H01L27/11582 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/528 ,  H01L27/11519 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11575 ,  H01L28/00

Abstract: A three-dimensional memory device includes an alternating stack of electrically conductive layers and insulating layers located over a substrate, an array of memory stack structures. A source conductive line structure is provided between the substrate and the alternating stack. The source conductive line structure includes a plurality of parallel conductive rail structures extending along a same horizontal direction and adjoined to a common conductive straddling structure. Each memory stack structure straddles a vertical interface between a conductive rail structure and a support matrix. A semiconductor channel in each memory stack structure contacts a respective conductive rail structure and the support matrix.

公开(公告)号：US10777570B2

公开(公告)日：2020-09-15

申请号：US15990037

申请日：2018-05-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tadashi Nakamura ,  Jin Liu ,  Kazuya Tokunaga ,  Marika Gunji-Yoneoka ,  Matthias Baenninger ,  Hiroyuki Kinoshita ,  Murshed Chowdhury ,  Jiyin Xu

IPC: H01L27/11582 ,  H01L29/06 ,  H01L29/10 ,  H01L23/528 ,  H01L29/423 ,  H01L21/311 ,  H01L21/764 ,  H01L23/29 ,  H01L23/31 ,  H01L49/02

Abstract: An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.

公开(公告)号：US10734070B2

公开(公告)日：2020-08-04

申请号：US16019456

申请日：2018-06-26

Applicant: SanDisk Technologies LLC

Inventor： Xiang Yang ,  Dengtao Zhao ,  Huai-Yuan Tseng ,  Deepanshu Dutta ,  Zhongguang Xu ,  Yanli Zhang ,  Jin Liu

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/08 ,  G11C16/14 ,  G11C16/34 ,  G11C16/24

Abstract: Non-volatile memory strings may include multiple selection devices for coupling memory cell devices to a bit line. Different programming operations may be used to program various individual selection devices in a non-volatile memory cells string. For example, a control circuit may set a threshold voltage of a particular selection device to a value greater than a threshold voltage of another selection device. In another example, the control circuit may program the selection device using an initial sense time. Subsequent to programming the selection device using the initial sense time, the control circuit may program the selection device using a different sense time that is shorter than the initial sense time.

公开(公告)号：US10115736B2

公开(公告)日：2018-10-30

申请号：US15707842

申请日：2017-09-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Jin Liu ,  Chun Ge ,  Johann Alsmeier

IPC: H01L27/11 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11529 ,  H01L27/11556 ,  H01L27/11573

Abstract: A method of fabricating a monolithic three dimensional memory structure is provided. The method includes forming a stack of alternating word line and dielectric layers above a substrate, forming a source line above the substrate, forming a memory hole extending through the alternating word line and dielectric layers and the source line, and forming a mechanical support element on the substrate adjacent to the memory hole.

公开(公告)号：US20180277567A1

公开(公告)日：2018-09-27

申请号：US15990037

申请日：2018-05-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tadashi Nakamura ,  Jin Liu ,  Kazuya Tokunaga ,  Marika Gunji-Yoneoka ,  Matthias Baenninger ,  Hiroyuki Kinoshita ,  Murshed Chowdhury ,  Jiyin Xu

IPC: H01L27/11582 ,  H01L49/02 ,  H01L23/31 ,  H01L23/29 ,  H01L21/764 ,  H01L29/423 ,  H01L23/528 ,  H01L29/10 ,  H01L29/06 ,  H01L21/311

CPC classification number: H01L27/11582 ,  H01L21/31111 ,  H01L21/764 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/528 ,  H01L28/00 ,  H01L29/0649 ,  H01L29/1037 ,  H01L29/42372

Abstract: An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.

公开(公告)号：US20180211970A1

公开(公告)日：2018-07-26

申请号：US15927688

申请日：2018-03-21

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： James Kai ,  Murshed Chowdhury ,  Jin Liu ,  Johann Alsmeier

IPC: H01L27/11582 ,  H01L29/51 ,  H01L21/02 ,  H01L29/423 ,  H01L29/417 ,  H01L27/1157 ,  H01L27/11565 ,  H01L27/11556 ,  H01L27/11524 ,  H01L27/11519 ,  H01L21/768 ,  H01L21/311

CPC classification number: H01L27/11582 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02192 ,  H01L21/02494 ,  H01L21/02587 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76805 ,  H01L21/76877 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/41741 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/518

Abstract: A three-dimensional memory device including self-aligned drain select level electrodes is provided. Memory stack structures extend through an alternating stack of insulating layers and spacer material layers. Each of the memory stack structures includes a memory film and a memory level channel portion. Drain select level channel portions are formed over the memory level channel portions with respective lateral shifts with respect to underlying memory stack structures. The direction of lateral shifts alternates from row to row for each row of drain select level channel portions. Drain select level gate dielectrics and drain select level gate electrodes are formed on the drain select level channel portions. Each drain select level gate electrode controls two rows of drain select level channel portions, and is laterally spaced from neighboring drain select level gate electrodes.

公开(公告)号：US09991280B2

公开(公告)日：2018-06-05

申请号：US15434544

申请日：2017-02-16

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tadashi Nakamura ,  Jin Liu ,  Kazuya Tokunaga ,  Marika Gunji-Yoneoka ,  Matthias Baenninger ,  Hiroyuki Kinoshita ,  Murshed Chowdhury ,  Jiyin Xu ,  Dai Iwata ,  Hiroyuki Ogawa ,  Kazutaka Yoshizawa ,  Yasuaki Yonemochi

IPC: H01L27/115 ,  H01L27/11582 ,  H01L29/06 ,  H01L29/10 ,  H01L23/528 ,  H01L29/423 ,  H01L21/311 ,  H01L21/764 ,  H01L23/29 ,  H01L23/31 ,  H01L49/02

CPC classification number: H01L27/11582 ,  H01L21/31111 ,  H01L21/764 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/528 ,  H01L28/00 ,  H01L29/0649 ,  H01L29/1037 ,  H01L29/42372

Abstract: An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.