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    PRINT HEAD INCLUDING AN ORGANIC LIGHT EMITTING DEVICE
    11.
    发明申请
    PRINT HEAD INCLUDING AN ORGANIC LIGHT EMITTING DEVICE 审中-公开
    打印头包括有机发光装置

    公开(公告)号：US20080165243A1

    公开(公告)日：2008-07-10

    申请号：US11854459

    申请日：2007-09-12

    申请人： Jong-Seok Oh ,  Jong-hyuk Lee ,  Young-Woo Song ,  Kyu-Hwan Hwang ,  Joon-Gu Lee ,  Jae-Heung Ha ,  Chul-Woo Park

    发明人： Jong-Seok Oh ,  Jong-hyuk Lee ,  Young-Woo Song ,  Kyu-Hwan Hwang ,  Joon-Gu Lee ,  Jae-Heung Ha ,  Chul-Woo Park

    IPC分类号： B41J2/45 ,  H01J1/62

    CPC分类号： B41J2/45 ,  H01L51/5203

    摘要： A print head includes a light source, a driver chip electrically connected to the light source and a lens array on the side of light irradiation of the light source. The light source includes a substrate and a plurality of organic light emitting diodes arranged in adjacent groups on the substrate. Each of the organic light emitting diodes of a group includes a first electrode, an organic emissive layer, and a second electrode. First wires on the substrate connect each first electrode to a first electrode in an adjacent group. A separator is located between the adjacent groups. A first pad on the substrate is electrically connected to each first electrode of each of the organic light emitting diodes of a first group and a plurality of second pads are located on the substrate, each second pad electrically connected to the second electrode of each group.

    摘要翻译： 打印头包括光源，电连接到光源的驱动器芯片和在光源的光照射侧的透镜阵列。 光源包括基板和布置在基板上的相邻组中的多个有机发光二极管。 组中的每个有机发光二极管包括第一电极，有机发光层和第二电极。 基板上的第一导线将每个第一电极连接到相邻组中的第一电极。 分隔物位于相邻组之间。 衬底上的第一焊盘电连接到第一组的每个有机发光二极管的每个第一电极，并且多个第二焊盘位于衬底上，每个第二焊盘电连接到每个组的第二电极。

    Semiconductor memory devices and signal line arrangements and related methods
    12.
    发明授权
    Semiconductor memory devices and signal line arrangements and related methods 失效
    半导体存储器件和信号线布置及相关方法

    公开(公告)号：US07259978B2

    公开(公告)日：2007-08-21

    申请号：US11221684

    申请日：2005-09-08

    申请人： Chul-Woo Park ,  Jung-Bae Lee ,  Young-Sun Min ,  Jong-Hyun Choi ,  Jong-Eon Lee

    发明人： Chul-Woo Park ,  Jung-Bae Lee ,  Young-Sun Min ,  Jong-Hyun Choi ,  Jong-Eon Lee

    IPC分类号： G11C5/06

    CPC分类号： G11C5/063 ,  G11C7/18 ,  G11C8/14

    摘要： A semiconductor memory device may include a memory cell array, a bit line sense amplifier, a sub word line driver, and an electrode. The memory cell array may include a sub memory cell array connected between sub word lines and bit line pairs and having memory cells which are selected in response to a signal transmitted to the sub word lines and column selecting signal lines. The bit line sense amplifier may be configures to sense and amplify data of the bit line pairs. The sub word line driver may be configured to combine signals transmitted from word selecting signal lines and signals transmitted from main word lines to select the sub word lines. Moreover, the memory cell array may be configured to transmit data between the bit line pairs and local data line pairs and to transmit data between the local data line pairs and global data line pairs. The electrode may be configured to cover the whole memory cell array and to apply a voltage needed for the memory cells. The local data line pairs may be arranged on a first layer above the electrode in the same direction as the sub word line. The column selecting signal lines and the global data line pairs may be arranged on a second layer above the electrode in the same direction as the bit line. The word selecting signal lines and the main word lines may be arranged on a third layer above the electrode in the same direction as the sub word line. Related methods of signal line arrangement are also discussed.

    摘要翻译： 半导体存储器件可以包括存储单元阵列，位线读出放大器，子字线驱动器和电极。 存储单元阵列可以包括连接在子字线和位线对之间并具有响应于发送到子字线和列选择信号线的信号而被选择的存储器单元的子存储单元阵列。 位线读出放大器可以被配置为感测和放大位线对的数据。 子字线驱动器可以被配置为组合从字选择信号线发送的信号和从主字线发送的信号，以选择子字线。 此外，存储单元阵列可以被配置为在位线对和本地数据线对之间传输数据，并且在本地数据线对和全局数据线对之间传送数据。 电极可以被配置为覆盖整个存储单元阵列并施加存储单元所需的电压。 局部数据线对可以以与子字线相同的方向布置在电极上方的第一层上。 列选择信号线和全局数据线对可以以与位线相同的方向布置在电极上方的第二层上。 字选择信号线和主字线可以沿与子字线相同的方向布置在电极上方的第三层上。 还讨论了信号线布置的相关方法。

    Address coding method and address decoder for reducing sensing noise during refresh operation of memory device
    13.
    发明授权
    Address coding method and address decoder for reducing sensing noise during refresh operation of memory device 有权
    地址编码方法和地址解码器，用于在存储器件的刷新操作期间减少感测噪声

    公开(公告)号：US07180816B2

    公开(公告)日：2007-02-20

    申请号：US11152449

    申请日：2005-06-14

    申请人： Chul-Woo Park

    发明人： Chul-Woo Park

    IPC分类号： G11C8/00

    CPC分类号： G11C8/12 ,  G11C11/406 ,  G11C11/40618 ,  G11C11/4087 ,  G11C2211/4065

    摘要： An address coding method, which is performed by a memory device including a plurality of banks each being shared by at least two memory blocks, includes: activating adjacent banks shared by at least two memory blocks during a refresh operation of the memory device, and enabling the refresh operation in each bank alternately between the at least two memory blocks. The method includes activating adjacent banks shared by the at least two memory blocks during another operation of the memory device, and enabling the another operation in each bank alternately between the at least two memory blocks.

    摘要翻译： 一种由包括由至少两个存储块共享的多个存储体的存储器件执行的地址编码方法包括：在存储器件的刷新操作期间激活由至少两个存储器块共享的相邻存储体，并且使能 交替地在至少两个存储器块之间的每个存储体中的刷新操作。 该方法包括在存储器件的另一操作期间激活由至少两个存储器块共享的相邻存储体，以及在至少两个存储器块之间交替地启用每个存储体中的另一操作。

    Level shifting circuit and method reducing leakage current
    15.
    发明申请
    Level shifting circuit and method reducing leakage current 失效
    电平移动电路和减少漏电流的方法

    公开(公告)号：US20060055424A1

    公开(公告)日：2006-03-16

    申请号：US11154725

    申请日：2005-06-15

    申请人： Chul-Woo Park ,  Kyu-Hyoun Kim ,  Beom-Sig Cho

    发明人： Chul-Woo Park ,  Kyu-Hyoun Kim ,  Beom-Sig Cho

    IPC分类号： H03K19/0175

    CPC分类号： H03K19/018521 ,  H03K19/00361

    摘要： A level shifting circuit and method that reduce leakage current are provided. The level shifting circuit includes: a logic circuit including a plurality of MOSFETs (metal-oxide-semiconductor field effect transistors) connected in series between an output terminal and a source, receiving an input signal having a first logic level and a second logic level, changing the input signal to a signal having a first logic level and a third logic level in response to a feedback signal supplied to one of the MOSFETs, and outputting the changed signal as an output signal; and a feedback circuit generating the feedback signal in response to the output signal.

    摘要翻译： 提供降低泄漏电流的电平移动电路和方法。 电平移位电路包括：逻辑电路，包括串联连接在输出端和源之间的多个MOSFET（金属氧化物半导体场效应晶体管），接收具有第一逻辑电平和第二逻辑电平的输入信号， 响应于提供给一个MOSFET的反馈信号，将输入信号改变为具有第一逻辑电平和第三逻辑电平的信号，并输出改变的信号作为输出信号; 以及响应于输出信号产生反馈信号的反馈电路。

    Vacuum fluorescent display
    16.
    发明授权
    Vacuum fluorescent display 失效
    真空荧光显示

    公开(公告)号：US06803716B1

    公开(公告)日：2004-10-12

    申请号：US09642190

    申请日：2000-08-18

    申请人： Chul-Woo Park ,  Kwon-Soo Choi

    发明人： Chul-Woo Park ,  Kwon-Soo Choi

    IPC分类号： H01J1749

    CPC分类号： H01J29/467 ,  H01J31/126

    摘要： A vacuum fluorescent display includes a pair of substrates spaced apart from each other with a predetermined distance. The substrates form a vacuum cell by interposing a side glass. Filaments are mounted within the vacuum cell to emit thermal electrons under the application of voltage. Anode electrodes are formed at one of the substrates, each anode electrode unit having a conductive layer and a phosphor layer formed on the conductive layer. A control electrode surrounds the anode electrode to accelerate or intercept the thermal electrons emitted from the filaments. The control electrode is formed with a single-layered structure.

    摘要翻译： 真空荧光显示器包括彼此隔开预定距离的一对基板。 基板通过插入侧玻璃形成真空电池。 灯丝被安装在真空室中以在施加电压的情况下发射热电子。 在一个基板上形成阳极电极，每个阳极电极单元具有形成在导电层上的导电层和荧光体层。 控制电极围绕阳极电极以加速或截取从细丝发射的热电子。 控制电极形成为单层结构。

    Resistive memory devices and methods of controlling operations of the same
    18.
    发明授权
    Resistive memory devices and methods of controlling operations of the same 有权
    电阻式存储器件及其操作方法

    公开(公告)号：US08271856B2

    公开(公告)日：2012-09-18

    申请号：US12711416

    申请日：2010-02-24

    申请人： Sang-Beom Kang ,  Chul-Woo Park ,  Hyun-Ho Choi ,  Ho-Jung Kim

    发明人： Sang-Beom Kang ,  Chul-Woo Park ,  Hyun-Ho Choi ,  Ho-Jung Kim

    IPC分类号： G11C29/00

    CPC分类号： G06F11/1048 ,  G11C13/0004 ,  G11C2029/0411

    摘要： To control operations of a resistive memory device, an input-output operation of an error check and correction (ECC) code is separated from an input-output operation of data. A condition of the input-output operation of the ECC code is determined stricter than a condition of the input-output operation of the data. reliability of the input-output operation of the ECC code may be enhanced, thereby reducing errors due to defect memory cells, noise, etc.

    摘要翻译： 为了控制电阻性存储器件的操作，错误检查和校正（ECC）代码的输入输出操作与数据的输入输出操作分离。 确定ECC代码的输入输出操作的条件比数据的输入输出操作的条件更严格。 可以提高ECC代码的输入输出操作的可靠性，从而减少由于缺陷存储单元，噪声等导致的错误。

    SEMICONDUCTOR MEMORY DEVICE FOR DATA SENSING
    20.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE FOR DATA SENSING 有权
    用于数据传感的半导体存储器件

    公开(公告)号：US20120087177A1

    公开(公告)日：2012-04-12

    申请号：US13238553

    申请日：2011-09-21

    申请人： Sua KIM ,  Chul-Woo Park ,  Hong-Sun Hwang ,  Hak-Soo Yu

    发明人： Sua KIM ,  Chul-Woo Park ,  Hong-Sun Hwang ,  Hak-Soo Yu

    IPC分类号： G11C11/24

    CPC分类号： G11C11/4091 ,  G11C11/4099

    摘要： A semiconductor memory device includes a memory cell and a first reference memory cell. The memory cell includes a first switching element and a first capacitor for storing data. The first switching element is controlled by a first wordline, and has a first terminal connected to a first terminal of the first capacitor and a second terminal connected to a first bitline. The first capacitor has a second terminal for receiving a first plate voltage. The first reference memory cell includes a first reference switching element and a first capacitor. The first switching element is controlled by a first reference wordline, and has a first terminal connected to a first terminal of the first reference capacitor and a second terminal connected to a second bitline. The first reference capacitor has a second terminal receiving a first reference plate voltage different from the first plate voltage.

    摘要翻译： 半导体存储器件包括存储单元和第一参考存储单元。 存储单元包括第一开关元件和用于存储数据的第一电容器。 第一开关元件由第一字线控制，并且具有连接到第一电容器的第一端子的第一端子和连接到第一位线的第二端子。 第一电容器具有用于接收第一板电压的第二端子。 第一参考存储单元包括第一参考开关元件和第一电容器。 第一开关元件由第一参考字线控制，并且具有连接到第一参考电容器的第一端子的第一端子和连接到第二位线的第二端子。 第一参考电容器具有接收与第一板电压不同的第一参考板电压的第二端子。