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    SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF
    13.
    发明申请
    SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF 审中-公开
    半导体封装及其制造方法

    公开(公告)号：US20140183721A1

    公开(公告)日：2014-07-03

    申请号：US13846579

    申请日：2013-03-18

    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

    Inventor： Yan-Heng Chen ,  Chiang-Cheng Chang ,  Jung-Pang Huang ,  Hsi-Chang Hsu ,  Yan-Yi Liao

    IPC: H01L21/56 ,  H01L23/31

    CPC classification number: H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/12105

    Abstract: A fabrication method of a semiconductor package is provided, which includes the steps of: providing a carrier having an adhesive layer and at least a semiconductor element having a protection layer; disposing the semiconductor element on the adhesive layer of the carrier through the protection layer; forming an encapsulant on the adhesive layer of the carrier for encapsulating the semiconductor element; removing the carrier and the adhesive layer to expose the protection layer from the encapsulant; and removing the protection layer to expose the semiconductor element from the encapsulant. Since the semiconductor element is protected by the protection layer against damage during the process of removing the adhesive layer, the product yield is improved.

    Abstract translation: 提供一种半导体封装的制造方法，其包括以下步骤：提供具有粘合层和至少具有保护层的半导体元件的载体; 通过保护层将半导体元件设置在载体的粘合剂层上; 在用于封装半导体元件的载体的粘合剂层上形成密封剂; 去除载体和粘合剂层以将保护层暴露于密封剂; 以及去除所述保护层以使所述半导体元件暴露于所述密封剂。 由于半导体元件被保护层保护以防止在去除粘合剂层的过程中损坏，所以产品产率提高。

    Electronic package, packaging substrate, and methods for fabricating the same
    15.
    发明授权
    Electronic package, packaging substrate, and methods for fabricating the same 有权

    公开(公告)号：US11600571B2

    公开(公告)日：2023-03-07

    申请号：US17125195

    申请日：2020-12-17

    Applicant: Siliconware Precision Industries Co., Ltd.

    Inventor： Jun-Chang Ding ,  Hong-Da Chang ,  Hsi-Chang Hsu

    IPC: H01L23/538 ,  H01L23/498 ,  H01L23/532 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

    Abstract: An electronic package, a packaging substrate, and methods for fabricating the same are disposed. The electronic package includes a circuit structure having a first side and a second side opposing the first side, an electronic component disposed on the first side of the circuit structure, an encapsulation layer formed on the first side of the circuit structure and encapsulating the electronic component, a metal structure disposed on the second side of the circuit structure, and a plurality of conductive elements disposed on the metal structure. The plurality of conductive elements are disposed on the metal structure, rather than disposed on the circuit structure directly. Therefore, the bonding between the conductive elements and the circuit structure is improved, to avoid the plurality of conductive elements from being peeled.

    ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
    16.
    发明申请
    ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20220181225A1

    公开(公告)日：2022-06-09

    申请号：US17160720

    申请日：2021-01-28

    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

    Inventor： Chi-Jen Chen ,  Hsi-Chang Hsu ,  Yuan-Hung Hsu ,  Chang-Fu Lin ,  Don-Son Jiang

    IPC: H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

    Abstract: An electronic package and a method for manufacturing the electronic package are provided. The method includes forming a slope surface on at least one side surface of at least one of a plurality of electronic components, and then disposing the plurality of electronic components on a carrier structure, such that the two adjacent electronic components form a space by the slope surface. Afterwards, an encapsulation layer is formed on the carrier structure and filled into the space to cover the two adjacent electronic components so as to disperse stress on the electronic components through the design of the space to prevent cracking due to stress concentration.

    ELECTRONIC PACKAGE, PACKAGING SUBSTRATE, AND METHODS FOR FABRICATING THE SAME
    18.
    发明申请
    ELECTRONIC PACKAGE, PACKAGING SUBSTRATE, AND METHODS FOR FABRICATING THE SAME 有权

    公开(公告)号：US20210104465A1

    公开(公告)日：2021-04-08

    申请号：US17125195

    申请日：2020-12-17

    Applicant: Siliconware Precision Industries Co., Ltd.

    Inventor： Jun-Chang Ding ,  Hong-Da Chang ,  Hsi-Chang Hsu

    IPC: H01L23/538 ,  H01L23/498 ,  H01L23/532 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

    Abstract: An electronic package, a packaging substrate, and methods for fabricating the same are disposed. The electronic package includes a circuit structure having a first side and a second side opposing the first side, an electronic component disposed on the first side of the circuit structure, an encapsulation layer formed on the first side of the circuit structure and encapsulating the electronic component, a metal structure disposed on the second side of the circuit structure, and a plurality of conductive elements disposed on the metal structure. The plurality of conductive elements are disposed on the metal structure, rather than disposed on the circuit structure directly. Therefore, the bonding between the conductive elements and the circuit structure is improved, to avoid the plurality of conductive elements from being peeled.

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