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公开(公告)号:US11410846B2
公开(公告)日:2022-08-09
申请号:US17094563
申请日:2020-11-10
Inventor: Shich-Chang Suen , Li-Chieh Wu , Chi-Jen Liu , He Hui Peng , Liang-Guang Chen , Yung-Chung Chen
IPC: H01L21/02 , H01L21/28 , H01L21/311 , H01L21/768 , H01L21/288 , H01L29/66
Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.
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公开(公告)号:US20210391208A1
公开(公告)日:2021-12-16
申请号:US16902203
申请日:2020-06-15
Inventor: Ji Cui , Fu-Ming Huang , Ting-Kui Chang , Tang-Kuei Chang , Chun-Chieh Lin , Wei-Wei Liang , Chi-Hsiang Shen , Ting-Hsun Chang , Li-Chieh Wu , Hung Yen , Chi-Jen Liu , Liang-Guang Chen , Kei-Wei Chen
IPC: H01L21/768 , C09G1/02 , C09K3/14
Abstract: A method for CMP includes following operations. A metal layer is received. A CMP slurry composition is provided in a CMP apparatus. The CMP slurry composition includes at least a first oxidizer and a second oxidizer different from each other. The first oxidizer is oxidized to form a peroxidant by the second oxidizer. A portion of the metal layer is oxidized to form a first metal oxide by the peroxidant. The first metal oxide is re-oxidized to form a second metal oxide by the second oxidizer.
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公开(公告)号:US20210082688A1
公开(公告)日:2021-03-18
申请号:US17094563
申请日:2020-11-10
Inventor: Shich-Chang Suen , Li-Chieh Wu , Chi-Jen Liu , He Hui Peng , Liang-Guang Chen , Yung-Chung Chen
IPC: H01L21/02 , H01L21/28 , H01L21/311 , H01L21/768 , H01L29/40 , H01L21/288
Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.
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公开(公告)号:US10937691B2
公开(公告)日:2021-03-02
申请号:US16559336
申请日:2019-09-03
Inventor: Chia Hsuan Lee , Chun-Wei Hsu , Chia-Wei Ho , Chi-Hsiang Shen , Li-Chieh Wu , Jian-Ci Lin , Chi-Jen Liu , Yi-Sheng Lin , Yang-Chun Cheng , Liang-Guang Chen , Kuo-Hsiu Wei , Kei-Wei Chen
IPC: H01L21/02 , H01L21/768 , H01L21/3105 , C09G1/02
Abstract: Methods of forming a slurry and methods of performing a chemical mechanical polishing (CMP) process utilized in manufacturing semiconductor devices, as described herein, may be performed on semiconductor devices including integrated contact structures with ruthenium (Ru) plug contacts down to a semiconductor substrate. The slurry may be formed by mixing a first abrasive, a second abrasive, and a reactant with a solvent. The first abrasive may include a first particulate including titanium dioxide (TiO2) particles and the second abrasive may include a second particulate that is different from the first particulate. The slurry may be used in a CMP process for removing ruthenium (Ru) materials and dielectric materials from a surface of a workpiece resulting in better WiD loading and planarization of the surface for a flat profile.
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公开(公告)号:US20200043786A1
公开(公告)日:2020-02-06
申请号:US16450665
申请日:2019-06-24
Inventor: Li-Chieh Wu , Kuo-Hsiu Wei , Kei-Wei Chen , Tang-Kuei Chang , Chia Hsuan Lee , Jian-Ci Lin
IPC: H01L21/768 , H01L21/321 , H01L23/532 , H01L23/535 , C09G1/04
Abstract: A structure and a formation method of a semiconductor device are provided. The method includes forming a conductive feature over a semiconductor substrate and forming a dielectric layer over the conductive feature. The method also includes forming an opening in the dielectric layer to expose the conductive feature. The method further includes forming a conductive material to overfill the opening. In addition, the method includes thinning the conductive material using a chemical mechanical polishing process. A slurry used in the chemical mechanical polishing process includes an iron-containing oxidizer that oxidizes a portion of the conductive material.
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公开(公告)号:US20170221700A1
公开(公告)日:2017-08-03
申请号:US15492034
申请日:2017-04-20
Inventor: Shich-Chang Suen , Li-Chieh Wu , Chi-Jen Liu , He Hui Peng , Liang-Guang Chen , Yung-Chung Chen
IPC: H01L21/02 , H01L21/288 , H01L21/768 , H01L21/311
CPC classification number: H01L21/02068 , H01L21/02063 , H01L21/0234 , H01L21/28079 , H01L21/28132 , H01L21/288 , H01L21/31105 , H01L21/31111 , H01L21/31116 , H01L21/76804 , H01L21/76814 , H01L21/76831 , H01L21/76877 , H01L21/76895 , H01L29/401 , H01L29/66545
Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.
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17.
公开(公告)号:US09449841B2
公开(公告)日:2016-09-20
申请号:US14134914
申请日:2013-12-19
Inventor: Shich-Chang Suen , Chi-Jen Liu , Ying-Liang Chuang , Li-Chieh Wu , Liang-Guang Chen , Ming-Liang Yen
IPC: H01L21/02 , H01L21/321 , H01L29/66 , H01L21/67
CPC classification number: H01L21/28123 , B24B37/20 , H01L21/02074 , H01L21/3212 , H01L21/67051 , H01L29/66545
Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor structure including a metal gate (MG) layer formed to fill in a trench between two adjacent interlayer dielectric (ILD) regions; performing a chemical mechanical polishing (CMP) process using a CMP system to planarize the MG layer and the ILD regions; and cleaning the planarized MG layer using a O3/DIW solution including ozone gas (O3) dissolved in deionized water (DIW). The MG layer is formed on the ILD regions.
Abstract translation: 本公开提供了制造半导体器件的方法。 该方法包括提供包括形成为填充两个相邻层间电介质(ILD)区域之间的沟槽的金属栅极(MG)层的半导体结构; 使用CMP系统进行化学机械抛光(CMP)处理以使MG层和ILD区域平坦化; 以及使用溶解在去离子水(DIW)中的包含臭氧气体(O 3)的O 3 / DIW溶液清洗平坦化的MG层。 MG层形成在ILD区域上。
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公开(公告)号:US09209272B2
公开(公告)日:2015-12-08
申请号:US14024247
申请日:2013-09-11
Inventor: Chi-Jen Liu , Li-Chieh Wu , Shich-Chang Suen , Liang-Guang Chen
CPC classification number: H01L29/66545 , H01L21/02074 , H01L21/28088 , H01L21/28123 , H01L21/3212 , H01L21/76802 , H01L21/76805 , H01L21/76829 , H01L21/76831 , H01L21/76895 , H01L29/4966 , H01L29/517 , H01L29/665 , H01L29/6659
Abstract: A method includes forming a dummy gate of a transistor at a surface of a wafer, removing the dummy gate, and filling a metallic material into a trench left by the removed dummy gate. A Chemical Mechanical Polish (CMP) is then performed on the metallic material, wherein a remaining portion of the metallic material forms a metal gate of the transistor. After the CMP, a treatment is performed on an exposed top surface of the metal gate using an oxidation-and-etching agent comprising chlorine and oxygen.
Abstract translation: 一种方法包括在晶片的表面上形成晶体管的虚拟栅极,去除虚拟栅极,并将金属材料填充到由去除的虚拟栅极留下的沟槽中。 然后对金属材料进行化学机械抛光(CMP),其中金属材料的剩余部分形成晶体管的金属栅极。 在CMP之后,使用包含氯和氧的氧化 - 蚀刻剂在金属栅极的暴露的顶表面上进行处理。
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19.
公开(公告)号:US20150179432A1
公开(公告)日:2015-06-25
申请号:US14134914
申请日:2013-12-19
Inventor: Shich-Chang Suen , Chi-Jen Liu , Ying-Liang Chuang , Li-Chieh Wu , Liang-Guang Chen , Ming-Liang Yen
IPC: H01L21/02 , H01L21/306
CPC classification number: H01L21/28123 , B24B37/20 , H01L21/02074 , H01L21/3212 , H01L21/67051 , H01L29/66545
Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor structure including a metal gate (MG) layer formed to fill in a trench between two adjacent interlayer dielectric (ILD) regions; performing a chemical mechanical polishing (CMP) process using a CMP system to planarize the MG layer and the ILD regions; and cleaning the planarized MG layer using a O3/DIW solution including ozone gas (O3) dissolved in deionized water (DIW). The MG layer is formed on the ILD regions.
Abstract translation: 本公开提供了制造半导体器件的方法。 该方法包括提供包括形成为填充两个相邻层间电介质(ILD)区域之间的沟槽的金属栅极(MG)层的半导体结构; 使用CMP系统进行化学机械抛光(CMP)处理以使MG层和ILD区域平坦化; 以及使用溶解在去离子水(DIW)中的包含臭氧气体(O 3)的O 3 / DIW溶液清洗平坦化的MG层。 MG层形成在ILD区域上。
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公开(公告)号:US11658065B2
公开(公告)日:2023-05-23
申请号:US16902203
申请日:2020-06-15
Inventor: Ji Cui , Fu-Ming Huang , Ting-Kui Chang , Tang-Kuei Chang , Chun-Chieh Lin , Wei-Wei Liang , Chi-Hsiang Shen , Ting-Hsun Chang , Li-Chieh Wu , Hung Yen , Chi-Jen Liu , Liang-Guang Chen , Kei-Wei Chen
IPC: H01L21/768 , C09K3/14 , C09G1/02 , H01L21/321
CPC classification number: H01L21/7684 , C09G1/02 , C09K3/1463 , C09K3/1481 , H01L21/3212 , H01L21/76877
Abstract: A method for CMP includes following operations. A metal layer is received. A CMP slurry composition is provided in a CMP apparatus. The CMP slurry composition includes at least a first oxidizer and a second oxidizer different from each other. The first oxidizer is oxidized to form a peroxidant by the second oxidizer. A portion of the metal layer is oxidized to form a first metal oxide by the peroxidant. The first metal oxide is re-oxidized to form a second metal oxide by the second oxidizer.
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