公开(公告)号：US11452209B2

公开(公告)日：2022-09-20

申请号：US17134316

申请日：2020-12-26

Applicant: TDK CORPORATION

Inventor： Yuichiro Okuyama ,  Takeshi Oohashi ,  Hajime Kuwajima ,  Takashi Ohtsuka ,  Kazuhiro Yoshikawa ,  Kenichi Yoshida

IPC: H05K1/02 ,  H05K1/16 ,  H05K1/14

Abstract: Disclosed herein is an electronic component that includes a substrate and a plurality of conductive layers and a plurality of insulating layers which are alternately laminated on the substrate. The side surface of at least one of the plurality of insulating layers has a recessed part set back from a side surface of the substrate and a projecting part projecting from the recessed part.

公开(公告)号：US11114248B2

公开(公告)日：2021-09-07

申请号：US16354373

申请日：2019-03-15

Applicant: TDK Corporation

Inventor： Kazuhiro Yoshikawa ,  Daiki Ishii ,  Kenichi Yoshida

IPC: H01G4/33 ,  H01G4/012

Abstract: A thin film capacitor includes a capacitance portion in which a plurality of electrode layers and dielectric layers are alternately laminated, a cover layer, an insulating layer, a via hole in which one electrode layer different from an uppermost electrode layer among the plurality of electrode layers is exposed at a bottom surface thereof, and an opening which is provided inside the via hole and in which the one electrode layer is exposed at a bottom surface thereof, and in which the cover layer and the insulating layer are exposed at a side surface. The opening includes a first opening portion which passes through the insulating layer and a second opening portion which is provided below the first opening portion and passes through the cover layer, and when an inner diameter of the first opening portion is D1 and an inner diameter of the second opening portion is D2, D1>D2.

公开(公告)号：US10958232B2

公开(公告)日：2021-03-23

申请号：US16521039

申请日：2019-07-24

Applicant: TDK Corporation

Inventor： Eiko Wakata ,  Kenichi Yoshida

IPC: H03H7/01 ,  H01G4/40 ,  H01F27/40 ,  H01G4/012 ,  H01F27/28 ,  H01F27/29 ,  H01G4/228 ,  H01G4/06 ,  H03H1/00

Abstract: Disclosed herein is an LC filter that includes a conductive substrate, a first capacitive insulating film having one surface covered with the conductive substrate and other surface covered with a first capacitive electrode, a first inductor pattern having one end connected to the first capacitive electrode, a first terminal electrode connected to other end of the first inductor pattern, and a common terminal electrode connected to the conductive substrate.

公开(公告)号：US10813220B2

公开(公告)日：2020-10-20

申请号：US15892722

申请日：2018-02-09

Applicant: TDK CORPORATION

Inventor： Mitsuhiro Tomikawa ,  Koichi Tsunoda ,  Kazuhiro Yoshikawa ,  Kenichi Yoshida

IPC: H05K1/18 ,  H05K3/30 ,  H05K3/38 ,  H05K3/46 ,  H05K3/00

Abstract: An electronic component embedded substrate includes: a substrate that includes an insulating layer and has a first principal surface and a second principal surface; an electronic component that is embedded in the substrate and has at least one first terminal, at least one second terminal, and a capacity part; at least one via conductor that are formed in the insulating layer and electrically connected to the second terminal; and an adhesion layer that is in contact with the second terminal on an end face of the second terminal which are close to the second principal surface. The electronic component is laminated with the insulating layer, and adhesion strength between the adhesion layer and the insulating layer is higher than that between the second terminal and the insulating layer.

公开(公告)号：US10340088B2

公开(公告)日：2019-07-02

申请号：US15899403

申请日：2018-02-20

Applicant: TDK CORPORATION

Inventor： Koichi Tsunoda ,  Mitsuhiro Tomikawa ,  Kazuhiro Yoshikawa ,  Kenichi Yoshida

IPC: H01G4/33 ,  H01G9/04 ,  H01G9/07 ,  H01G9/012 ,  H01G2/02 ,  H01G4/224 ,  H01G4/228

Abstract: In a thin-film capacitor, an electrode terminal layer is divided into a plurality of parts by a penetration portion, and includes a frame portion as one divided part. The frame portion is disposed along an outer edge of the electrode terminal layer when viewed from the bottom surface side of the electrode terminal layer, and the frame portion can hinder deformation of the electrode terminal layer stretching or warping in a thickness direction or an in-plane direction, whereby such deformation can be prevented. Accordingly, in the thin-film capacitor, the electrode terminal layer is not likely to be deformed and an improvement in strength thereof is achieved.

公开(公告)号：US10205250B2

公开(公告)日：2019-02-12

申请号：US14219766

申请日：2014-03-19

Applicant: TDK CORPORATION

Inventor： Kenichi Yoshida ,  Yuhei Horikawa ,  Hisayuki Abe

IPC: B32B15/01 ,  H01R4/02 ,  B23K35/00 ,  H05K3/34 ,  H05K3/40 ,  H01L23/00

Abstract: A junction structure for electronic device having an excellent bonding strength is provided. A junction structure for electronic device in accordance with one aspect of the present invention includes a first metal layer containing nickel and a second metal layer containing gold, tin, and nickel, while the second metal layer includes an AuSn eutectic phase.

公开(公告)号：US09930779B2

公开(公告)日：2018-03-27

申请号：US15581606

申请日：2017-04-28

Applicant: TDK CORPORATION

Inventor： Kenichi Yoshida ,  Tatsuya Harada

IPC: H05K1/09 ,  H05K1/11 ,  H05K3/42 ,  H05K3/16

CPC classification number: H05K1/115 ,  C23C28/02 ,  H01L21/768 ,  H01L23/147 ,  H01L23/48 ,  H05K1/0306 ,  H05K1/09 ,  H05K3/16 ,  H05K3/422 ,  H05K3/426 ,  H05K2201/0317 ,  H05K2201/09563 ,  H05K2201/0959

Abstract: A through wiring substrate comprises a substrate having a pair of principal surfaces and a through hole penetrating between the pair of principal surfaces, the pair of principal surfaces and an inner surface of the through hole being electrically insulative; a through electrode provided on the inner surface of the through hole; a first wiring layer provided on one of the principal surfaces and connected to the through electrode; a second wiring layer provided on the other of the principal surfaces and connected to the through electrode; an underlying metal layer provided between the one of the principal surfaces and the first wiring layer; and catalyst metal particles existing between the underlying metal layer and the first wiring layer and between the through electrode and the inner surface of the through hole.

公开(公告)号：US09257402B2

公开(公告)日：2016-02-09

申请号：US13960330

申请日：2013-08-06

Applicant: TDK CORPORATION

Inventor： Kenichi Yoshida ,  Makoto Orikasa ,  Hideyuki Seike ,  Yuhei Horikawa ,  Hisayuki Abe

IPC: H01L23/48 ,  H01L23/00

CPC classification number: H01L24/13 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05571 ,  H01L2224/05655 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13006 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/13111 ,  H01L2924/00014 ,  H01L2224/05572 ,  H01L2924/00015 ,  H01L2924/00012 ,  H01L2224/05552

Abstract: A preferred terminal structure comprises a base material; an electrode formed on the base material; an insulating covering layer formed on the base material and on the electrode and having an opening exposing at least part of the electrode; an under bump metal layer containing Ni, formed in a region in the opening on the electrode so that an upper surface of the metal layer is at a position lower than an upper surface of the insulating covering layer in a peripheral edge portion of the opening; and a dome-shaped bump containing Sn and Ti, formed in a region in the opening on the under bump metal layer, wherein an end portion of a boundary between the under bump metal layer and the bump is in contact with an inner wall of the opening portion in the insulating covering layer.

Abstract translation: 优选的端子结构包括基材; 形成在基材上的电极; 绝缘覆盖层，形成在所述基底材料上和所述电极上，并且具有暴露所述电极的至少一部分的开口; 在所述电极的开口部的区域形成含有Ni的下凸块金属层，使得所述金属层的上表面位于比所述开口的周缘部的绝缘覆盖层的上表面低的位置; 以及形成在下凸块金属层的开口部的区域中的包含Sn和Ti的圆顶状的凸部，其中，下凸块状金属层与凸块之间的边界的端部与内凸块 绝缘覆盖层的开口部。

公开(公告)号：US09177687B2

公开(公告)日：2015-11-03

申请号：US13677509

申请日：2012-11-15

Applicant: TDK CORPORATION

Inventor： Kenichi Yoshida ,  Yuhei Horikawa ,  Makoto Orikasa ,  Hideyuki Seike

IPC: B32B15/01 ,  H01B1/02 ,  C22C5/04 ,  C23C18/16 ,  C23C18/00 ,  C25D3/00 ,  C25D5/00 ,  C23C18/34 ,  C23C18/44 ,  C23C18/54

CPC classification number: H01B1/026 ,  C22C5/04 ,  C23C18/1651 ,  C23C18/34 ,  C23C18/44 ,  C23C18/54 ,  H01B1/02 ,  Y10T428/12701 ,  Y10T428/12722 ,  Y10T428/12778 ,  Y10T428/12861 ,  Y10T428/12889 ,  Y10T428/12903

Abstract: A coating for a conductor, the coating having a layered structure of a palladium layer. The palladium layer has a crystal plane whose orientation rate is 65% or more, which means 65% or more of the crystal planes of the palladium layer are aligned to this crystal plane. Preferably the crystal plane whose orientation rate is 65% or more in the coating is the (111) plane or (200) plane.

Abstract translation: 一种用于导体的涂层，该涂层具有钯层的层状结构。 钯层具有取向率为65％以上的晶面，这意味着钯层的65％以上的晶面与该晶面对准。 优选地，涂层中取向率为65％以上的晶面是（111）面或（200）面。

公开(公告)号：US20130135834A1

公开(公告)日：2013-05-30

申请号：US13677432

申请日：2012-11-15

Applicant: TDK CORPORATION

Inventor： Yuhei Horikawa ,  Shin Fujita ,  Kenichi Yoshida ,  Hisayuki Abe ,  Makoto Orikasa ,  Hideyuki Seike

IPC: H05K1/11 ,  H01R43/00 ,  H01R4/02

CPC classification number: H05K1/11 ,  H01R4/02 ,  H01R43/00 ,  H05K1/111 ,  H05K1/141 ,  H05K3/244 ,  H05K3/3436 ,  H05K3/3494 ,  Y02P70/613 ,  Y10T29/49204

Abstract: The electronic device includes a terminal structure and a printed circuit board including the terminal structure. The terminal structure includes a solder-joint conductor region placed on a wiring conductor, an intermediate layer contacting with the conductor region, and a solder region contacting with the intermediate layer. The intermediate layer includes an intermetallic compound including tin and at least one of copper and nickel as principal components. When the indentation elastic modulus of the conductor region is E1 and the indentation elastic modulus of the intermediate layer is E2, the ratio of E1 to E2 is equal to or more than 0.8 and equal to or less than 1.5.

Abstract translation: 电子设备包括端子结构和包括端子结构的印刷电路板。 端子结构包括放置在布线导体上的焊点导体区域，与导体区域接触的中间层以及与中间层接触的焊料区域。 中间层包括包含锡和铜和镍中的至少一种作为主要成分的金属间化合物。 当导体区域的压痕弹性模量为E1，中间层的压痕弹性模量为E2时，E1与E2的比例等于或大于0.8且等于或小于1.5。