公开(公告)号：US20240274530A1

公开(公告)日：2024-08-15

申请号：US18107600

申请日：2023-02-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Siraj Akhtar ,  Vineethraj Rajappan Nair ,  Robert Taft ,  Swaminathan Sankaran

IPC: H01L23/528 ,  H01L23/00 ,  H01L23/522

CPC classification number: H01L23/528 ,  H01L23/5226 ,  H01L24/08 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/08113 ,  H01L2224/16054 ,  H01L2224/16055 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/48225 ,  H01L2224/48465 ,  H01L2924/15311

Abstract: An integrated circuit includes a semiconductor die, a package substrate having opposite first and second surfaces, where the first surface includes a first metal pad, the second surface includes a second metal pad and a third metal pad. The semiconductor die is mounted on the second metal pad and the third metal pad by respective first and second metal interconnects. The package substrate includes a circuit with a single-ended terminal and a pair of differential terminals, where the single-ended terminal coupled to the first metal pad. The backage substrate also includes a metal layer including a first meandered conductor and a second meandered conductor. The first meandered conductor is coupled between a first terminal of the pair of differential terminals and the second metal pad. The second meandered conductor is coupled between a second terminal of the pair of differential terminals and the third metal pad.

公开(公告)号：US20200212899A1

公开(公告)日：2020-07-02

申请号：US16585155

申请日：2019-09-27

Applicant: Texas Instruments Incorporated

Inventor： Tolga Dinc ,  Salvatore Luciano Finocchiaro ,  Gerd Schuppener ,  Siraj Akhtar ,  Swaminathan Sankaran ,  Baher Haroun

IPC: H03K5/02 ,  G01R25/04 ,  H03H7/01 ,  H03K5/26

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to provide phase imbalance correction. An example system includes a phase detector to obtain a first signal and generate a first output, a comparator coupled to the phase detector, the comparator to generate a second output based on the first output, and an amplifier coupled to the comparator, the amplifier to adjust a first phase response of the first signal based on the second output.

公开(公告)号：US20180025098A1

公开(公告)日：2018-01-25

申请号：US15676632

申请日：2017-08-14

Applicant: Texas Instruments Incorporated

Inventor： Himanshu Arora ,  Siraj Akhtar ,  Nikolaus Klemmer

IPC: G06F17/50 ,  H03B5/12 ,  H03K3/013

CPC classification number: G06F17/50 ,  G06F17/505 ,  G06F17/5063 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/124 ,  H03B2200/009 ,  H03K3/013

Abstract: A voltage-controlled oscillator (VCO), includes a resonator circuit connected to receive an input voltage and having a first output node and a second output node; and at least one cross-coupled switching circuit portion, each cross-coupled switching circuit portion comprising a first transistor having a drain connected to the first output node and a second transistor having a drain connected to the second output node, the first transistor having a gate connected between the drain of the second transistor and the second output node and the second transistor having a gate connected between the drain of the first transistor and the first output node, each of the first and second transistors having a threshold voltage that is determined to be the highest threshold voltage available for the process used to create the VCO.

公开(公告)号：US20170338791A1

公开(公告)日：2017-11-23

申请号：US15672070

申请日：2017-08-08

Applicant: Texas Instruments Incorporated

Inventor： Siraj Akhtar ,  Richard Francis Taylor ,  Petteri Litmanen

IPC: H03H7/42 ,  H01F27/28 ,  H01L49/02 ,  H01F27/29 ,  H01F21/12 ,  H01L23/522 ,  H01F41/04 ,  H01L23/64 ,  H01L23/66

CPC classification number: H03H7/42 ,  H01F21/12 ,  H01F27/2804 ,  H01F27/29 ,  H01F41/041 ,  H01L23/5227 ,  H01L23/645 ,  H01L23/66 ,  H01L28/10 ,  H01L2223/6655 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In described examples of a magnetically coupled structure on a substrate with an integrated circuit device, the structure includes a first coil in a differential configuration, a second coil located above the first coil in a generally stacked configuration, and a center tap connection to a winding of the second coil. The first coil includes a first differential terminal, a second differential terminal, and metal windings of the first coil. The first coil's metal windings form a continuous spiral electrical path between the first and second differential terminals. The first coil's metal windings include turns and crossing connections between the turns. The turns are fabricated in an integrated circuit metal wiring level, and the crossing connections are fabricated in at least one metal level other than the metal wiring level containing the turns. The center tap is positioned to create a balanced structure.

公开(公告)号：US09735753B2

公开(公告)日：2017-08-15

申请号：US15003030

申请日：2016-01-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Siraj Akhtar ,  Richard Francis Taylor ,  Petteri Litmanen

IPC: H01L23/522 ,  H03H7/42 ,  H01L23/64 ,  H01L23/66 ,  H01L49/02 ,  H01F21/12 ,  H01F27/28 ,  H01F27/29 ,  H01F41/04

CPC classification number: H03H7/42 ,  H01F21/12 ,  H01F27/2804 ,  H01F27/29 ,  H01F41/041 ,  H01L23/5227 ,  H01L23/645 ,  H01L23/66 ,  H01L28/10 ,  H01L2223/6655 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A magnetically-coupled structure is integrated with an integrated circuit in back end-of-line (BEOL) digital CMOS fabrication processes. A differential primary (or secondary) coil is formed by patterning a thick copper (Cu) metal layer, and a single-ended secondary (or primary) coil is formed by patterning a thick aluminum (Al) top metal bonding layer. Crossovers and/or cross-unders are formed using thin metal layers. One embodiment provides a stacked balun with a differential primary input winding defined in the copper layer, directly underneath a single-ended spiral winding defined in the aluminum layer. The spiral forms the single-ended secondary output of the balun and is rotated by 90° to prevent metal shorting for its cross-under connections. Another embodiment provides a transformer with one differential primary (or secondary) coil defined in the copper layer and another differential secondary (or primary) coil defined in the aluminum layer and adding a center tap. The position of the tap is selected to compensate for phase differences and provide desired balance.

公开(公告)号：US20170207795A1

公开(公告)日：2017-07-20

申请号：US15408396

申请日：2017-01-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Diptendu Ghosh ,  Petteri Matti Litmanen ,  Siraj Akhtar

IPC: H03M1/66 ,  H03H7/01

CPC classification number: H03H7/0115 ,  H03M1/0631 ,  H03M1/66

Abstract: A DAC design uses a passive reconstruction filter. The reconstruction filter includes a notch filter and series peaking filter (low pass filter with peaking in the signal passband). The notch filter provides notch filtering at the DAC clock frequency. The peaking filter increases signal bandwidth while attenuating frequency contents at harmonics of the DAC clock frequency. The notch filter can be an LC notch filter with at least one notch inductor Ln and at least one notch capacitor Cn. The peaking filter can be a series peaking inductor Ls (shunted with a filter capacitor Cp). In a differential configuration, the passive reconstruction filter can be configured with ±LC notch filters (with ±Ln notch inductors), and the peaking filter can be ±Ls peaking inductors coupled in series to the ±LC notch filters. The ±Ln notch inductors, ±Ls peaking inductors can be mutually wound as single inductors. For an example direct conversion RF transmit chain, IQ± signal paths are implemented with differential DAC designs including passive reconstruction filters.

公开(公告)号：US09484630B2

公开(公告)日：2016-11-01

申请号：US14734371

申请日：2015-06-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Baher S. Haroun ,  Marco Corsi ,  Siraj Akhtar ,  Nirmal C. Warke

IPC: H01Q1/24 ,  H01Q3/44 ,  H01L23/66 ,  H01Q3/26 ,  H01Q9/04 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01Q3/44 ,  H01L23/3107 ,  H01L23/66 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/3011 ,  H01Q3/26 ,  H01Q9/0407 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In some developing interconnect technologies, such as chip-to-chip optical interconnect or metal waveguide interconnects, misalignment can be a serious issue. Here, however, a interconnect that uses an on-chip directional antenna (which operates in the sub-millimeter range) to form a radio frequency (RF) interconnect through a dielectric waveguide is provided. This system allows for misalignment while providing the increased communication bandwidth.

公开(公告)号：US12126309B2

公开(公告)日：2024-10-22

申请号：US16557571

申请日：2019-08-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Siraj Akhtar ,  Swaminathan Sankaran

IPC: H03F1/26 ,  H03F3/183 ,  H03F3/45 ,  H03H11/28 ,  H03F1/30 ,  H03F3/50

CPC classification number: H03F1/26 ,  H03F3/183 ,  H03H11/28 ,  H03F1/306 ,  H03F3/505 ,  H03F2200/03 ,  H03F2200/318

Abstract: In an example apparatus, a first transistor has a base terminal, a first current terminal and a second current terminal. The base terminal is coupled to an input voltage node. A second transistor has a control terminal, a third current terminal and a fourth current terminal. The third current terminal is coupled to the second current terminal. The fourth current terminal is coupled to a first resistor. A second resistor is coupled to the control terminal. An inductor is coupled between the first resistor and a ground terminal.

公开(公告)号：US11863360B2

公开(公告)日：2024-01-02

申请号：US17584099

申请日：2022-01-25

Applicant: Texas Instruments Incorporated

Inventor： Kumar Anurag Shrivastava ,  Siraj Akhtar ,  Swaminathan Sankaran ,  Anant Shankar Kamath

IPC: H03C1/06 ,  H03C1/36 ,  H04L27/04

CPC classification number: H04L27/04 ,  H03C1/06 ,  H03C1/36

Abstract: An example apparatus includes: an on-off keying (OOK) modulator including: a first transistor including a first control terminal; a second transistor including a first current terminal, a second current terminal, and a second control terminal, the first current terminal coupled to the first control terminal; a third transistor including a third current terminal, a fourth current terminal, and a third control terminal, the third current terminal coupled to the first control terminal; a fourth transistor including a fifth current terminal, the fifth current terminal coupled to the second current terminal; and a fifth transistor including a sixth current terminal, the sixth current terminal coupled to the fourth current terminal.

公开(公告)号：US20230308323A1

公开(公告)日：2023-09-28

申请号：US17584099

申请日：2022-01-25

Applicant: Texas Instruments Incorporated

Inventor： Kumar Anurag Shrivastava ,  Siraj Akhtar ,  Swaminathan Sankaran ,  Anant Shankar Kamath

IPC: H04L27/04

CPC classification number: H04L27/04

Abstract: An example apparatus includes: an on-off keying (OOK) modulator including: a first transistor including a first control terminal; a second transistor including a first current terminal, a second current terminal, and a second control terminal, the first current terminal coupled to the first control terminal; a third transistor including a third current terminal, a fourth current terminal, and a third control terminal, the third current terminal coupled to the first control terminal; a fourth transistor including a fifth current terminal, the fifth current terminal coupled to the second current terminal; and a fifth transistor including a sixth current terminal, the sixth current terminal coupled to the fourth current terminal.