公开(公告)号：US10971357B2

公开(公告)日：2021-04-06

申请号：US16152395

申请日：2018-10-04

Applicant: Applied Materials, Inc.

Inventor： Wei Liu ,  Theresa Kramer Guarini ,  Linlin Wang ,  Malcolm Bevan ,  Johanes S. Swenberg ,  Vladimir Nagorny ,  Bernard L. Hwang ,  Kin Pong Lo ,  Lara Hawrylchak ,  Rene George

IPC: H01L21/02

Abstract: A method of modifying a layer in a semiconductor device is provided. The method includes depositing a low quality film on a semiconductor substrate, and exposing a surface of the low quality film to a first process gas comprising helium while the substrate is heated to a first temperature, and exposing a surface of the low quality film to a second process gas comprising oxygen gas while the substrate is heated to a second temperature that is different than the first temperature. The electrical properties of the film are improved by undergoing the aforementioned processes.

公开(公告)号：US10431466B2

公开(公告)日：2019-10-01

申请号：US16159461

申请日：2018-10-12

Applicant: Applied Materials, Inc.

Inventor： Johanes S. Swenberg ,  Wei Liu ,  Houda Graoui ,  Steven C. H. Hung

IPC: H01L21/28 ,  H01L29/40 ,  H01L21/02 ,  H01L21/324 ,  H01L21/321 ,  H01L21/285 ,  H01L29/45 ,  H01L21/768

Abstract: Embodiments described herein generally relate to enable the formation of a metal gate structure with a reduced effective oxide thickness over a similar structure formed via conventional methods. A plasma hydrogenation process followed by a plasma nitridization process is performed on a metal nitride layer in a film stack, thereby removing oxygen atoms disposed within layers of the film stack and, in some embodiments eliminating an oxygen-containing interfacial layer disposed within the film stack. As a result, an effective oxide thickness of the metal gate structure is reduced with little or no accompanying flatband voltage shift. Further, the metal gate structure operates with an increased leakage current that is as little as one quarter the increase in leakage current associated with a similar metal gate structure formed via conventional techniques.

公开(公告)号：US10290504B2

公开(公告)日：2019-05-14

申请号：US15822435

申请日：2017-11-27

Applicant: Applied Materials, Inc.

Inventor： Wei Liu ,  Theresa Kramer Guarini ,  Huy Q. Nguyen ,  Malcolm Bevan ,  Houda Graoui ,  Philip A. Bottini ,  Bernard L. Hwang ,  Lara Hawrylchak ,  Rene George

IPC: H01L21/28 ,  H01L21/3105 ,  H01J37/32 ,  H01L29/51

Abstract: Embodiments described herein generally relate to a method and apparatus for plasma treating a process chamber. A substrate having a gate stack formed thereon may be placed in a process chamber, and hydrogen containing plasma may be used to treat the gate stack in order to cure the defects in the gate stack. As the result of hydrogen containing plasma treatment, the gate stack has lower leakage and improved reliability. To protect the process chamber from Hx+ ions and H* radicals generated by the hydrogen containing plasma, the process chamber may be treated with a plasma without the substrate placed therein and prior to the hydrogen containing plasma treatment. In addition, components of the process chamber that are made of a dielectric material may be coated with a ceramic coating including an yttrium containing oxide in order to protect the components from the plasma.

公开(公告)号：US09048190B2

公开(公告)日：2015-06-02

申请号：US14044090

申请日：2013-10-02

Applicant: APPLIED MATERIALS, INC.

Inventor： Jeffrey Tobin ,  Bernard L. Hwang ,  Canfeng Lai ,  Lara Hawrylchak ,  Wei Liu ,  Johanes Swenberg

IPC: H01L21/311 ,  H01L21/461 ,  H01L21/3065 ,  H01L21/67

CPC classification number: H01L21/67069 ,  H01J37/32082 ,  H01J37/32091 ,  H01J37/32357 ,  H01J37/32422 ,  H01L21/0217 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/67103 ,  H01L21/67115 ,  H01L21/6831

Abstract: Methods and apparatus for processing a substrate are provided. In some embodiments, a method of processing a substrate having a first layer may include disposing a substrate atop a substrate support in a lower processing volume of a process chamber beneath an ion shield having a bias power applied thereto, the ion shield comprising a substantially flat member supported parallel to the substrate support, and a plurality of apertures formed through the flat member, wherein the ratio of the aperture diameter to the thickness flat member ranges from about 10:1-1:10; flowing a process gas into an upper processing volume above the ion shield; forming a plasma from the process gas within the upper processing volume; treating the first layer with neutral radicals that pass through the ion shield; and heating the substrate to a temperature of up to about 550 degrees Celsius while treating the first layer.

Abstract translation: 提供了用于处理基板的方法和装置。 在一些实施例中，处理具有第一层的衬底的方法可以包括将衬底支撑件顶部放置在具有施加到其上的偏置功率的离子屏蔽下方的处理室下部处理体积中，离子屏蔽包括基本平坦的 平行于衬底支撑件支撑的构件和穿过平坦构件形成的多个孔，其中孔径与厚度平坦构件的比例为约10:1-1:10; 将处理气体流入离子屏蔽物上方的上部处理体积; 从所述上加工容积内的工艺气体形成等离子体; 用通过离子屏蔽的中性自由基处理第一层; 并且在处理第一层的同时将基底加热至高达约550摄氏度的温度。

公开(公告)号：US12261047B2

公开(公告)日：2025-03-25

申请号：US17882177

申请日：2022-08-05

Applicant: Applied Materials, Inc.

Inventor： Wolfgang Aderhold ,  Yi-Chiau Huang ,  Wei Liu ,  Benjamin Colombeau ,  Abhilash Mayur

IPC: H01L21/20 ,  H01L21/225 ,  H01L21/324 ,  H01L21/02 ,  H10B41/27 ,  H10B43/27

Abstract: A method of selectively and conformally doping semiconductor materials is disclosed. Some embodiments utilize a conformal dopant film deposited selectively on semiconductor materials by thermal decomposition. Some embodiments relate to doping non-line of sight surfaces. Some embodiments relate to methods for forming a highly doped crystalline semiconductor layer.

公开(公告)号：US20240420953A1

公开(公告)日：2024-12-19

申请号：US18209719

申请日：2023-06-14

Applicant: Applied Materials, Inc.

Inventor： Rui Lu ,  Bo Xie ,  Wei Liu ,  Shanshan Yao ,  Xiaobo Li ,  Jingmei Liang ,  Li-Qun Xia ,  Shankar Venkataraman ,  Chi-I Lang

IPC: H01L21/02

Abstract: Exemplary processing methods may include providing a treatment precursor to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may include a layer of a silicon-containing material. The methods may include forming inductively-coupled plasma effluents of the treatment precursor. The methods may include contacting the layer of the silicon-containing material with the inductively-coupled plasma effluents of the treatment precursor to produce a treated layer of the silicon-containing material. The contacting may reduce a dielectric constant of the layer of the silicon-containing material.

公开(公告)号：US20230178375A1

公开(公告)日：2023-06-08

申请号：US17541582

申请日：2021-12-03

Applicant: Applied Materials, Inc.

Inventor： Kunal Bhatnagar ,  Wei Liu ,  Shashank Sharma ,  Archana Kumar ,  Mohith Verghese ,  Jose Alexandro Romero

IPC: H01L21/28 ,  H01L29/49 ,  H01L29/40 ,  H01L21/285 ,  H01L21/3215

CPC classification number: H01L21/28088 ,  H01L21/3215 ,  H01L21/28556 ,  H01L29/401 ,  H01L29/4966

Abstract: Method of forming film stacks and film stacks for electronic devices are described herein. The methods comprise depositing a molybdenum nucleation layer on a gate oxide layer; depositing a molybdenum layer on the molybdenum nucleation layer; and performing a plasma nitridation process to insert nitrogen atoms into the molybdenum layer to form a work function modulating layer having an effective work function ≤ 4.5 eV. The plasma nitridation process comprises exposing the molybdenum layer to a radical-rich plasma comprising one or more of N2 or NH3. Some methods further comprise one or more of annealing the work function modulating layer, depositing a conductive layer on the work function modulating layer, or performing an etch process.

公开(公告)号：US11615986B2

公开(公告)日：2023-03-28

申请号：US17477741

申请日：2021-09-17

Applicant: Applied Materials, Inc.

Inventor： Xuebin Li ,  Wei Liu ,  Gaurav Thareja ,  Shashank Sharma ,  Patricia M. Liu ,  Schubert Chu

IPC: H01L21/768 ,  H01L21/285 ,  H01L21/67 ,  H01L29/40 ,  H01L21/02 ,  H01L21/321 ,  H01L23/532 ,  H01L21/8234 ,  H01L21/3205 ,  H01L29/417

Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.

公开(公告)号：US11443948B2

公开(公告)日：2022-09-13

申请号：US16536600

申请日：2019-08-09

Applicant: Applied Materials, Inc.

Inventor： Wolfgang Aderhold ,  Yi-Chiau Huang ,  Wei Liu ,  Benjamin Colombeau ,  Abhilash Mayur

IPC: H01L21/82 ,  H01L29/66 ,  H01L21/225 ,  H01L21/324 ,  H01L21/02 ,  H01L27/11582 ,  H01L27/11556

Abstract: A method of selectively and conformally doping semiconductor materials is disclosed. Some embodiments utilize a conformal dopant film deposited selectively on semiconductor materials by thermal decomposition. Some embodiments relate to doping non-line of sight surfaces. Some embodiments relate to methods for forming a highly doped crystalline semiconductor layer.

公开(公告)号：US11152221B2

公开(公告)日：2021-10-19

申请号：US16784460

申请日：2020-02-07

Applicant: Applied Materials, Inc.

Inventor： Xuebin Li ,  Wei Liu ,  Gaurav Thareja ,  Shashank Sharma ,  Patricia M. Liu ,  Schubert Chu

IPC: H01L21/321 ,  H01L21/285 ,  H01L21/768 ,  H01L21/67 ,  H01L29/40 ,  H01L21/02 ,  H01L23/532 ,  H01L21/8234 ,  H01L21/3205 ,  H01L29/417

Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.