公开(公告)号：US11649560B2

公开(公告)日：2023-05-16

申请号：US16530641

申请日：2019-08-02

Applicant: Applied Materials, Inc.

Inventor： Errol Antonio C Sanchez ,  Mark J. Saly ,  Schubert Chu ,  Abhishek Dube ,  Srividya Natarajan

IPC: H01L21/00 ,  C30B29/54 ,  C07F9/50 ,  H01L29/08 ,  H01L21/02 ,  C30B25/02

CPC classification number: C30B29/54 ,  C07F9/5009 ,  C30B25/02 ,  H01L21/0262 ,  H01L21/02521 ,  H01L29/0843

Abstract: Embodiments generally relate to methods for depositing silicon-phosphorous materials, and more specifically, relate to using silicon-phosphorous compounds in vapor deposition processes (e.g., epitaxy, CVD, or ALD) to deposit silicon-phosphorous materials. In one or more embodiments, a method for forming a silicon-phosphorous material on a substrate is provided and includes exposing the substrate to a deposition gas containing one or more silicon-phosphorous compounds during a deposition process and depositing a film containing the silicon-phosphorous material on the substrate. The silicon-phosphorous compound has the chemical formula [(R3-vHvSi)—(R2-wHwSi)n]xPHyR′z, where each instance of R and each instance of R′ are independently an alkyl or a halogen, n is 0, 1, or 2; v is 0, 1, 2, or 3; w is 0, 1, or 2; x is 1, 2, or 3; y is 0, 1, or 2; z is 0, 1, or 2, and where x+y+z=3.

公开(公告)号：US12015042B2

公开(公告)日：2024-06-18

申请号：US16797807

申请日：2020-02-21

Applicant: Applied Materials, Inc.

Inventor： Papo Chen ,  Schubert Chu ,  Errol Antonio C Sanchez ,  John Timothy Boland ,  Zhiyuan Ye ,  Lori Washington ,  Xianzhi Tao ,  Yi-Chiau Huang ,  Chen-Ying Wu

IPC: H01L27/146 ,  H01L31/18

CPC classification number: H01L27/14636 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689 ,  H01L31/1892

Abstract: A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.

公开(公告)号：US11643721B2

公开(公告)日：2023-05-09

申请号：US16129232

申请日：2018-09-12

Applicant: Applied Materials, Inc.

Inventor： Feng Q. Liu ,  Hua Chung ,  Schubert Chu ,  Mei Chang ,  Jeffrey W. Anthis ,  David Thompson

IPC: C23C16/42 ,  C23C16/513 ,  C23C16/455 ,  C23C16/52 ,  C23C16/507 ,  C23C16/14

CPC classification number: C23C16/42 ,  C23C16/14 ,  C23C16/45536 ,  C23C16/45542 ,  C23C16/507 ,  C23C16/513 ,  C23C16/52

Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.

公开(公告)号：US11946135B2

公开(公告)日：2024-04-02

申请号：US18190246

申请日：2023-03-27

Applicant: Applied Materials, Inc.

Inventor： Feng Q. Liu ,  Hua Chung ,  Schubert Chu ,  Mei Chang ,  Jeffrey W. Anthis ,  David Thompson

IPC: C23C16/42 ,  C23C16/14 ,  C23C16/455 ,  C23C16/507 ,  C23C16/513 ,  C23C16/52

CPC classification number: C23C16/42 ,  C23C16/14 ,  C23C16/45536 ,  C23C16/45542 ,  C23C16/507 ,  C23C16/513 ,  C23C16/52

Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.

公开(公告)号：US11781212B2

公开(公告)日：2023-10-10

申请号：US17224537

申请日：2021-04-07

Applicant: Applied Materials, Inc.

Inventor： Zhepeng Cong ,  Schubert Chu ,  Nyi Oo Myo ,  Kartik Bhupendra Shah ,  Zhiyuan Ye ,  Richard O. Collins

IPC: C23C14/24 ,  H01L21/67 ,  C23C14/50

CPC classification number: C23C14/24 ,  C23C14/50 ,  H01L21/67017

Abstract: Embodiments disclosed herein generally provide improved control of gas flow in processing chambers. In at least one embodiment, a liner for a processing chamber includes an annular body having a sidewall and a vent formed in the annular body for exhausting gas from inside to outside the annular body. The vent comprises one or more vent holes disposed through the sidewall. The liner further includes an opening in the annular body for substrate loading and unloading.

公开(公告)号：US11189508B2

公开(公告)日：2021-11-30

申请号：US16581029

申请日：2019-09-24

Applicant: Applied Materials, Inc.

Inventor： Ji-Dih Hu ,  Brian H. Burrows ,  Janardhan Devrajan ,  Schubert Chu

IPC: H01L21/67 ,  C23C16/44 ,  C30B25/08 ,  G01J5/00 ,  H05B3/00 ,  G01K11/12 ,  G01J5/02 ,  G01J5/08

Abstract: Embodiments described herein generally relate to an in-situ metrology system that can constantly provide an uninterrupted optical access to a substrate disposed within a process chamber. In one embodiment, a metrology system for a substrate processing chamber is provided. The metrology system includes a sensor view pipe coupling to a quartz dome of a substrate processing chamber, a flange extending radially from an outer surface of the sensor view pipe, and a viewport window disposed on the flange, the viewport window having spectral ranges chosen for an optical sensor that is disposed on or adjacent to the viewport window.

公开(公告)号：US20190078203A1

公开(公告)日：2019-03-14

申请号：US16129232

申请日：2018-09-12

Applicant: Applied Materials, Inc.

Inventor： Feng Q. Liu ,  Hua Chung ,  Schubert Chu ,  Mei Chang ,  Jeffrey W. Anthis ,  David Thompson

IPC: C23C16/42 ,  C23C16/52 ,  C23C16/455 ,  C23C16/513

Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.

公开(公告)号：US20230227968A1

公开(公告)日：2023-07-20

申请号：US18190246

申请日：2023-03-27

Applicant: Applied Materials, Inc.

Inventor： Feng Q. Liu ,  Hua Chung ,  Schubert Chu ,  Mei Chang ,  Jeffrey W. Anthis ,  David Thompson

IPC: C23C16/42 ,  C23C16/513 ,  C23C16/455 ,  C23C16/52 ,  C23C16/507 ,  C23C16/14

CPC classification number: C23C16/42 ,  C23C16/513 ,  C23C16/45536 ,  C23C16/52 ,  C23C16/507 ,  C23C16/45542 ,  C23C16/14

Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.

公开(公告)号：US11615986B2

公开(公告)日：2023-03-28

申请号：US17477741

申请日：2021-09-17

Applicant: Applied Materials, Inc.

Inventor： Xuebin Li ,  Wei Liu ,  Gaurav Thareja ,  Shashank Sharma ,  Patricia M. Liu ,  Schubert Chu

IPC: H01L21/768 ,  H01L21/285 ,  H01L21/67 ,  H01L29/40 ,  H01L21/02 ,  H01L21/321 ,  H01L23/532 ,  H01L21/8234 ,  H01L21/3205 ,  H01L29/417

Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.

公开(公告)号：US11152221B2

公开(公告)日：2021-10-19

申请号：US16784460

申请日：2020-02-07

Applicant: Applied Materials, Inc.

Inventor： Xuebin Li ,  Wei Liu ,  Gaurav Thareja ,  Shashank Sharma ,  Patricia M. Liu ,  Schubert Chu

IPC: H01L21/321 ,  H01L21/285 ,  H01L21/768 ,  H01L21/67 ,  H01L29/40 ,  H01L21/02 ,  H01L23/532 ,  H01L21/8234 ,  H01L21/3205 ,  H01L29/417

Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.