利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

87 条记录 (耗时 0.046 秒)

    Process for gate oxide side-wall protection from plasma damage to form highly reliable gate dielectrics
    22.
    发明授权
    Process for gate oxide side-wall protection from plasma damage to form highly reliable gate dielectrics 有权
    栅极氧化物侧壁保护免受等离子体损伤的过程，形成高度可靠的栅极电介质

    公开(公告)号：US06475842B1

    公开(公告)日：2002-11-05

    申请号：US09634401

    申请日：2000-08-09

    申请人： Kean Syn Cheah ,  Hooi Peng Low ,  Yi Ma

    发明人： Kean Syn Cheah ,  Hooi Peng Low ,  Yi Ma

    IPC分类号： H01L21336

    CPC分类号： H01L29/6659 ,  H01L21/28035 ,  H01L21/28247 ,  H01L21/32134 ,  H01L21/32137 ,  H01L21/823864 ,  H01L29/7833

    摘要： The present invention provides a method for manufacturing a semiconductor device. The method includes forming an oxidized portion of an initial gate structure and a sacrificial gate layer, and further includes removing the oxidized portion of the initial gate structure and the sacrificial gate layer to form a transistor device. In an exemplary embodiment, the method further includes subjecting a patterned gate layer to an etch to form the initial gate structure and the sacrificial layer. In an advantageous embodiment, the gate layer is patterned having a width greater than a predetermined design width.

    摘要翻译： 本发明提供一种制造半导体器件的方法。 该方法包括形成初始栅极结构和牺牲栅极层的氧化部分，并且还包括去除初始栅极结构和牺牲栅极层的氧化部分以形成晶体管器件。 在示例性实施例中，该方法还包括对图案化的栅极层进行蚀刻以形成初始栅极结构和牺牲层。 在有利的实施例中，栅极层被图案化，其宽度大于预定的设计宽度。

    Programmable impedance elements and devices that include such elements
    24.
    发明授权
    Programmable impedance elements and devices that include such elements 有权
    可编程阻抗元件和包含这些元件的器件

    公开(公告)号：US09401472B1

    公开(公告)日：2016-07-26

    申请号：US13242391

    申请日：2011-09-23

    申请人： Chakravarthy Gopalan ,  Antonio R. Gallo ,  Yi Ma

    发明人： Chakravarthy Gopalan ,  Antonio R. Gallo ,  Yi Ma

    IPC分类号： H01L45/00 ,  H01L29/41 ,  G11C13/00

    CPC分类号： H01L45/00 ,  G11C13/0009 ,  G11C13/0011 ,  H01L45/085 ,  H01L45/1266 ,  H01L45/1675 ,  H01L45/1683

    摘要： Programmable impedance elements structures, devices and methods are disclosed. Methods can include: forming a first electrode layer within an electrode opening that extends through a cap layer; planarizing to expose a top of the cap layer; cleaning the exposed top surface of the cap layer to remove residual species from previous process steps. Additional methods can include forming at least a base ion conductor layer having an active metal formed therein that may ion conduct within the ion conductor layer; and forming an inhibitor material that mitigates agglomeration of the active metal within the base ion conductor layer as compared to the active metal alone. Programmable impedance elements and/or devices can have switching material and electrodes parallel to both bottoms and sides of a cell opening formed in a cell dielectric. Other embodiments can include an ion conductor layer having an alloy of an active metal, or two ion conductor layers in contact with an active electrode.

    摘要翻译： 公开了可编程阻抗元件的结构，装置和方法。 方法可以包括：在延伸穿过盖层的电极开口内形成第一电极层; 平坦化以暴露盖层的顶部; 清洁盖层的暴露的顶表面以从先前的工艺步骤中除去残留的物质。 附加方法可以包括至少形成其中形成有活性金属的基离子导体层，其可以在离子导体层内离子传导; 以及形成抑制剂材料，其与单独的活性金属相比，减轻了基础离子导体层内的活性金属的聚集。 可编程阻抗元件和/或器件可以具有平行于形成在单元电介质中的单元开口的底部和侧面的开关材料和电极。 其他实施例可以包括具有活性金属或与活性电极接触的两个离子导体层的合金的离子导体层。

    Methods for high figure-of-merit in nanostructured thermoelectric materials
    25.
    发明授权
    Methods for high figure-of-merit in nanostructured thermoelectric materials 有权
    纳米结构热电材料中高品质因数的方法

    公开(公告)号：US08865995B2

    公开(公告)日：2014-10-21

    申请号：US11949353

    申请日：2007-12-03

    申请人： Zhifeng Ren ,  Bed Poudel ,  Gang Chen ,  Yucheng Lan ,  Dezhi Wang ,  Qing Hao ,  Mildred Dresselhaus ,  Yi Ma ,  Xiao Yan ,  Xiaoyuan Chen ,  Xiaowei Wang ,  Joshi R. Giri ,  Bo Yu

    发明人： Zhifeng Ren ,  Bed Poudel ,  Gang Chen ,  Yucheng Lan ,  Dezhi Wang ,  Qing Hao ,  Mildred Dresselhaus ,  Yi Ma ,  Xiao Yan ,  Xiaoyuan Chen ,  Xiaowei Wang ,  Joshi R. Giri ,  Bo Yu

    IPC分类号： H01L35/34 ,  H01L35/16 ,  H01L35/22

    CPC分类号： H01L35/20 ,  H01L35/16 ,  H01L35/18 ,  H01L35/22 ,  H01L35/34

    摘要： Thermoelectric materials with high figures of merit, ZT values, are disclosed. In many instances, such materials include nano-sized domains (e.g., nanocrystalline), which are hypothesized to help increase the ZT value of the material (e.g., by increasing phonon scattering due to interfaces at grain boundaries or grain/inclusion boundaries). The ZT value of such materials can be greater than about 1, 1.2, 1.4, 1.5, 1.8, 2 and even higher. Such materials can be manufactured from a thermoelectric starting material by generating nanoparticles therefrom, or mechanically alloyed nanoparticles from elements which can be subsequently consolidated (e.g., via direct current induced hot press) into a new bulk material. Non-limiting examples of starting materials include bismuth, lead, and/or silicon-based materials, which can be alloyed, elemental, and/or doped. Various compositions and methods relating to aspects of nanostructured thermoelectric materials (e.g., modulation doping) are further disclosed.

    摘要翻译： 公开了具有高品质因数的ZT值的热电材料。 在许多情况下，这样的材料包括纳米尺度的结构域（例如，纳米晶体），其被假定为有助于增加材料的ZT值（例如，通过增加由于界面处的晶界或晶粒/夹杂物边界处的声子散射）。 这种材料的ZT值可以大于约1.2,1.4,1.5,1.8,2甚至更高。 这样的材料可以通过从其中产生纳米颗粒的热电原材料制造，或者可以随后固化（例如，通过直流感应热压机）成为新的散装材料的元件的机械合金纳米颗粒。 起始材料的非限制性实例包括可以合金化，元素化和/或掺杂的铋，铅和/或硅基材料。 进一步公开了与纳米结构的热电材料的方面有关的各种组成和方法（例如，调制掺杂）。

    LANDMARK-BASED LOCATION BELIEF TRACKING FOR VOICE-CONTROLLED NAVIGATION SYSTEM
    26.
    发明申请
    LANDMARK-BASED LOCATION BELIEF TRACKING FOR VOICE-CONTROLLED NAVIGATION SYSTEM 有权
    用于语音控制导航系统的基于LANDMARK的位置直接跟踪

    公开(公告)号：US20130297321A1

    公开(公告)日：2013-11-07

    申请号：US13801441

    申请日：2013-03-13

    申请人： Antoine Raux ,  Rakesh Gupta ,  Deepak Ramachandran ,  Yi Ma

    发明人： Antoine Raux ,  Rakesh Gupta ,  Deepak Ramachandran ,  Yi Ma

    IPC分类号： G01C21/26

    CPC分类号： G01C21/26 ,  G01C21/3608 ,  G01C21/3644

    摘要： An utterance is received from a user specifying a location attribute and a landmark. A set of candidate locations is identified based on the specified location attribute, and a confidence score can be determined for each candidate location. A set of landmarks is identified based on the specified landmark, and confidence scores can be determined for the landmarks. An associated kernel model is generated for each landmark. Each kernel model is centered at the location of the associated landmark on a map, and the amplitude of the kernel model can be based on landmark attributes, landmark confidence scores, characteristics of the user, and the like. The candidate locations are ranked based on the amplitudes of overlapping kernel models at the candidate locations, and can also be ranked based on confidence scores associated with the candidate locations. A candidate location is selected and presented to the user based on the candidate location ranking

    摘要翻译： 从指定位置属性和地标的用户接收到话语。 基于指定的位置属性来识别一组候选位置，并且可以为每个候选位置确定可信度得分。 基于指定的地标识别一组地标，并且可以为地标确定置信度得分。 为每个地标生成相关的内核模型。 每个核心模型集中在地图上相关联的地标的位置，并且内核模型的幅度可以基于地标属性，地标置信度得分，用户特征等。 候选位置基于候选位置处的重叠核心模型的幅度进行排序，并且还可以基于与候选位置相关联的置信度得分进行排名。 基于候选位置排名，选择候选位置并呈现给用户

    Robust recovery of transform invariant low-rank textures
    27.
    发明授权
    Robust recovery of transform invariant low-rank textures 有权
    变换不变低阶纹理的鲁棒恢复

    公开(公告)号：US08463073B2

    公开(公告)日：2013-06-11

    申请号：US12955734

    申请日：2010-11-29

    申请人： Yi Ma ,  Zhengdong Zhang ,  Xiao Liang

    发明人： Yi Ma ,  Zhengdong Zhang ,  Xiao Liang

    IPC分类号： G06K9/36

    CPC分类号： G06K9/6249 ,  G06K9/4671 ,  G06K2009/363 ,  G06T7/40 ,  G06T2207/10024 ,  G06T2207/20012 ,  G06T2207/20016 ,  G06T2207/20021

    摘要： A “Transform Invariant Low-Rank Texture” (TILT) Extractor, referred to as a “TILT Extractor” accurately extracts both textural and geometric information defining regions of low-rank planar patterns from 2D images of a scene, thereby enabling a large range of image processing applications. Unlike conventional feature extraction techniques that rely on point-based features, the TILT Extractor extracts texture regions from an image and derives global correlations or transformations of those regions in 3D (e.g., transformations including translation, rotation, reflection, skew, scale, etc.). These image domain transformations inherently provide information relative to an automatically determinable camera viewing direction. In other words, the TILT Extractor extracts low-rank regions and geometric correlations describing domain transforms of those regions relative to arbitrary camera viewpoints. The TILT Extractor also identifies sparse error in image intensity or other color channels resulting from noise, occlusions or other artifacts, thereby allowing elimination or reduction of such errors in images.

    摘要翻译： 被称为“TILT提取器”的“变形不变低阶纹理”（TILT）提取器从场景的2D图像中精确地提取定义低阶平面图案区域的纹理和几何信息，从而使得 图像处理应用。 与依赖于基于点的特征的常规特征提取技术不同，TILT提取器从图像中提取纹理区域，并导出3D中这些区域的全局相关或变换（例如，包括平移，旋转，反射，偏斜，缩放等）的变换。 ）。 这些图像域转换固有地提供了相对于可自动确定的相机观察方向的信息。 换句话说，TILT提取器提取相对于任意摄像机视点描述这些区域的域变换的低等级区域和几何相关性。 TILT提取器还识别图像强度或由噪声，遮挡或其他伪影引起的其他颜色通道的稀疏误差，从而可以消除或减少图像中的这种错误。

    Recognition via high-dimensional data classification
    28.
    发明授权
    Recognition via high-dimensional data classification 有权
    通过高维数据分类识别

    公开(公告)号：US08406525B2

    公开(公告)日：2013-03-26

    申请号：US12865639

    申请日：2009-01-29

    申请人： Yi Ma ,  Allen Yang Yang ,  John Norbert Wright ,  Andrew William Wagner

    发明人： Yi Ma ,  Allen Yang Yang ,  John Norbert Wright ,  Andrew William Wagner

    IPC分类号： G06K9/66

    CPC分类号： G06K9/00275 ,  G06K9/6232 ,  G06K9/627

    摘要： A method is disclosed for recognition of high-dimensional data in the presence of occlusion, including: receiving a target data that includes an occlusion and is of an unknown class, wherein the target data includes a known object; sampling a plurality of training data files comprising a plurality of distinct classes of the same object as that of the target data; and identifying the class of the target data through linear superposition of the sampled training data files using l1 minimization, wherein a linear superposition with a sparsest number of coefficients is used to identify the class of the target data.

    摘要翻译： 公开了一种用于在存在遮挡的情况下识别高维数据的方法，包括：接收包括闭塞并且是未知类的目标数据，其中所述目标数据包括已知对象; 对包含与所述目标数据相同的对象的多个不同类别的多个训练数据文件进行采样; 以及使用l1最小化通过采样的训练数据文件的线性叠加来识别目标数据的类别，其中使用具有最少数量的系数的线性叠加来标识目标数据的类别。

    Integrated scheme for forming inter-poly dielectrics for non-volatile memory devices
    29.
    发明授权
    Integrated scheme for forming inter-poly dielectrics for non-volatile memory devices 有权
    用于形成用于非易失性存储器件的多晶硅电介质的集成方案

    公开(公告)号：US07910446B2

    公开(公告)日：2011-03-22

    申请号：US12163542

    申请日：2008-06-27

    申请人： Yi Ma ,  Shreyas Kher ,  Khaled Ahmed

    发明人： Yi Ma ,  Shreyas Kher ,  Khaled Ahmed

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7881 ,  H01L21/28273 ,  H01L29/42324

    摘要： Electronic devices and methods for forming electronic devices that allow for a reduction in device dimensions while also maintaining or reducing leakage current for non-volatile memory devices are provided. In one embodiment, a method of fabricating a non-volatile memory device is provided. The method comprises depositing a floating gate polysilicon layer on a substrate, forming a silicon oxide layer on the floating gate polysilicon layer, depositing a first silicon oxynitride layer on the silicon oxide layer, depositing a high-k dielectric material layer on the first silicon oxynitride layer, depositing a second silicon oxynitride on the high-k dielectric material, and forming a control gate polysilicon layer on the second silicon oxynitride layer. In one embodiment, the high-k dielectric material layer comprises hafnium silicon oxynitride.

    摘要翻译： 提供了用于形成电子器件的电子器件和方法，其允许减小器件尺寸，同时还保持或减少用于非易失性存储器件的漏电流。 在一个实施例中，提供了一种制造非易失性存储器件的方法。 该方法包括在衬底上沉积浮栅多晶硅层，在浮栅多晶硅层上形成氧化硅层，在氧化硅层上沉积第一氮氧化硅层，在第一氮氧化硅上沉积高k电介质材料层 在所述高k电介质材料上沉积第二氮氧化硅，以及在所述第二氮氧化硅层上形成控制栅极多晶硅层。 在一个实施例中，高k电介质材料层包括铪硅氮氧化物。