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    Low CTE substrates for use with low-k flip-chip package devices
    27.
    发明授权
    Low CTE substrates for use with low-k flip-chip package devices 有权
    低CTE衬底，用于低k倒装芯片封装器件

    公开(公告)号：US07170159B1

    公开(公告)日：2007-01-30

    申请号：US11160753

    申请日：2005-07-07

    申请人： Szu-Wei Lu ,  Hsin-Hui Lee ,  Chien-Hsiun Lee ,  Mirng-Ji Lii

    发明人： Szu-Wei Lu ,  Hsin-Hui Lee ,  Chien-Hsiun Lee ,  Mirng-Ji Lii

    IPC分类号： H01L23/02

    CPC分类号： H01L23/3128 ,  H01L21/563 ,  H01L23/14 ,  H01L23/15 ,  H01L23/3735 ,  H01L2224/13116 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81805 ,  H01L2224/92125 ,  H01L2924/01019 ,  H01L2924/01037 ,  H01L2924/01068 ,  H01L2924/01322 ,  H05K1/0271 ,  H05K3/4602 ,  H05K2201/068 ,  H05K2201/10674

    摘要： Disclosed are techniques that teach the replacement of the typical organic, plastic, or ceramic package substrate used in semiconductor package devices with a low-CTE package substrate. In one embodiment, a semiconductor device implementing the disclosed techniques is provided, where the device comprises an integrated circuit chip having at least one coupling component formed on an exterior surface thereof. Also, the device includes a package substrate having a mounting surface with bonding pads that are configured to receive the at least one coupling component. In such embodiments, the package substrate is selected or manufactured such that it has a coefficient of thermal expansion in a direction perpendicular to its mounting surface that is less than approximately twice a coefficient of thermal expansion along a plane parallel to its mounting surface.

    摘要翻译： 公开的技术是教导用低CTE封装衬底替代半导体封装器件中典型的有机，塑料或陶瓷封装衬底的技术。 在一个实施例中，提供了实现所公开技术的半导体器件，其中该器件包括集成电路芯片，其具有形成在其外表面上的至少一个耦合部件。 而且，该装置还包括具有安装表面的封装基板，该安装表面具有用于接收至少一个耦合部件的焊盘。 在这样的实施例中，选择或制造封装衬底，使得其沿垂直于其安装表面的方向的热膨胀系数小于其平行于其安装表面的平面的热膨胀系数的大约两倍。

    Rigid Interconnect Structures in Package-on-Package Assemblies
    28.
    发明申请
    Rigid Interconnect Structures in Package-on-Package Assemblies 有权
    封装在封装组件中的刚性互连结构

    公开(公告)号：US20130277841A1

    公开(公告)日：2013-10-24

    申请号：US13452589

    申请日：2012-04-20

    申请人： Mirng-Ji Lii ,  Chen-Hua Yu ,  Chien-Hsiun Lee ,  Yung Ching Chen ,  Jiun Yi Wu

    发明人： Mirng-Ji Lii ,  Chen-Hua Yu ,  Chien-Hsiun Lee ,  Yung Ching Chen ,  Jiun Yi Wu

    IPC分类号： H01L25/07 ,  H01L21/60

    CPC分类号： H01L23/49838 ,  H01L23/49811 ,  H01L23/5283 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/16 ,  H01L24/20 ,  H01L24/24 ,  H01L25/105 ,  H01L2224/16238 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/00014 ,  H01L2924/00

    摘要： System and method are disclosed for creating a rigid interconnect between two substrate mounted packages to create a package-on-package assembly. A solid interconnect may have a predetermined length configured to provide a predetermined package separation, may be cylindrical, conical or stepped, may be formed by extrusion, casting, drawing or milling and may have an anti-oxidation coating. The interconnect may be attached to mounting pads on the top and bottom packages via an electrically conductive adhesive, including, but not limited to solder and solder paste. A solder preservative or other anti-oxidation coating may be applied to the mounting pad. A package-on-package assembly with solid interconnects may have a top package configured to accept at least one electronic device, with the solid interconnects mounted between the top package and a bottom package to rigidly hold the package about parallel to each other.

    摘要翻译： 公开了用于在两个基板安装的封装之间创建刚性互连以产生封装封装组件的系统和方法。 固体互连可以具有预定长度，其被配置为提供预定的包装分离，可以是圆柱形，圆锥形或阶梯形，可以通过挤出，浇铸，拉拔或研磨形成，并且可以具有抗氧化涂层。 互连可以经由导电粘合剂附接到顶部和底部封装上的安装焊盘，包括但不限于焊料和焊膏。 可以将焊料防腐剂或其它抗氧化涂层施加到安装垫。 具有固体互连的封装封装组件可以具有被配置为接纳至少一个电子器件的顶部封装，其中固体互连件安装在顶部封装和底部封装之间，以使封装彼此平行地刚性地保持。