公开(公告)号：US09935038B2

公开(公告)日：2018-04-03

申请号：US13444649

申请日：2012-04-11

申请人： Tsung-Ding Wang ,  Hung-Jen Lin ,  Jiun Yi Wu ,  Mirng-Ji Lii ,  Chien-Hsun Lee

发明人： Tsung-Ding Wang ,  Hung-Jen Lin ,  Jiun Yi Wu ,  Mirng-Ji Lii ,  Chien-Hsun Lee

IPC分类号： H01L23/482 ,  H01L23/00 ,  H01L23/528 ,  H01L23/488 ,  H01L23/498 ,  H01L21/56

CPC分类号： H01L23/4824 ,  H01L21/563 ,  H01L23/488 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/528 ,  H01L24/05 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/16056 ,  H01L2224/16146 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81424 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

摘要： Semiconductor devices packages and methods are disclosed. In one embodiment, a package for a semiconductor device includes a substrate and a contact pad disposed on a first surface of the substrate. The contact pad has a first side and a second side opposite the first side. A conductive trace is coupled to the first side of the contact pad, and an extension of the conductive trace is coupled to the second side of the contact pad. A plurality of bond pads is disposed on a second surface of the substrate.

公开(公告)号：US09171790B2

公开(公告)日：2015-10-27

申请号：US13552375

申请日：2012-07-18

申请人： Chen-Hua Yu ,  Yung Ching Chen ,  Chien-Hsun Lee ,  Jiun Yi Wu ,  Mirng-Ji Lii ,  Ming-Da Cheng

发明人： Chen-Hua Yu ,  Yung Ching Chen ,  Chien-Hsun Lee ,  Jiun Yi Wu ,  Mirng-Ji Lii ,  Ming-Da Cheng

IPC分类号： H01L25/065 ,  H01L23/498 ,  H01L21/48 ,  H01L25/10 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H01L21/4853 ,  H01L21/68778 ,  H01L23/3142 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/17 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/16058 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/26175 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/2064 ,  H01L2924/20641 ,  H01L2924/20642 ,  H01L2924/20643 ,  H01L2924/20644 ,  H01L2924/20645 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2924/014

摘要： Package on package (PoP) devices and methods of packaging semiconductor dies are disclosed. A PoP device includes a first packaged die and a second packaged die coupled to the first packaged die. Metal stud bumps are disposed between the first packaged die and the second packaged die. The metal stud bumps include a stick region, a first ball region coupled to a first end of the stick region, and a second ball region coupled to a second end of the stick region. The metal stud bumps include a portion that is partially embedded in a solder joint.

摘要翻译： 封装封装（PoP）器件和封装半导体管芯的方法被公开。 PoP器件包括第一封装管芯和耦合到第一封装管芯的第二封装管芯。 在第一封装模具和第二封装模具之间设置金属凸块凸块。 金属柱凸块包括一个棒状区域，一个耦合到该棒状区域的第一端的第一球形区域和一个耦合到该棒状区域的第二端的第二球形区域。 金属柱凸块包括部分嵌入焊点中的部分。

公开(公告)号：US08946072B2

公开(公告)日：2015-02-03

申请号：US13536905

申请日：2012-06-28

申请人： Jiun Yi Wu

发明人： Jiun Yi Wu

IPC分类号： H01L21/60 ,  H01L23/488

CPC分类号： H01L24/17 ,  H01L21/563 ,  H01L23/147 ,  H01L23/3121 ,  H01L23/3157 ,  H01L23/481 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81805 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/172 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

摘要： Mechanisms of forming a package on package (PoP) package by using an interposer and an no-reflow underfill (NUF) layer are provided. The interposer frame improves the form factor of the package, enables the reduction in the pitch of the bonding structures. The NUF layer enables a semiconductor die and an interposer frame be bonded to a substrate by utilizing the heat on the connectors of the semiconductor die and on the connectors of the interposer frame for bonding. The heat provided by the semiconductor die and the interposer frame also transforms the NUF layer into an underfill. PoP structures formed by using the interposer frame and the NUF layer improve yield and have better reliability performance.

摘要翻译： 提供了通过使用插入器和无回流底部填充（NUF）层在封装（PoP）封装上形成封装的机制。 插入器框架改善了封装的外形尺寸，能够降低接合结构的间距。 通过利用半导体管芯的连接器上的热量和用于接合的插入器框架的连接器，NUF层能够使半导体管芯和插入器框架结合到衬底。 由半导体管芯和内插器框架提供的热量也将NUF层转变成底部填充物。 通过使用插入框架和NUF层形成的PoP结构提高了产量并具有更好的可靠性性能。

公开(公告)号：US08823180B2

公开(公告)日：2014-09-02

申请号：US13493862

申请日：2012-06-11

申请人： Tsung-Ding Wang ,  Ming-Chung Sung ,  Jiun Yi Wu ,  Chien-Hsiun Lee ,  Mirng-Ji Lii

发明人： Tsung-Ding Wang ,  Ming-Chung Sung ,  Jiun Yi Wu ,  Chien-Hsiun Lee ,  Mirng-Ji Lii

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/563 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15321 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00012

摘要： Package on package (PoP) devices and methods of packaging semiconductor dies are disclosed. A PoP device includes a bottom packaged die having solder balls disposed on the top surface thereof and a top packaged die having metal stud bumps disposed on a bottom surface thereof. The metal stud bumps include a bump region and a tail region coupled to the bump region. Each metal stud bump on the top packaged die is coupled to one of the solder balls on the bottom packaged die.

摘要翻译： 封装封装（PoP）器件和封装半导体管芯的方法被公开。 PoP器件包括底部封装的芯片，其具有设置在其顶表面上的焊球，以及顶部封装的管芯，其具有设置在其底表面上的金属突起凸块。 金属柱凸起包括凸起区域和耦合到凸起区域的尾部区域。 顶部封装模具上的每个金属柱形凸块与底部封装模具上的一个焊球相连。

公开(公告)号：US08803323B2

公开(公告)日：2014-08-12

申请号：US13539048

申请日：2012-06-29

申请人： Chen-Hua Yu ,  Jiun Yi Wu ,  Tsung-Ding Wang

发明人： Chen-Hua Yu ,  Jiun Yi Wu ,  Tsung-Ding Wang

IPC分类号： H01L29/72

CPC分类号： H01L21/56 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/81895 ,  H01L2224/83104 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014

摘要： A device includes a first package component and the second package component. The first package component includes a first plurality of connectors at a top surface of the first package component, and a second plurality of connectors at the top surface. The second package component is over and bonded to the first plurality of connectors, wherein the second plurality of connectors is not bonded to the second package component. A solder resist is on the top surface of the first package component. A trench is disposed in the solder resist, wherein a portion of the trench spaces the second plurality of connectors apart from the first plurality of connectors.

摘要翻译： 一种装置包括第一包装件和第二包装件。 第一包装部件包括在第一包装部件的顶表面处的第一多个连接器和在顶部表面处的第二多个连接器。 第二包装部件结束并结合到第一多个连接器，其中第二多个连接器不结合到第二包装部件。 阻焊剂在第一包装部件的顶表面上。 沟槽设置在阻焊剂中，其中沟槽的一部分将第二多个连接器与第一多个连接器分开。

公开(公告)号：US20140001644A1

公开(公告)日：2014-01-02

申请号：US13539048

申请日：2012-06-29

申请人： Chen-Hua Yu ,  Jiun Yi Wu ,  Tsung-Ding Wang

发明人： Chen-Hua Yu ,  Jiun Yi Wu ,  Tsung-Ding Wang

IPC分类号： H01L23/498 ,  H01L21/02

CPC分类号： H01L21/56 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/81895 ,  H01L2224/83104 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014

摘要： A device includes a first package component and the second package component. The first package component includes a first plurality of connectors at a top surface of the first package component, and a second plurality of connectors at the top surface. The second package component is over and bonded to the first plurality of connectors, wherein the second plurality of connectors is not bonded to the second package component. A solder resist is on the top surface of the first package component. A trench is disposed in the solder resist, wherein a portion of the trench spaces the second plurality of connectors apart from the first plurality of connectors.

摘要翻译： 一种装置包括第一包装部件和第二包装部件。 第一包装部件包括在第一包装部件的顶表面处的第一多个连接器和在顶部表面处的第二多个连接器。 第二包装部件结束并结合到第一多个连接器，其中第二多个连接器不结合到第二包装部件。 阻焊剂在第一包装部件的顶表面上。 沟槽设置在阻焊剂中，其中沟槽的一部分将第二多个连接器与第一多个连接器分开。

公开(公告)号：US20130200513A1

公开(公告)日：2013-08-08

申请号：US13536905

申请日：2012-06-28

申请人： Jiun Yi WU

发明人： Jiun Yi WU

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H01L24/17 ,  H01L21/563 ,  H01L23/147 ,  H01L23/3121 ,  H01L23/3157 ,  H01L23/481 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81805 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/172 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

摘要： Mechanisms of forming a package on package (PoP) package by using an interposer and an no-reflow underfill (NUF) layer are provided. The interposer frame improves the form factor of the package, enables the reduction in the pitch of the bonding structures. The NUF layer enables a semiconductor die and an interposer frame be bonded to a substrate by utilizing the heat on the connectors of the semiconductor die and on the connectors of the interposer frame for bonding. The heat provided by the semiconductor die and the interposer frame also transforms the NUF layer into an underfill. PoP structures formed by using the interposer frame and the NUF layer improve yield and have better reliability performance.

摘要翻译： 提供了通过使用插入器和无回流底部填充（NUF）层在封装（PoP）封装上形成封装的机制。 插入器框架改善了封装的外形尺寸，能够降低接合结构的间距。 通过利用半导体管芯的连接器上的热量和用于接合的插入器框架的连接器，NUF层能够使半导体管芯和插入器框架结合到衬底。 由半导体管芯和内插器框架提供的热量也将NUF层转变成底部填充物。 通过使用插入框架和NUF层形成的PoP结构提高了产量并具有更好的可靠性性能。

公开(公告)号：US20130200512A1

公开(公告)日：2013-08-08

申请号：US13448796

申请日：2012-04-17

申请人： Jiun Yi WU

发明人： Jiun Yi WU

IPC分类号： H01L23/538 ,  H01L21/60

CPC分类号： H01L21/76882 ,  H01L23/147 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29099 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2225/0651 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of mechanisms of utilizing an interposer frame to form a package using package on package (PoP) technology are provided in this disclosure. The interposer frame is formed by using a substrate with one or more additives to adjust the properties of the substrate. The interposer frame has through substrate holes (TSHs) lined with conductive layer to form through substrate vias (TSVs) with solder balls on adjacent packages. The interposer frame enables the reduction of pitch of TSVs, mismatch of coefficients of thermal expansion (CTEs), shorting, and delamination of solder joints, and improves mechanical strength of the PoP package.

摘要翻译： 在本公开中提供了使用封装（PoP）技术来使用插入器框架来形成封装的机构的实施例。 通过使用具有一种或多种添加剂的基底来调节基材的性质来形成中介层框架。 内插器框架通过衬有导电层的衬底孔（TSH），以在相邻封装上形成具有焊球的衬底通孔（TSV）。 插入框架能够减少TSV的间距，热膨胀系数（CTE）的失配，焊点的短路和分层，并提高PoP封装的机械强度。

公开(公告)号：US09768105B2

公开(公告)日：2017-09-19

申请号：US13452589

申请日：2012-04-20

申请人： Mirng-Ji Lii ,  Chen-Hua Yu ,  Chien-Hsiun Lee ,  Yung Ching Chen ,  Jiun Yi Wu

发明人： Mirng-Ji Lii ,  Chen-Hua Yu ,  Chien-Hsiun Lee ,  Yung Ching Chen ,  Jiun Yi Wu

IPC分类号： H01L25/07 ,  H01L21/60 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L23/528 ,  H01L25/10

CPC分类号： H01L23/49838 ,  H01L23/49811 ,  H01L23/5283 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/16 ,  H01L24/20 ,  H01L24/24 ,  H01L25/105 ,  H01L2224/16238 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/00014 ,  H01L2924/00

摘要： System and method are disclosed for creating a rigid interconnect between two substrate mounted packages to create a package-on-package assembly. A solid interconnect may have a predetermined length configured to provide a predetermined package separation, may be cylindrical, conical or stepped, may be formed by extrusion, casting, drawing or milling and may have an anti-oxidation coating. The interconnect may be attached to mounting pads on the top and bottom packages via an electrically conductive adhesive, including, but not limited to solder and solder paste. A solder preservative or other anti-oxidation coating may be applied to the mounting pad. A package-on-package assembly with solid interconnects may have a top package configured to accept at least one electronic device, with the solid interconnects mounted between the top package and a bottom package to rigidly hold the package about parallel to each other.

公开(公告)号：US08766460B2

公开(公告)日：2014-07-01

申请号：US13448796

申请日：2012-04-17

申请人： Jiun Yi Wu

发明人： Jiun Yi Wu

IPC分类号： H01L23/12 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76882 ,  H01L23/147 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29099 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2225/0651 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of mechanisms of utilizing an interposer frame to form a package using package on package (PoP) technology are provided in this disclosure. The interposer frame is formed by using a substrate with one or more additives to adjust the properties of the substrate. The interposer frame has through substrate holes (TSHs) lined with conductive layer to form through substrate vias (TSVs) with solder balls on adjacent packages. The interposer frame enables the reduction of pitch of TSVs, mismatch of coefficients of thermal expansion (CTEs), shorting, and delamination of solder joints, and improves mechanical strength of the PoP package.

摘要翻译： 在本公开中提供了使用封装（PoP）技术来使用插入器框架来形成封装的机构的实施例。 通过使用具有一种或多种添加剂的基底来调节基材的性质来形成中介层框架。 内插器框架通过衬有导电层的衬底孔（TSH），以在相邻封装上形成具有焊球的衬底通孔（TSV）。 插入框架能够减少TSV的间距，热膨胀系数（CTE）的失配，焊点的短路和分层，并提高PoP封装的机械强度。