公开(公告)号：US11251174B2

公开(公告)日：2022-02-15

申请号：US16884051

申请日：2020-05-27

Applicant: Industrial Technology Research Institute

Inventor： Sheng-Tsai Wu ,  Yu-Min Lin ,  Yuan-Yin Lo ,  Ang-Ying Lin ,  Tzu-Hsuan Ni ,  Chao-Jung Chen ,  Shin-Yi Huang

IPC: H01L31/0203 ,  H01L25/18 ,  H01L23/00

Abstract: An image sensor package and a manufacturing method thereof are provided. The image sensor package includes a redistribution circuit structure; an image sensing chip disposed on the redistribution circuit structure and having a sensing surface, on which a sensing area and a first conductive pillar arranged in the periphery of the sensing area are disposed; a lid covering the sensing area; an encapsulant disposed on the redistribution circuit structure and encapsulating at least part of the image sensing chip and the cover; and a top tier semiconductor chip disposed above the image sensing chip and having an active surface on which a first conductor is disposed. The first conductor overlaps the image sensing chip in a direction perpendicular to the sensing surface. The first conductive pillar and the first conductor are aligned and bonded to each other to electrically connect the image sensing chip and the top tier semiconductor chip.

公开(公告)号：US20210082810A1

公开(公告)日：2021-03-18

申请号：US17095744

申请日：2020-11-12

Applicant: Industrial Technology Research Institute ,  Unimicron Technology Corp.

Inventor： Yu-Hua Chen ,  Wei-Chung Lo ,  Tao-Chih Chang ,  Yu-Min Lin ,  Sheng-Tsai Wu

IPC: H01L23/522 ,  H01L23/498 ,  H01L21/48 ,  H01L25/04

Abstract: A package substrate includes a substrate, an insulating protective layer and an interposer. The substrate has a first surface and a second surface opposing to the first surface. The substrate includes a plurality of first conductive pads embedded in the first surface. The insulating protective layer is disposed on the first surface of the substrate. The insulating protective layer has an opening for exposing the first conductive pads embedded in the first surface of the substrate. The interposer has a top surface and a bottom surface opposing to the top surface. The interposer includes a plurality of conductive vias and a plurality of second conductive pads located on the bottom surface. The interposer is located in a recess defined by the opening of the insulating protective layer and the first surface of the substrate. Each of the second conductive pads is electrically connected to corresponding first conductive pad.

公开(公告)号：US20190188357A1

公开(公告)日：2019-06-20

申请号：US15922910

申请日：2018-03-15

Applicant: Industrial Technology Research Institute

Inventor： Heng-Chieh Chien ,  Sheng-Tsai Wu ,  Ming-Ji Dai ,  Chih-Ming Shen

IPC: G06F17/50

Abstract: A chip temperature computation method and a chip temperature computation device are provided. The chip temperature computation method includes: computing an upper layer thermal resistance and a lower layer thermal resistance of a chip, computing a total thermal resistance of the chip, and computing a temperature of the chip according to the total thermal resistance.

公开(公告)号：US09252054B2

公开(公告)日：2016-02-02

申请号：US14484970

申请日：2014-09-12

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Sheng-Tsai Wu ,  Heng-Chieh Chien ,  John H. Lau ,  Yu-Lin Chao ,  Wei-Chung Lo

IPC: H01L23/367 ,  H01L21/768 ,  H01L21/48 ,  H01L23/42 ,  H01L23/427 ,  H01L23/433 ,  H01L21/50 ,  H01L21/56 ,  H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H01L25/18

CPC classification number: H01L21/76898 ,  H01L21/4882 ,  H01L21/50 ,  H01L21/563 ,  H01L23/3675 ,  H01L23/42 ,  H01L23/4275 ,  H01L23/433 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/16235 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/81192 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/16153 ,  H01L2924/16251 ,  H01L2924/1659 ,  H01L2924/167 ,  H01L2924/16724 ,  H01L2924/16747 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: A thinned integrated circuit device and manufacturing process for the same are disclosed. The manufacturing process includes forming a through-silicon via (TSV) on a substrate, a first terminal of the TSV is exposed on a first surface of the substrate, disposing a bump on the first surface of the substrate to make the bump electrically connected with the TSV, disposing an integrated circuit chip (IC) on the bump so that a first side of the IC is connected to the bump, disposing a thermal interface material (TIM) layer on a second side of the IC opposite to the first side of the IC, attaching a heat-spreader cap on the IC by the TIM layer, and backgrinding a second surface of the substrate to expose the TSV to the second surface of the substrate while carrying the heat-spreader cap.

Abstract translation: 公开了一种薄型集成电路器件及其制造方法。 制造工艺包括在衬底上形成贯通硅通孔（TSV），将TSV的第一端子暴露在衬底的第一表面上，在衬底的第一表面上设置凸块以使凸块电连接到 所述TSV在所述突起上设置集成电路芯片（IC），使得所述IC的第一侧连接到所述凸块，在所述IC的第二侧的第二侧上设置热界面材料（TIM）层， IC，通过TIM层将散热器帽附接到IC上，并且背衬研磨衬底的第二表面以在承载散热器盖的同时将TSV暴露于衬底的第二表面。

公开(公告)号：US20130276464A1

公开(公告)日：2013-10-24

申请号：US13854139

申请日：2013-04-01

Applicant: Industrial Technology Research Institute

Inventor： Heng-Chieh Chien ,  Ming-Ji Dai ,  Sheng-Tsai Wu ,  Huey-Lin Hsieh ,  Jing-Yi Huang

IPC: G01K7/00 ,  F25B21/04

CPC classification number: G01K7/00 ,  F25B21/04 ,  G01K3/08 ,  H01L35/30 ,  H01L35/32

Abstract: A measurement method, a measurement apparatus, and a computer program product for measuring a thermoelectric module are provided. A temperature is provided to the thermoelectric module. A current is applied to the thermoelectric module to turn both sides of the thermoelectric module into a hot side and a cold side. The temperature of the hot side is higher than that of the cold side. A terminal voltage of the thermoelectric module, a hot side temperature of the hot side, and a cold side temperature of the cold side are measured at different time points. A thermoelectric relationship between the terminal voltages and differences between the hot side temperatures and the corresponding cold side temperatures is obtained according to the terminal voltages, the hot side temperatures, and the cold side temperatures. At least one first parameter of the thermoelectric module is estimated according to the thermoelectric relationship.

Abstract translation: 提供了一种用于测量热电模块的测量方法，测量装置和计算机程序产品。 向热电模块提供温度。 向热电模块施加电流以将热电模块的两侧转变成热侧和冷侧。 热侧的温度高于冷侧的温度。 在不同的时间点测量热电模块的端电压，热侧的热侧温度和冷侧的冷侧温度。 根据端子电压，热侧温度和冷侧温度，获得端子电压与热侧温度与相应的冷侧温度之间的差异的热电关系。 根据热电关系估计热电模块的至少一个第一参数。

公开(公告)号：US20130234325A1

公开(公告)日：2013-09-12

申请号：US13873249

申请日：2013-04-30

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Ming-Ji Dai ,  Ra-Min Tain ,  Chun-Hsien Chien ,  Heng-Chieh Chien ,  Sheng-Tsai Wu

IPC: H01L23/498

CPC classification number: H01L23/49811 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/11009 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2224/94 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1421 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/3511 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/05552 ,  H01L2924/00

Abstract: By adding particles of high thermal conductivity and low thermal expansion coefficient into the copper as a composite material and filling with the composite material into the through-via hole, the mismatch of the coefficient of thermal expansion and the stress of the through-silicon via are lowered and the thermal conductivity of the through-silicon via is increased.

Abstract translation: 通过将高导热性和低热膨胀系数的颗粒作为复合材料添加到铜中，并将复合材料填充到通孔中，热膨胀系数与贯穿硅通孔的应力的失配是 降低了通硅通孔的导热性。