公开(公告)号：US09865521B2

公开(公告)日：2018-01-09

申请号：US15410625

申请日：2017-01-19

Applicant: Intel Corporation

Inventor： Chandra M. Jha ,  Feras Eid ,  Johanna M. Swan ,  Ashish Gupta

IPC: H01L23/34 ,  H01L23/373 ,  H01L23/00

CPC classification number: H01L23/3733 ,  H01L23/3736 ,  H01L23/3737 ,  H01L23/433 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05568 ,  H01L2224/05647 ,  H01L2224/1133 ,  H01L2224/1147 ,  H01L2224/1182 ,  H01L2224/11826 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13078 ,  H01L2224/13147 ,  H01L2224/13193 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/271 ,  H01L2224/27436 ,  H01L2224/2745 ,  H01L2224/29193 ,  H01L2224/2929 ,  H01L2224/29347 ,  H01L2224/29393 ,  H01L2224/29499 ,  H01L2224/32058 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81011 ,  H01L2224/81191 ,  H01L2224/83104 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/06524 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/16724 ,  H01L2924/16747 ,  H01L2924/3511 ,  Y10T428/249921 ,  Y10T428/26 ,  H01L2224/27 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/00014

Abstract: A copper nanorod thermal interface material (TIM) is described. The copper nanorod TIM includes a plurality of copper nanorods having a first end thermally coupled with a first surface, and a second end extending toward a second surface. A plurality of copper nanorod branches are formed on the second end. The copper nanorod branches are metallurgically bonded to a second surface. The first surface may be the back side of a die. The second surface may be a heat spread or a second die. The TIM may include a matrix material surrounding the copper nanorods. In an embodiment, the copper nanorods are formed in clusters.

公开(公告)号：US20210117350A1

公开(公告)日：2021-04-22

申请号：US17134242

申请日：2020-12-25

Applicant: Intel Corporation

Inventor： Robert J. Safranek ,  Robert G. Blankenship ,  Venkatraman Iyer ,  Jeff Willey ,  Robert Beers ,  Darren S. Jue ,  Arvind A. Kumar ,  Debendra Das Sharma ,  Jeffrey C. Swanson ,  Bahaa Fahim ,  Vedaraman Geetha ,  Aaron T. Spink ,  Fulvio Spagna ,  Rahul R. Shah ,  Sitaraman V. Iyer ,  William Harry Nale ,  Abhishek Das ,  Simon P. Johnson ,  Yuvraj S. Dhillon ,  Yen-Cheng Liu ,  Raj K. Ramanujan ,  Robert A. Maddox ,  Herbert H. Hum ,  Ashish Gupta

IPC: G06F13/22 ,  H04L12/933 ,  G06F12/0813 ,  G06F12/0815 ,  G06F12/0831 ,  G06F13/42 ,  G06F8/71 ,  G06F8/77 ,  G06F9/30 ,  G06F12/0806 ,  G06F9/46 ,  G06F13/40 ,  G06F9/445 ,  G06F1/3287 ,  G06F11/10 ,  H04L9/06 ,  G06F12/0808

Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state.

公开(公告)号：US10909055B2

公开(公告)日：2021-02-02

申请号：US16525454

申请日：2019-07-29

Applicant: Intel Corporation

Inventor： Venkatraman Iyer ,  Darren S. Jue ,  Robert G. Blankenship ,  Fulvio Spagna ,  Ashish Gupta

IPC: G06F13/22 ,  H04L12/933 ,  G06F13/42 ,  G06F13/40 ,  G06F12/0813 ,  G06F12/0815 ,  G06F12/0831 ,  G06F8/71 ,  G06F8/77 ,  G06F9/30 ,  G06F12/0806 ,  G06F9/46 ,  G06F9/445 ,  G06F1/3287 ,  G06F11/10 ,  H04L9/06 ,  G06F12/0808 ,  H04L12/741 ,  G06F8/73 ,  H04L12/46

Abstract: Re-initialization of a link can take place without termination of the link, where the link includes, a transmitter and a receiver are to be coupled to each lane in the number of lanes, and re-initialization of the link is to include transmission of a pre-defined sequence on each of the lanes.

公开(公告)号：US20180203811A1

公开(公告)日：2018-07-19

申请号：US15918895

申请日：2018-03-12

Applicant: Intel Corporation

Inventor： Venkatraman Iyer ,  Darren S. Jue ,  Robert G. Blankenship ,  Fulvio Spagna ,  Ashish Gupta

IPC: G06F13/22 ,  G06F1/32 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F13/22 ,  G06F1/3287 ,  G06F8/71 ,  G06F8/73 ,  G06F8/77 ,  G06F9/30145 ,  G06F9/44505 ,  G06F9/466 ,  G06F11/1004 ,  G06F12/0806 ,  G06F12/0808 ,  G06F12/0813 ,  G06F12/0815 ,  G06F12/0831 ,  G06F12/0833 ,  G06F13/4022 ,  G06F13/4068 ,  G06F13/4221 ,  G06F13/4273 ,  G06F13/4282 ,  G06F13/4286 ,  G06F13/4291 ,  G06F2212/1016 ,  G06F2212/2542 ,  G06F2212/622 ,  H04L9/0662 ,  H04L12/4641 ,  H04L45/74 ,  H04L49/15 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/151 ,  Y02D10/40 ,  Y02D10/44 ,  Y02D30/30

Abstract: Re-initialization of a link can take place without termination of the link, where the link includes, a transmitter and a receiver are to be coupled to each lane in the number of lanes, and re-initialization of the link is to include transmission of a pre-defined sequence on cach of the lanes.

公开(公告)号：US20170097907A1

公开(公告)日：2017-04-06

申请号：US15237291

申请日：2016-08-15

Applicant: Intel Corporation

Inventor： Venkatraman Iyer ,  Darren S. Jue ,  Robert G. Blankenship ,  Fulvio Spagna ,  Ashish Gupta

IPC: G06F13/22 ,  G06F13/40 ,  G06F1/32 ,  G06F13/42

CPC classification number: G06F13/22 ,  G06F1/3287 ,  G06F8/71 ,  G06F8/73 ,  G06F8/77 ,  G06F9/30145 ,  G06F9/44505 ,  G06F9/466 ,  G06F11/1004 ,  G06F12/0806 ,  G06F12/0808 ,  G06F12/0813 ,  G06F12/0815 ,  G06F12/0831 ,  G06F12/0833 ,  G06F13/4022 ,  G06F13/4068 ,  G06F13/4221 ,  G06F13/4282 ,  G06F13/4286 ,  G06F13/4291 ,  G06F2212/1016 ,  G06F2212/2542 ,  G06F2212/622 ,  H04L9/0662 ,  H04L12/4641 ,  H04L45/74 ,  H04L49/15 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/151 ,  Y02D10/40 ,  Y02D10/44 ,  Y02D30/30

Abstract: Re-initialization of a link can take place without termination of the link, where the link includes, a transmitter and a receiver are to be coupled to each lane in the number of lanes, and re-initialization of the link is to include transmission of a pre-defined sequence on each of the lanes.

公开(公告)号：US09418035B2

公开(公告)日：2016-08-16

申请号：US13976960

申请日：2013-03-15

Applicant: Intel Corporation

Inventor： Venkatraman Iyer ,  Darren S. Jue ,  Robert G. Blankenship ,  Fulvio Spagna ,  Ashish Gupta

IPC: G06F13/40 ,  G06F12/08 ,  G06F13/42 ,  G06F9/30 ,  H04L12/933 ,  G06F9/46 ,  H04L12/741 ,  G06F9/44

CPC classification number: G06F13/22 ,  G06F1/3287 ,  G06F8/71 ,  G06F8/73 ,  G06F8/77 ,  G06F9/30145 ,  G06F9/44505 ,  G06F9/466 ,  G06F11/1004 ,  G06F12/0806 ,  G06F12/0808 ,  G06F12/0813 ,  G06F12/0815 ,  G06F12/0831 ,  G06F12/0833 ,  G06F13/4022 ,  G06F13/4068 ,  G06F13/4221 ,  G06F13/4282 ,  G06F13/4286 ,  G06F13/4291 ,  G06F2212/1016 ,  G06F2212/2542 ,  G06F2212/622 ,  H04L9/0662 ,  H04L12/4641 ,  H04L45/74 ,  H04L49/15 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/151 ,  Y02D10/40 ,  Y02D10/44 ,  Y02D30/30

Abstract: Re-initialization of a link can take place without termination of the link, where the link includes, a transmitter and a receiver are to be coupled to each lane in the number of lanes, and re-initialization of the link is to include transmission of a predefined sequence on each of the lanes.

Abstract translation: 链路的重新初始化可以在不终止链路的链路的情况下进行，链路包括，发射机和接收机将以多个通道耦合到每个通道，并且链路的重新初始化包括传输 每个通道上的预定义序列。