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    PROGRAMMABLE LOGIC DEVICE WITH FINE-GRAINED DISAGGREGATION
    22.
    发明申请
    PROGRAMMABLE LOGIC DEVICE WITH FINE-GRAINED DISAGGREGATION 审中-公开

    公开(公告)号：US20200186149A1

    公开(公告)日：2020-06-11

    申请号：US16788760

    申请日：2020-02-12

    Applicant: Intel Corporation

    Inventor： Dheeraj Subbareddy ,  MD Altaf Hossain ,  Ankireddy Nalamalpu ,  Robert Sankman ,  Ravindranath Mahajan ,  Gregg William Baeckler

    IPC: H03K19/1776 ,  H01L25/18 ,  H01L23/367

    Abstract: A programmable device may have logic circuitry formed in a top die and memory and specialized processing blocks formed in a bottom die, where the top die is stacked directly on top of the bottom die in a face-to-face configuration. The logic circuitry may include logic sectors, logic array blocks, logic elements, and other types of logic regions. The memory blocks may include large banks of multiport memory for storing data. The specialized processing blocks may include multipliers, adders, and other arithmetic components. The logic circuitry may access the memory and specialized processing blocks via an address encoded scheme. Configured in this way, the maximum operating frequency of the programmable device can be optimized such that critical paths will no longer need to traverse any unused memory and specialized processing blocks.

    IC package including multi-chip unit with bonded integrated heat spreader
    25.
    发明授权
    IC package including multi-chip unit with bonded integrated heat spreader 有权

    公开(公告)号：US12183649B2

    公开(公告)日：2024-12-31

    申请号：US18222855

    申请日：2023-07-17

    Applicant: Intel Corporation

    Inventor： Debendra Mallik ,  Ravindranath Mahajan ,  Digvijay Raorane

    IPC: H01L23/367 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L23/538

    Abstract: A multi-chip unit suitable for chip-level packaging may include multiple IC chips that are interconnected through a metal redistribution structure, and that are directly bonded to an integrated heat spreader. Bonding of the integrated heat spreader to the multiple IC chips may be direct so that no thermal interface material (TIM) is needed, resulting in a reduced bond line thickness (BLT) and lower thermal resistance. The integrated heat spreader may further serve as a structural member of the multi-chip unit, allowing a second side of the redistribution structure to be further interconnected to a host by solder interconnects. The redistribution structure may be fabricated on a sacrificial interposer that may facilitate planarizing IC chips of differing thickness prior to bonding the heat spreader. The sacrificial interposer may be removed to expose the RDL for further interconnection to a substrate without the use of through-substrate vias.

    Heat dissipation device having shielding/containment extensions
    26.
    发明授权
    Heat dissipation device having shielding/containment extensions 有权

    公开(公告)号：US12048123B2

    公开(公告)日：2024-07-23

    申请号：US16750217

    申请日：2020-01-23

    Applicant: Intel Corporation

    Inventor： Aastha Uppal ,  Je-Young Chang ,  Ravindranath Mahajan

    IPC: H05K7/20

    CPC classification number: H05K7/205

    Abstract: An integrated circuit assembly may be formed comprising an electronic substrate, at least one integrated circuit device electrically attached to the electronic substrate, a heat dissipation device comprising a main body portion and a resilient portion extending from the main body portion, wherein the resilient portion has a plurality of extensions, a thermal interface material between the at least one integrated circuit device and the heat dissipation device, and a stiffener attached to the electronic substrate, wherein at least a portion of the plurality of extensions of the resilient portion of the heat dissipation device are biased against the stiffener.

    ANGLED INDUCTOR WITH SMALL FORM FACTOR
    29.
    发明申请
    ANGLED INDUCTOR WITH SMALL FORM FACTOR 有权

    公开(公告)号：US20220399150A1

    公开(公告)日：2022-12-15

    申请号：US17348580

    申请日：2021-06-15

    Applicant: Intel Corporation

    Inventor： Brandon Marin ,  Jeremy Ecton ,  Suddhasattwa Nad ,  Matthew Tingey ,  Ravindranath Mahajan ,  Srinivas Pietambaram

    IPC: H01F27/28 ,  H01L25/18 ,  H01L23/498 ,  H01F27/32

    Abstract: An electronic substrate may be fabricated having a dielectric material, metal pads embedded in the dielectric material with co-planar surfaces spaced less than one tenth millimeter from each other, and a metal trace embedded in the dielectric material and attached between the metal pads, wherein a surface of the metal trace is non-co-planar with the co-planar surfaces of the metal pads at a height of less than one millimeter, and wherein sides of the metal trace are angled relative to the co-planar surfaces of the metal pads. In an embodiment of the present description, an embedded angled inductor may be formed that includes the metal trace. In an embodiment, an integrated circuit package may be formed with the electronic substrate, wherein at least one integrated circuit devices may be attached to the electronic substrate. Other embodiments are disclosed and claimed.

    HEAT DISSIPATION STRUCTURES FOR OPTICAL COMMUNICATION DEVICES
    30.
    发明申请
    HEAT DISSIPATION STRUCTURES FOR OPTICAL COMMUNICATION DEVICES 有权

    公开(公告)号：US20220397726A1

    公开(公告)日：2022-12-15

    申请号：US17344213

    申请日：2021-06-10

    Applicant: Intel Corporation

    Inventor： Omkar Karhade ,  Tolga Acikalin ,  Sushrutha Gujjula ,  Kelly Lofgreen ,  Ravindranath Mahajan ,  Chia-pin Chiu

    IPC: G02B6/42 ,  F21V8/00

    Abstract: An electronic assembly, such as an integrated circuit package, may be formed comprising a package substrate and a photonic integrated circuit device attached thereto, wherein the package substrate includes a heat dissipation structure disposed therein. A back surface of the photonic integrated circuit device may thermally coupled to the heat dissipation structure within the package substrate for the removal of heat from the photonic integrated circuit device, which allows for access to an active surface of the photonic integrated circuit device for the attachment of fiber optic cables and eliminates the need for a heat dissipation device to be thermally attached to the active surface of the photonic integrated circuit device.

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