公开(公告)号：US07148111B2

公开(公告)日：2006-12-12

申请号：US10927788

申请日：2004-08-27

申请人： Brian Sze-Ki Mo ,  Duc Chau ,  Steven Sapp ,  Izak Bencuya ,  Dean E. Probst

发明人： Brian Sze-Ki Mo ,  Duc Chau ,  Steven Sapp ,  Izak Bencuya ,  Dean E. Probst

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/0869 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/66734 ,  H01L29/7811

摘要： A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the opposite side of the source junction from the trench, the deepest portion of the heavy body extending less deeply into said semiconductor substrate than the predetermined depth of the trench, and (e) a doped well surrounding the heavy body beneath the heavy body.

摘要翻译： 提供了沟槽场效应晶体管，其包括（a）半导体衬底，（b）在半导体衬底中延伸预定深度的沟槽，（c）位于沟槽相对侧上的一对掺杂源极结（d ）掺杂的重体，其位于与沟槽的源极结的相对侧上的每个源极结附近，重体的最深部分比沟槽的预定深度更深地延伸到所述半导体衬底中，以及（e）掺杂 很好地围着沉重的身体下面的沉重的身体。

公开(公告)号：US20120235229A1

公开(公告)日：2012-09-20

申请号：US13049655

申请日：2011-03-16

申请人： Dean E. Probst

发明人： Dean E. Probst

IPC分类号： H01L29/78 ,  H01L21/28

CPC分类号： H01L29/7813 ,  H01L29/401 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66734

摘要： In one general aspect, an apparatus can include a shield dielectric disposed within a trench aligned along an axis within an epitaxial layer of a semiconductor, and a shield electrode disposed within the shield dielectric and aligned along the axis. The apparatus can include a first inter-poly dielectric having a portion intersecting a plane orthogonal to the axis where the plane intersects the shield electrode, and a second inter-poly dielectric having a portion intersecting the plane and disposed between the first inter-poly dielectric and the shield electrode. The apparatus can also include a gate dielectric having a portion disposed on the first inter-poly dielectric.

摘要翻译： 在一个一般方面，装置可以包括设置在沿着半导体的外延层内的轴对准的沟槽内的屏蔽电介质，以及设置在屏蔽电介质内并沿轴线对齐的屏蔽电极。 该装置可以包括具有与垂直于平面与屏蔽电极相交的轴线的平面交叉的部分的第一多晶硅电介质和具有与该平面相交的部分并且设置在第一多晶硅间电介质之间的第二多晶硅间电介质 和屏蔽电极。 该装置还可以包括具有设置在第一多晶硅电介质上的部分的栅极电介质。

公开(公告)号：US08193581B2

公开(公告)日：2012-06-05

申请号：US12420711

申请日：2009-04-08

申请人： Joseph A. Yedinak ,  Dean E. Probst ,  Ashok Challa ,  Daniel Calafut

发明人： Joseph A. Yedinak ,  Dean E. Probst ,  Ashok Challa ,  Daniel Calafut

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L29/0611 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/7811 ,  H01L29/7827 ,  H01L29/872 ,  H01L29/8725

摘要： Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed.

公开(公告)号：US08174067B2

公开(公告)日：2012-05-08

申请号：US12417586

申请日：2009-04-02

申请人： Joseph A. Yedinak ,  Daniel Calafut ,  Dean E. Probst

发明人： Joseph A. Yedinak ,  Daniel Calafut ,  Dean E. Probst

IPC分类号： H01L29/66

CPC分类号： H01L29/7813 ,  H01L29/0611 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/7811 ,  H01L29/7827 ,  H01L29/872 ,  H01L29/8725

摘要： Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed.

摘要翻译： 公开了具有提供增加的击穿电压和其他益处的特征的示例性功率半导体器件。

公开(公告)号：US08143124B2

公开(公告)日：2012-03-27

申请号：US12032599

申请日：2008-02-15

申请人： Ashok Challa ,  Alan Elbanhawy ,  Dean E. Probst ,  Steven P. Sapp ,  Peter H. Wilson ,  Babak S. Sani ,  Becky Losee ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher B. Kocon ,  Debra S. Woolsey

发明人： Ashok Challa ,  Alan Elbanhawy ,  Dean E. Probst ,  Steven P. Sapp ,  Peter H. Wilson ,  Babak S. Sani ,  Becky Losee ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher B. Kocon ,  Debra S. Woolsey

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A method of manufacturing a semiconductor device having a charge control trench and an active control trench with a thick oxide bottom includes forming a drift region, a well region extending above the drift region, an active trench extending through the well region and into the drift region, a charge control trench extending deeper into the drift region than the active trench, an oxide film that fills the active trench, the charge control trench and covers a top surface of the substrate, an electrode in the active trench, and source regions. The method also includes etching the oxide film off the top surface of the substrate and inside the active trench to leave a substantially flat layer of thick oxide having a target thickness at the bottom of the active trench.

摘要翻译： 制造具有电荷控制沟槽和具有厚氧化物底部的有源控制沟槽的半导体器件的方法包括形成漂移区，在漂移区上延伸的阱区，延伸穿过阱区并进入漂移区的有源沟槽 ，比有源沟槽更深地延伸到漂移区域中的电荷控制沟槽，填充有源沟槽，电荷控制沟槽并覆盖衬底的顶表面的氧化物膜，有源沟槽中的电极和源极区域。 该方法还包括将氧化膜从衬底的顶表面和有源沟槽内部蚀刻，以留下在有源沟槽的底部具有目标厚度的基本平坦的厚氧化物层。

公开(公告)号：US07504303B2

公开(公告)日：2009-03-17

申请号：US11441386

申请日：2006-05-24

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Boguslaw Kocon ,  Steven P. Sapp ,  Dean E. Probst ,  Nathan L. Kraft ,  Thomas E. Grebs ,  Rodney S. Ridley ,  Gary M. Dolny ,  Bruce D. Marchant ,  Joseph A. Yedinak

IPC分类号： H01L21/336

CPC分类号： H01L29/7827 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A method for forming a shielded gate field effect transistor includes the following steps. Trenches extending into a silicon region are formed using a mask that includes a protective layer. A shield dielectric layer lining sidewalls and bottom of each trench is formed. A shield electrode is formed in a bottom portion of each trench. Protective spacers are formed along upper sidewalls of each trench. An inter-electrode dielectric is formed over the shield electrode. The protective spacers and the protective layer of the mask prevent formation of inter-electrode dielectric along the upper sidewalls of each trench and over mesa surfaces adjacent each trench. A gate electrode is formed in each trench over the inter-electrode dielectric.

摘要翻译： 一种用于形成屏蔽栅极场效应晶体管的方法包括以下步骤。 使用包括保护层的掩模形成延伸到硅区域中的沟槽。 形成在每个沟槽的侧壁和底部内衬的屏蔽电介质层。 屏蔽电极形成在每个沟槽的底部。 保护间隔物沿每个沟槽的上侧壁形成。 在屏蔽电极上形成电极间电介质。 保护间隔物和掩模的保护层防止沿着每个沟槽的上侧壁和与每个沟槽相邻的台面表面形成电极间电介质。 在电极间电介质的每个沟槽中形成栅电极。

公开(公告)号：US07416948B2

公开(公告)日：2008-08-26

申请号：US11551992

申请日：2006-10-23

申请人： Nathan L. Kraft ,  Ashok Challa ,  Steven P. Sapp ,  Hamza Yilmaz ,  Daniel Calafut ,  Dean E. Probst ,  Rodney S. Ridley ,  Thomas E. Grebs ,  Christopher B. Kocon ,  Joseph A. Yedinak ,  Gary M. Dolny

发明人： Nathan L. Kraft ,  Ashok Challa ,  Steven P. Sapp ,  Hamza Yilmaz ,  Daniel Calafut ,  Dean E. Probst ,  Rodney S. Ridley ,  Thomas E. Grebs ,  Christopher B. Kocon ,  Joseph A. Yedinak ,  Gary M. Dolny

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L21/26586 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/66734 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00

摘要： A field effect transistor is formed as follows. Trenches are formed in a semiconductor region of a first conductivity type. Each trench is partially filled with one or more materials. A dual-pass angled implant is carried out to implant dopants of a second conductivity type into the semiconductor region through an upper surface of the semiconductor region and through upper trench sidewalls not covered by the one or more material. A high temperature process is carried out to drive the implanted dopants deeper into the mesa region thereby forming body regions of the second conductivity type between adjacent trenches. Source regions of the first conductivity type are then formed in each body region.

摘要翻译： 场效应晶体管如下形成。 沟槽形成在第一导电类型的半导体区域中。 每个沟槽部分地填充有一种或多种材料。 执行双通角度注入以通过半导体区域的上表面和不被一种或多种材料覆盖的上沟槽侧壁将第二导电类型的掺杂剂注入半导体区域。 进行高温处理以将注入的掺杂剂更深地驱动到台面区域中，从而在相邻的沟槽之间形成第二导电类型的体区。 然后在每个身体区域中形成第一导电类型的源区域。

公开(公告)号：US20080150020A1

公开(公告)日：2008-06-26

申请号：US12018166

申请日：2008-01-22

申请人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridley ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J. G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J. Y. Jung ,  H. C. Jang ,  Babak S. Sani ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

发明人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridley ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J. G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J. Y. Jung ,  H. C. Jang ,  Babak S. Sani ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

IPC分类号： H01L29/78

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, an active trench extending through the well region and into the drift region. The active trench, which includes sidewalls and bottom lined with dielectric material, is substantially filled with a first conductive layer and a second conductive layer. The second conductive layer forms a gate electrode and is disposed above the first conductive layer and is separated from the first conductive layer by an inter-electrode dielectric material. The device also includes source regions having the first conductivity type formed inside the well region and adjacent the active trench and a charge control trench that extends deeper into the drift region than the active trench and is substantially filled with material to allow for vertical charge control in the drift region. The charge control trench can be lined with a layer of dielectric material and substantially filled with conductive material. The active trench can include a second shield electrode made of conductive material disposed below the first shield electrode. The first conductive layer inside the active trench can form a secondary gate electrode that is configured to be electrically biased to a desired potential. The semiconductor device can also include a Schottky structure formed between the charge control trench and a second adjacent charge control trench.

摘要翻译： 半导体功率器件包括第一导电类型的漂移区域，在漂移区域上方延伸并且具有与第一导电类型相反的第二导电类型的阱区域，延伸穿过阱区域并进入漂移区域的有源沟槽。 主要沟槽包括侧壁和衬底与介电材料的底部，其基本上被第一导电层和第二导电层填充。 第二导电层形成栅极，并且设置在第一导电层的上方，并且通过电极间电介质材料与第一导电层分离。 该器件还包括形成在阱区内并且邻近有源沟槽的第一导电类型的源极区域以及充电控制沟槽，该电荷控制沟槽比有源沟槽更深地延伸到漂移区域中，并且基本上填充有材料以允许垂直电荷控制 漂移区域。 电荷控制沟槽可以衬有介电材料层并且基本上填充有导电材料。 有源沟槽可以包括由设置在第一屏蔽电极下方的导电材料制成的第二屏蔽电极。 有源沟槽内的第一导电层可以形成辅助栅电极，其被配置为电偏置到期望的电位。 半导体器件还可以包括形成在电荷控制沟槽和第二相邻电荷控制沟槽之间的肖特基结构。

公开(公告)号：US08936985B2

公开(公告)日：2015-01-20

申请号：US13418128

申请日：2012-03-12

申请人： Ashok Challa ,  Alan Elbanhawy ,  Dean E. Probst ,  Steven P. Sapp ,  Peter H. Wilson ,  Babak S. Sani ,  Becky Losee ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher B. Kocon ,  Debra S. Woolsey

发明人： Ashok Challa ,  Alan Elbanhawy ,  Dean E. Probst ,  Steven P. Sapp ,  Peter H. Wilson ,  Babak S. Sani ,  Becky Losee ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher B. Kocon ,  Debra S. Woolsey

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/683 ,  H01L21/311 ,  H01L29/40 ,  H01L29/06 ,  H01L21/3065 ,  H01L29/739 ,  H02M3/335 ,  H02M3/00 ,  H01L29/10 ,  H02M7/48 ,  H01L29/49 ,  H01L29/423 ,  H01L29/165 ,  H01L23/495 ,  H01L21/265 ,  H01L29/417 ,  H01L23/498

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A method can include forming a drift region, forming a well region above the drift region, and forming an active trench extending through the well region and into the drift region. The method can include forming a first source region in contact with a first sidewall of the active trench and a second source region in contact with a second sidewall of the active trench. The method also includes forming a charge control trench where the charge control trench is aligned parallel to the active trench and laterally separated from the active trench by a mesa region, and where the portion of the well region is in contact with the charge control trench and excludes any source region. The method also includes forming an oxide along a bottom of the active trench having a thickness greater than a thickness of an oxide along the first sidewall of the active trench.

摘要翻译： 一种方法可以包括形成漂移区，在漂移区上形成阱区，以及形成延伸穿过阱区并进入漂移区的有源沟槽。 该方法可以包括形成与有源沟槽的第一侧壁接触的第一源极区域和与有源沟槽的第二侧壁接触的第二源极区域。 该方法还包括形成电荷控制沟槽，其中电荷控制沟槽平行于有源沟槽对齐并且通过台面区域与有源沟槽横向分离，并且其中阱区域的部分与电荷控制沟槽接触， 排除任何来源地区。 该方法还包括沿有源沟槽的底部沿着有源沟槽的第一侧壁形成厚度大于氧化物厚度的氧化物。

公开(公告)号：US08564024B2

公开(公告)日：2013-10-22

申请号：US12421448

申请日：2009-04-09

申请人： Joseph A. Yedinak ,  Ashok Challa ,  Daniel M. Kinzer ,  Dean E. Probst

发明人： Joseph A. Yedinak ,  Ashok Challa ,  Daniel M. Kinzer ,  Dean E. Probst

IPC分类号： H01L29/76

CPC分类号： H01L29/7813 ,  H01L29/0611 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/7811 ,  H01L29/7827 ,  H01L29/872 ,  H01L29/8725

摘要： Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed.