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公开(公告)号：US10355174B2
公开(公告)日：2019-07-16
申请号：US15738427
申请日：2016-07-12
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Markus Maute , Lutz Höppel , Jürgen Moosburger , Thomas Schwarz , Matthias Sabathil , Ralph Wirth , Alexander Linkov , Johannes Baur
Abstract: A component includes a carrier and a semiconductor body arranged on the carrier, wherein the semiconductor body has an active layer arranged between the first and second semiconductor layers and is configured to generate, during operation of the component, an electromagnetic radiation that can be coupled out from the component through a first main surface, the first main surface of the component has an electrical contact layer configured to electrically contact a first semiconductor layer and in a plan view the carrier covers the first main surface in places, and in direct vicinity of the electrical contact layer the component includes a shielding structure configured to prevent electromagnetic radiation generated by the active layer from impinging onto the contact layer.
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公开(公告)号：US10121775B2
公开(公告)日：2018-11-06
申请号：US15038034
申请日：2014-11-07
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Christian Leirer , Berthold Hahn , Karl Engl , Johannes Baur , Siegfried Herrmann , Andreas Ploessl , Simeon Katz , Tobias Meyer , Lorenzo Zini , Markus Maute
Abstract: Described is an optoelectronic semiconductor chip (1) with a built-in bridging element (9, 9A) for overvoltage protection.
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公开(公告)号：US10043958B2
公开(公告)日：2018-08-07
申请号：US15402689
申请日：2017-01-10
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Korbinian Perzlmaier , Kai Gehrke , Robert Walter , Karl Engl , Guido Weiss , Markus Maute , Stefanie Rammelsberger
CPC classification number: H01L33/60 , H01L33/382 , H01L33/405 , H01L33/42 , H01L33/56 , H01L33/62 , H01L2924/0002 , H01L2924/00
Abstract: A light emitting diode chip includes a semiconductor layer sequence having an active layer that generates electromagnetic radiation, wherein the light emitting diode chip has a radiation exit area at a front side and a mirror layer at least in regions at a rear side situated opposite the radiation exit area, a protective layer is arranged on the mirror layer, the protective layer includes a transparent conductive oxide, the mirror layer adjoins the semiconductor layer sequence at an interface situated opposite the protective layer, first and second layers, the first and second electrical connection layers face the rear side of the semiconductor layer sequence and are electrically insulated from one another, and a partial region of the second electrical connection layer extends from the rear side of the semiconductor layer sequence through at least one perforation of the active layer in a direction toward the front side.
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公开(公告)号：US20180182926A1
公开(公告)日：2018-06-28
申请号：US15738427
申请日：2016-07-12
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Markus Maute , Lutz Höppel , Jürgen Moosburger , Thomas Schwarz , Matthias Sabathil , Ralph Wirth , Alexander Linkov , Johannes Baur
CPC classification number: H01L33/46 , H01L33/20 , H01L33/24 , H01L33/30 , H01L33/382 , H01L33/385 , H01L33/405 , H01L33/60 , H01L33/62 , H01L2933/0083 , H01L2933/0091
Abstract: A component includes a carrier and a semiconductor body arranged on the carrier, wherein the semiconductor body has an active layer arranged between the first and second semiconductor layers and is configured to generate, during operation of the component, an electromagnetic radiation that can be coupled out from the component through a first main surface, the first main surface of the component has an electrical contact layer configured to electrically contact a first semiconductor layer and in a plan view the carrier covers the first main surface in places, and in direct vicinity of the electrical contact layer the component includes a shielding structure configured to prevent electromagnetic radiation generated by the active layer from impinging onto the contact layer.
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公开(公告)号：US20170148962A1
公开(公告)日：2017-05-25
申请号：US15402689
申请日：2017-01-10
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Korbinian Perzlmaier , Kai Gehrke , Robert Walter , Karl Engl , Guido Weiss , Markus Maute , Stefanie Rammelsberger
CPC classification number: H01L33/60 , H01L33/382 , H01L33/405 , H01L33/42 , H01L33/56 , H01L33/62 , H01L2924/0002 , H01L2924/00
Abstract: A light emitting diode chip includes a semiconductor layer sequence having an active layer that generates electromagnetic radiation, wherein the light emitting diode chip has a radiation exit area at a front side and a mirror layer at least in regions at a rear side situated opposite the radiation exit area, a protective layer is arranged on the mirror layer, the protective layer includes a transparent conductive oxide, the mirror layer adjoins the semiconductor layer sequence at an interface situated opposite the protective layer, first and second layers, the first and second electrical connection layers face the rear side of the semiconductor layer sequence and are electrically insulated from one another, and a partial region of the second electrical connection layer extends from the rear side of the semiconductor layer sequence through at least one perforation of the active layer in a direction toward the front side.
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Patent Agency Ranking
公开(公告)号：US20170125643A1
公开(公告)日：2017-05-04
申请号：US15121713
申请日：2015-06-01
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor： Christian Leirer , Markus Maute
CPC classification number: H01L33/486 , H01L25/165 , H01L25/167 , H01L29/861 , H01L33/46 , H01L33/54 , H01L33/60 , H01L33/62 , H01L2224/18 , H01L2224/24137 , H01L2933/0083
Abstract: A light emitting semiconductor device includes at least one light emitting semiconductor chip having a semiconductor layer sequence, a light outcoupling surface, a rear face on an opposite side of the semiconductor layer sequence from the light outcoupling surface, and side faces which connect the light outcoupling surface and the rear face. The light emitting semiconductor device further includes a carrier body, having a molded body which covers the side faces of the at least one light emitting semiconductor chip directly and in a positively-locking manner. The carrier body comprises, at the light outcoupling surface of the at least one light emitting semiconductor chip, a top face on which a dielectric mirror is disposed. At least part of the light outcoupling surface is uncovered by the dielectric mirror.
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公开(公告)号：US09627587B2
公开(公告)日：2017-04-18
申请号：US14779940
申请日：2014-03-20
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Markus Maute
CPC classification number: H01L33/46 , H01L33/145 , H01L33/38 , H01L33/405 , H01L33/44 , H01L33/54 , H01L33/62
Abstract: A radiation-emitting semiconductor chip (1) is specified, comprising—a semiconductor layer sequence (2) having a first main surface (3) and a second main surface (4) situated opposite the first main surface (3) wherein the semiconductor layer sequence (2) has an active zone (5) suitable for generating electromagnetic radiation, —a structured mirror layer (6), which is electrically non-conductive during operation and is arranged on the side of the first main surface (3) of the semiconductor layer sequence (2), wherein the mirror layer (6) has at least one mirror region (6A, 6B, 6C) which regionally covers the first main surface (3), —at least one encapsulation region (7A, 7B, 7C) which surrounds the at least one mirror region (6A, 6B, 6C) on all sides and is in direct contact with the mirror region (6A, 6B, 6C), wherein the at least one encapsulation region (7A, 7B, 7C); is electrically non-conductive during operation.
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公开(公告)号：US20160260870A1
公开(公告)日：2016-09-08
申请号：US15156802
申请日：2016-05-17
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Markus Maute , Karl Engl , Sebastian Taeger , Robert Walter , Johannes Stocker
CPC classification number: H01L33/46 , H01L33/06 , H01L33/20 , H01L33/32 , H01L33/382 , H01L33/405 , H01L33/42 , H01L33/60 , H01L2924/0002 , H01L2924/00
Abstract: An optoelectronic semiconductor chip is disclosed. In an embodiment the optoelectronic semiconductor chip includes a semiconductor body of semiconductor material, a p-contact layer and an n-contact layer. The semiconductor body includes an active layer intended for generating radiation. The semiconductor body includes a p-side and an n-side, between which the active layer is arranged. The p-contact layer is intended for electrical contacting the p-side. The n-contact layer is intended for electrical contacting the n-side 1b. The n-contact layer contains a TCO layer and a mirror layer, the TCO-layer being arranged between the n-side of the semiconductor body and the mirror layer.
Abstract translation: 公开了一种光电半导体芯片。 在一个实施例中，光电子半导体芯片包括半导体材料的半导体本体，p接触层和n接触层。 半导体主体包括用于产生辐射的有源层。 半导体本体包括p侧和n侧，其间布置有源层。 p接触层用于电接触p侧。 n接触层用于电接触n侧1b。 n接触层包含TCO层和镜层，TCO层布置在半导体主体的n侧和镜面层之间。
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公开(公告)号：US20160093769A1
公开(公告)日：2016-03-31
申请号：US14891972
申请日：2014-06-05
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor： Sabine vom Dorp , Markus Maute
CPC classification number: H01L33/24 , H01L27/156 , H01L33/007 , H01L33/0079 , H01L33/0095 , H01L33/20 , H01L33/22 , H01L33/382 , H01L33/405 , H01L33/44 , H01L33/54 , H01L33/56 , H01L33/60 , H01L33/62 , H01L2933/0016 , H01L2933/0033 , H01L2933/005 , H01L2933/0058 , H01L2933/0066
Abstract: An optoelectronic semiconductor chip includes a carrier substrate; a semiconductor body having a circumferential lateral surface, including a first and a second semiconductor region and, arranged there between, an active zone that generates radiation; and a connection structure including a first and a second conductive connection layer, separated from one another, wherein the first connection layer electrically connects to the first semiconductor region and the second connection layer via at least one plated-through hole electrically connects to the second semiconductor region, wherein the semiconductor body is surrounded by a passivation layer arranged on the lateral surface, and at least one further layer is arranged in a region surrounding the passivation layer.
Abstract translation: 光电子半导体芯片包括载体基板; 半导体本体，具有圆周侧表面，包括第一和第二半导体区域，并且布置在其间，产生辐射的有源区; 以及包括彼此分离的第一和第二导电连接层的连接结构，其中所述第一连接层经由至少一个电镀通孔电连接到所述第一半导体区域并且所述第二连接层电连接到所述第二半导体 区域，其中半导体主体被布置在侧表面上的钝化层包围，并且至少一个另外的层布置在围绕钝化层的区域中。
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30.发明申请OPTOELECTRONIC SEMICONDUCTOR CHIP ENCAPSULATED WITH AN ALD LAYER AND CORRESPONDING METHOD OF PRODUCTION 审中-公开带有ALD层的光电子半导体芯片和相应的生产方法公开(公告)号：US20160005930A1
公开(公告)日：2016-01-07
申请号：US14769125
申请日：2014-03-14
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor： Karl Engl , Georg Hartung , Markus Maute
CPC classification number: H01L33/46 , H01L33/382 , H01L33/405 , H01L33/44 , H01L33/54 , H01L2924/0002 , H01L2933/0025 , H01L2933/005 , H01L2924/00
Abstract: An optoelectronic semiconductor chip includes a semiconductor body including n-conducting and p-conducting regions, an active region generating electromagnetic radiation, a mirror layer reflecting the electromagnetic radiation, and an encapsulating layer sequence formed with an insulating material, wherein the mirror layer is arranged at an underside of the p-conducting region, the active region is arranged at a side of the p-conducting region facing away from the mirror layer, the n-conducting region is arranged at a side of the active region facing away from the p-conducting region, the encapsulation layer sequence covers the semiconductor body at the outer surface thereof in places, the encapsulation layer sequence extends at the outer surface of the semiconductor body from the active region along the p-conducting region as far as below the mirror layer, and the encapsulation layer sequence includes at least one encapsulation layer which is an ALD layer or consists of an ALD layer.
Abstract translation: 光电子半导体芯片包括：半导体本体，其包括n导电和p导电区域，产生电磁辐射的有源区域，反射电磁辐射的反射镜层以及由绝缘材料形成的封装层序列，其中所述镜层布置 在p导电区域的下侧，有源区域布置在p导电区域背离镜面层的一侧，n导电区域布置在有源区域背离p的一侧 封装层序列在其外表面覆盖半导体本体，封装层序列在半导体本体的外表面沿着p导电区域的有源区域延伸到镜面层的下方 ，并且封装层序列包括至少一个作为ALD层或由ALD层组成的封装层。
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