公开(公告)号：US5298441A

公开(公告)日：1994-03-29

申请号：US709741

申请日：1991-06-03

申请人： Herbert Goronkin ,  Jun Shen ,  Saied N. Tehrani ,  X. Theodore Zhu

发明人： Herbert Goronkin ,  Jun Shen ,  Saied N. Tehrani ,  X. Theodore Zhu

IPC分类号： H01L29/772 ,  H01L21/265

CPC分类号： H01L29/7725 ,  Y10S148/097

摘要： A high transconductance HFET (21) utilizes nonalloy semiconductor materials (26) to form a strained channel layer (26) that has a deep quantum well (38). The materials utilized for layers adjacent to the channel layer (26) apply strain to the channel layer (26) and create an excess of high mobility carriers in the channel layer (26). The materials also form a deep quantum well (38) that confines the high mobility carriers to the channel (26). The high mobility carriers and the high confinement provide an HFET (21) that has high transconductance, high frequency response, and sharp pinch-off characteristics.

摘要翻译： 高跨导HFET（21）利用非合金半导体材料（26）形成具有深量子阱（38）的应变通道层（26）。 用于与沟道层（26）相邻的层的材料对沟道层（26）施加应变，并在沟道层（26）中产生过量的高迁移率载流子。 这些材料还形成将高迁移率载流子限制到通道（26）的深量子阱（38）。 高迁移率载流子和高限制性提供了具有高跨导，高频响应和清晰夹断特性的HFET（21）。

公开(公告)号：US5742082A

公开(公告)日：1998-04-21

申请号：US753312

申请日：1996-11-22

申请人： Saied N. Tehrani ,  Jenn-Hwa Huang ,  Herbert Goronkin ,  Ernest Schirmann ,  Marino J. Martinez

发明人： Saied N. Tehrani ,  Jenn-Hwa Huang ,  Herbert Goronkin ,  Ernest Schirmann ,  Marino J. Martinez

IPC分类号： H01L21/338 ,  H01L29/10 ,  H01L29/812 ,  H01L29/80

CPC分类号： H01L29/66863 ,  H01L29/1075 ,  H01L29/8128

摘要： A stable FET including a substrate structure with a doped layer formed as a portion of the substrate structure and defining an electrically conductive shielding region adjacent a surface of the substrate structure. A channel region is positioned on the shielding region and includes a plurality of epitaxial layers grown on the surface of the substrate structure in overlying relationship to the doped layer. A drain and a source are positioned on the channel region in spaced relationship from each other with a gate positioned in overlying relationship on the channel region between the drain and source. An externally accessible electrical contact is connected to the shielding region and to the source region to provide a path for the removal of internally generated charges, such as holes.

摘要翻译： 一种稳定的FET，其包括具有掺杂层的衬底结构，所述掺杂层形成为所述衬底结构的一部分并且限定邻近所述衬底结构的表面的导电屏蔽区域。 通道区域位于屏蔽区域上，并且包括以与掺杂层相重叠的方式在衬底结构的表面上生长的多个外延层。 漏极和源极以彼此间隔开的关系定位在沟道区上，栅极位于漏极和源极之间的沟道区上的上限关系。 外部可接触的电触点连接到屏蔽区域和源极区域，以提供用于去除内部产生的电荷（例如孔）的路径。

公开(公告)号：US5734605A

公开(公告)日：1998-03-31

申请号：US711751

申请日：1996-09-10

申请人： Xiaodong T. Zhu ,  Herbert Goronkin ,  Saied N. Tehrani

发明人： Xiaodong T. Zhu ,  Herbert Goronkin ,  Saied N. Tehrani

IPC分类号： G11C11/15 ,  G11C11/16 ,  G11C11/56 ,  H01L21/8246

CPC分类号： H01L27/228 ,  B82Y10/00 ,  G11C11/15 ,  G11C11/16 ,  G11C11/5607 ,  H01L27/224 ,  G11C2211/5615 ,  G11C2211/5616

摘要： A multi-state, multi-layer magnetic memory cell including a first conductor, a first magnetic layer contacting the first conductor, an insulating layer on the first magnetic layer, a second magnetic layer on the insulating layer, a second conductor contacting the second magnetic layer, and a word line adjacent, or in contact with, the cell so as to provide a magnetic field to partially switch magnetic vectors along the length of the first magnetic layer. Information is stored by passing one current through the word line and a second current through the first and second conductors sufficient to switch vectors in the first and second magnetic layers. Sensing is accomplished by passing a read current through a word line sufficient to switch one layer (and not the other) and a sense current through the cell, by way of the first and second conductors, and measuring a resistance across the cell.

摘要翻译： 一种多态多层磁存储单元，包括第一导体，与第一导体接触的第一磁性层，第一磁性层上的绝缘层，绝缘层上的第二磁性层，与第二磁性体接触的第二导体 层，以及与单元相邻或接触的字线，以便提供磁场以沿着第一磁性层的长度部分地切换磁矢量。 通过使一条电流通过字线并通过第一和第二导体的第二电流足以切换第一和第二磁性层中的矢量来存储信息。 通过使读取电流通过足以通过第一和第二导体切换一层（而不是另一层）和感测电流通过电池的读取电流，并测量电池两端的电阻来实现感测。

公开(公告)号：US5732016A

公开(公告)日：1998-03-24

申请号：US674387

申请日：1996-07-02

申请人： Eugene Chen ,  Saied N. Tehrani ,  Herbert Goronkin

发明人： Eugene Chen ,  Saied N. Tehrani ,  Herbert Goronkin

IPC分类号： H01L43/08 ,  G11C11/14 ,  G11C11/15 ,  H01L21/8246 ,  H01L27/105 ,  G11C11/00

CPC分类号： G11C11/14 ,  H01L27/222 ,  H01L43/08

摘要： A magnetic random access memory (MRAM) cell structure (10) with a portion of giant magnetoresistive (GMR) material (11), around which single or multiple word line (12) is wound, is provided. Magnetic field generated by word current (13, 14) superimposed in portion of GMR material (11) so that a total strength of magnetic field increases proportionally. The same word current is passed through the portion of GMR material (11) multiple times, thus producing equivalent word field by many times as large word current in a conventional MRAM cell.

摘要翻译： 提供具有卷绕单字或多字线（12）的巨磁阻（GMR）材料（11）的一部分的磁随机存取存储器（MRAM）单元结构（10）。 由字电流（13,14）产生的磁场叠加在GMR材料（11）的一部分中，使得磁场的总强度成比例地增加。 相同的字电流多次通过GMR材料（11）的部分，从而在常规MRAM单元中产生大字电流多次的等效字场。

公开(公告)号：US5563087A

公开(公告)日：1996-10-08

申请号：US494465

申请日：1995-06-26

申请人： Jun Shen ,  Saied N. Tehrani ,  Herbert Goronkin ,  Xiaodong T. Zhu

发明人： Jun Shen ,  Saied N. Tehrani ,  Herbert Goronkin ,  Xiaodong T. Zhu

IPC分类号： H01L21/8244 ,  H01L27/11 ,  H01L21/70 ,  H01L27/00

CPC分类号： B82Y30/00 ,  B82Y10/00 ,  H01L27/11 ,  Y10S438/979

摘要： An SRAM including first and second RITDs each formed with a heterostructure including a GaSb active layer sandwiched between AlSb barrier layers, which are sandwiched between InAs layers with each RITD having a contact connected to a first of the InAs layers. A TD including an AlSb layer sandwiched between InAS layers. A second InAs layer for each of the RITDs being integrally formed with a first InAs layer of the TD and a read/write terminal connected to a second InAs layer of the TD.

摘要翻译： 一种包括第一和第二RITD的SRAM，每个RITD均形成有异质结构，该异质结构包括夹在AlSb阻挡层之间的GaSb活性层，它们夹在InAs层之间，每个RITD具有连接到第一InAs层的触点。 包括夹在InAS层之间的AlSb层的TD。 用于与TD的第一InAs层整体形成的每个RITD的第二InAs层和连接到TD的第二InAs层的读/写端子。

公开(公告)号：US5449922A

公开(公告)日：1995-09-12

申请号：US237574

申请日：1994-05-03

申请人： Jun Shen ,  Herbert Goronkin ,  Saied N. Tehrani

发明人： Jun Shen ,  Herbert Goronkin ,  Saied N. Tehrani

IPC分类号： H01L29/68 ,  H01L29/06 ,  H01L29/205 ,  H01L29/88

CPC分类号： H01L29/205 ,  H01L29/88

摘要： A bipolar heterojunction diode has an anode (11, 41), a blocking layer (12, 42) and a junction region (13, 14, 43). a heterojunction (32, 58) in the junction region (13, 14, 43) is utilized to create a misalignment between the band gap of the anode (11, 41) and a band gap of the heterojunction (13, 14, 43). The misalignment prevents a depletion region from extending into the heterojunction (13, 14, 43).

摘要翻译： 双极异质结二极管具有阳极（11,41），阻挡层（12,42）和接合区域（13,14,33）。 在结区域（13,14,13）中的异质结（32,58）被用来产生阳极（11,41）的带隙和异质结（13,14,43）的带隙之间的偏移， 。 不对准防止耗尽区延伸到异质结（13,14,33）中。

公开(公告)号：US5414274A

公开(公告)日：1995-05-09

申请号：US96387

申请日：1993-07-26

申请人： Herbert Goronkin ,  Saied N. Tehrani ,  Jun Shen ,  Xiaodong T. Zhu

发明人： Herbert Goronkin ,  Saied N. Tehrani ,  Jun Shen ,  Xiaodong T. Zhu

IPC分类号： H01L29/06 ,  H01L29/68 ,  H01L29/772 ,  H01L29/205 ,  H01L29/88

CPC分类号： H01L29/772

摘要： A quantum multifunction transistor including a plurality of conduction layers of semiconductor material with a tunnel barrier layer sandwiched therebetween. The conduction layers each being very thin to form discrete energy levels, and the material being chosen so that discrete energy levels therein are not aligned across the tunnel barrier layer in an equilibrium state. A gate coupled to a portion of one of the conduction layers for aligning, in response to a voltage applied thereto, discrete energy levels in the conduction layers across the tunnel barrier layer, whereby majority carrier current flows through the transistor. Application of a higher voltage to the gate results in minority carrier current flow through the transistor.

摘要翻译： 一种量子多功能晶体管，包括多个导电层的半导体材料，其间夹有隧道势垒层。 导电层各自非常薄以形成离散的能级，并且选择材料使得其中的离散能级在平衡状态下不跨越隧道势垒层对准。 耦合到导电层之一的一部分的栅极，用于响应于施加到其上的电压，对准穿过隧道势垒层的导电层中的离散能级，从而多数载流子流过晶体管。 向栅极施加较高的电压导致少数载流子流过晶体管。

公开(公告)号：US5304825A

公开(公告)日：1994-04-19

申请号：US932526

申请日：1992-08-20

申请人： Rimantas L. Vaitkus ,  Saied N. Tehrani ,  Vijay K. Nair ,  Herbert Goronkin

发明人： Rimantas L. Vaitkus ,  Saied N. Tehrani ,  Vijay K. Nair ,  Herbert Goronkin

IPC分类号： H01L29/812 ,  H01L21/338 ,  H01L29/08 ,  H01L29/10 ,  H01L29/778 ,  H01L29/80 ,  H01L31/072 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/109

CPC分类号： H01L29/7783 ,  H01L29/0891 ,  H01L29/1029 ,  Y10S148/072

摘要： A low power heterojunction field effect transistor (10, 30, 50, 60) capable of operating at low drain currents while having a low intermodulation distortion. A channel restriction region (9, 38, 51) is formed between the gate electrodes (24, 41, 69) and the drain electrodes (25, 46, 65). The channel restriction region (9, 38, 51) depletes the channel layer (13, 33) thereby constricting a channel and lowering a drain saturation current. The channel restriction region (9, 38, 51) may be used to set a desired drain saturation current such that a second derivative of the transconductance with respect to the gate-source voltage is approximately zero and a first derivative of the transconductance with respect to the gate-source voltage is, approximately, a relative maximum at the desired operating point.

摘要翻译： 低功率异质结场效应晶体管（10,30,50,60）能够以低漏电流工作，同时具有低的互调失真。 在栅极（24,41,69）和漏极（25,46,65）之间形成沟道限制区（9,38,51）。 信道限制区域（9,38,51）耗尽信道层（13,33），从而限制信道并降低漏极饱和电流。 通道限制区域（9,38,51）可以用于设置所需的漏极饱和电流，使得相对于栅极 - 源极电压的跨导的二次导数近似为零，并且跨导的第一导数相对于 栅极源极电压大约在所需工作点处的相对最大值。

公开(公告)号：US5172384A

公开(公告)日：1992-12-15

申请号：US695062

申请日：1991-05-03

申请人： Herbert Goronkin ,  Michael S. Lebby ,  Saied N. Tehrani

发明人： Herbert Goronkin ,  Michael S. Lebby ,  Saied N. Tehrani

IPC分类号： G02F1/017 ,  H01L33/00 ,  H01S5/34

CPC分类号： H01S5/34 ,  B82Y20/00 ,  G02F1/017 ,  H01S5/3403

摘要： A thin layer, typically a monolayer, of a small band gap material (37) is inserted into the active layer (14) of a quantum well semiconductor device (36, 51). The band gap of the thin layer (37) is smaller than the band gap of the material in the active layer (14), thereby shifting carrier concentrations in the quantum well (26d, 26e, 26h, 26n) of the active layer (14) toward the thin layer (37). This shift increases alignment between the electron wave function (42, 54) and the hole wave function (44, 57) in the quantum well (26d, 26e, 26h, 26n) which increases the probability of stimulated photon emissions thereby reducing the threshold current and threshold voltage of the quantum well semiconductor device (36, 51).

摘要翻译： 将小带隙材料（37）的薄层（通常为单层）插入量子阱半导体器件（36,51）的有源层（14）中。 薄层（37）的带隙比有源层（14）中的材料的带隙小，从而使有源层（14）的量子阱（26d，26e，26h，26n）中的载流子浓度移位 ）朝向薄层（37）。 这种移动增加了量子阱（26d，26e，26h，26n）中的电子波函数（42,54）和空穴波函数（44,57）之间的对准，这增加了被激发的光子发射的概率，从而降低阈值电流 和量子阱半导体器件（36,51）的阈值电压。

公开(公告)号：US5141879A

公开(公告)日：1992-08-25

申请号：US563128

申请日：1990-08-06

申请人： Herbert Goronkin ,  Saied N. Tehrani

发明人： Herbert Goronkin ,  Saied N. Tehrani

IPC分类号： H01L29/10 ,  H01L29/32

CPC分类号： H01L29/1075 ,  H01L29/32 ,  Y10S438/904

摘要： A FET having a high trap concentration interface layer and method of fabrication includes a semi-insulating gallium arsenide substrate having a high trap concentration interface layer formed therein. An non-intentionally doped buffer layer, also comprised of gallium arsenide, is then formed on the interface layer and is followed by the formation of a doped aluminum gallium arsenide layer thereon. A source, a gate and a drain are then formed on the FET layers. The FET and method disclosed herein are especially applicable for low current (5-1000 microamp) operation of microwave low-noise FETs.

摘要翻译： 具有高陷阱浓度界面层的FET和制造方法包括其中形成有高陷阱浓度界面层的半绝缘砷化镓衬底。 然后在界面层上形成也由砷化镓组成的非有意掺杂的缓冲层，随后在其上形成掺杂的砷化镓铝层。 然后在FET层上形成源极，栅极和漏极。 本文公开的FET和方法特别适用于微波低噪声FET的低电流（5-1000微安）操作。