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    PHOTONIC IC CHIP, OPTICAL DEVICE AND SEMICONDUCTOR PACKAGE
    21.
    发明申请
    PHOTONIC IC CHIP, OPTICAL DEVICE AND SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20250105232A1

    公开(公告)日：2025-03-27

    申请号：US18806017

    申请日：2024-08-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Youngbae Kim

    IPC: H01L25/16 ,  G02B6/125 ,  G02B6/42 ,  H01L23/00 ,  H01L23/498

    Abstract: A photonic IC chip includes an optical waveguide including an entrance waveguide extending in a first direction, a first branch waveguide and a second branch waveguide respectively branched from the entrance waveguide, a concave reflector between the first branch waveguide and the second branch waveguide and having a first reflective surface and a second reflective surface, a first exit waveguide extending from the first branch waveguide in the first direction, and a second exit waveguide extending from the second branch waveguide in the first direction, wherein the first reflective surface is adjacent the first branch waveguide and the second reflective surface is adjacent the second branch waveguide. The first reflective surface reflects a first optical signal into the second branch waveguide, and the second reflective surface reflects a second optical signal into the first branch waveguide.

    SEMICONDUCTOR PACKAGE
    22.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20250087541A1

    公开(公告)日：2025-03-13

    申请号：US18804501

    申请日：2024-08-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Youngbae Kim

    IPC: H01L23/13 ,  G02B6/42 ,  H01L23/00 ,  H01L23/498 ,  H01L25/16 ,  H10B80/00

    Abstract: A semiconductor package includes a package substrate that extends in a first direction, an interposer on an upper surface of the package substrate, where the interposer includes: a first substrate that includes a first portion having a first thickness in a second direction that is perpendicular to the first direction and a second portion having a second thickness in the second direction that is greater than the first thickness, and a plurality of first through vias that extend into the first substrate, a photonic IC chip on the first portion of the first substrate, where the photonic IC chip includes: a second substrate, a front insulation layer, an optical waveguide, an optical fiber, and a coupler, and a plurality of semiconductor chips on the second portion of the interposer.

    SEMICONDUCTOR PACKAGE
    23.
    发明公开
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20230317625A1

    公开(公告)日：2023-10-05

    申请号：US18064660

    申请日：2022-12-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Youngbae Kim

    IPC: H01L23/538 ,  H01L23/00

    CPC classification number: H01L23/5386 ,  H01L23/5383 ,  H01L24/08 ,  H01L2224/08235

    Abstract: A semiconductor package includes: a plurality of lower redistribution line patterns, a plurality of lower redistribution via patterns, and a lower redistribution insulating layer surrounding the plurality of lower redistribution line patterns and the plurality of lower redistribution via patterns; an expanded layer at least partially defining a mounting space and including, on the lower redistribution layer, a via pad at least partially defining a via pad recess extending from a bottom surface of the via pad into the via pad, an expanded structure covering the via pad, and an extending via portion connected with the via pad through the expanded structure; and a semiconductor chip in the mounting space, on the lower redistribution layer, wherein, from among the lower redistribution via patterns, a lower redistribution via pattern connected with the via pad extends into the via pad while filling the via pad recess.

    Variable resistance memory device including symmetrical memory cell arrangements and method of forming the same
    25.
    发明授权
    Variable resistance memory device including symmetrical memory cell arrangements and method of forming the same 有权

    公开(公告)号：US10971548B2

    公开(公告)日：2021-04-06

    申请号：US16354545

    申请日：2019-03-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sung-Ho Eun ,  Daehwan Kang ,  Sungwon Kim ,  Youngbae Kim ,  Seokjae Won

    IPC: H01L27/24 ,  H01L45/00

    Abstract: A variable resistance non-volatile memory device can include a semiconductor substrate and a plurality of first conductive lines each extending in a first direction perpendicular to the semiconductor substrate and spaced apart in a second direction on the semiconductor substrate. A second conductive line can extend in the second direction parallel to the semiconductor substrate on a first side of the plurality of first conductive lines and a third conductive line can extend in the second direction parallel to the semiconductor substrate on a second side of the plurality of first conductive lines opposite the first side of the plurality of first conductive lines. A plurality of first non-volatile memory cells can be on the first side of the plurality of first conductive lines and each can be coupled to the second conductive line and to a respective one of the plurality of first conductive lines, where each of the plurality of first non-volatile memory cells can include a switching element, a variable resistance element, and an electrode arranged in a first sequence. A plurality of second non-volatile memory cells can be on the second side of the plurality of first conductive lines and each can be coupled to the third conductive line and to a respective one of the plurality of first conductive lines, wherein each of the plurality of second non-volatile memory cells includes a switching element, a variable resistance element, and an electrode that are arranged in a second sequence, wherein the first sequence and the second sequence are symmetrical with one another about the plurality of first conductive lines.

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