公开(公告)号：US20070167243A1

公开(公告)日：2007-07-19

申请号：US10589896

申请日：2005-03-01

申请人： Tsutomu Kawakatsu ,  Takahiro Ogura ,  Naoto Shibata ,  Shouichi Nakano ,  Tomonori Aoyama

发明人： Tsutomu Kawakatsu ,  Takahiro Ogura ,  Naoto Shibata ,  Shouichi Nakano ,  Tomonori Aoyama

IPC分类号： F16D3/26

CPC分类号： F16D3/2055

摘要： An annular member is installed on a circular cylinder section of a trunnion, and a roller member, in the inner periphery of which a needle bearing is held, is installed on the circular cylinder section. The needle bearing is held between a flange section formed on one end of the roller member and the annular member installed on the trunnion with a predetermined gap between them. Further, a gap (X) between the needle bearing and the annular member is set to satisfy the following relationship. X>R/2·(1/cos θ max−1) where R: Radius of rotation of the center of the roller member relative to the center axis of an outer member. θ max: Maximum inclination angle of an inner member.

摘要翻译： 环形构件安装在耳轴的圆筒部分上，并且在圆筒部分上安装有在其内周上保持有滚针轴承的滚轮构件。 滚针轴承保持在形成在滚子构件的一端的凸缘部分和安装在耳轴上的环形构件之间，其间具有预定的间隙。 此外，滚针轴承和环形构件之间的间隙（X）设定为满足以下关系。 X> R / 2（1 /cosθmax-1）其中R：辊构件的中心相对于外部构件的中心轴线的旋转半径。 θmax：内部构件的最大倾斜角度。

公开(公告)号：US20050181607A1

公开(公告)日：2005-08-18

申请号：US11094308

申请日：2005-03-31

申请人： Tomonori Aoyama

发明人： Tomonori Aoyama

IPC分类号： H01L27/092 ,  H01L21/28 ,  H01L21/316 ,  H01L21/318 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/51 ,  H01L29/78 ,  H01L21/44

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/823857 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： A semiconductor device includes a first insulating film on a silicon substrate and a second insulating film on the first insulating film. The first insulating film is a silicon oxide film having a thickness of 1 nm or less and a suboxide content of 30% or less. The second insulating film is a high dielectric constant insulating film.

摘要翻译： 半导体器件包括硅衬底上的第一绝缘膜和第一绝缘膜上的第二绝缘膜。 第一绝缘膜是厚度为1nm以下，低氧化物含量为30％以下的氧化硅膜。 第二绝缘膜是高介电常数绝缘膜。

公开(公告)号：US06794286B2

公开(公告)日：2004-09-21

申请号：US09558053

申请日：2000-04-26

申请人： Hisako Aoyama ,  Kyoichi Suguro ,  Hiromi Niiyama ,  Hitoshi Tamura ,  Hisataka Hayashi ,  Tomonori Aoyama ,  Gaku Minamihaba ,  Tadashi Iijima

发明人： Hisako Aoyama ,  Kyoichi Suguro ,  Hiromi Niiyama ,  Hitoshi Tamura ,  Hisataka Hayashi ,  Tomonori Aoyama ,  Gaku Minamihaba ,  Tadashi Iijima

IPC分类号： H01L214763

CPC分类号： H01L21/76834 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/7681 ,  H01L21/76813 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76852 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76867 ,  H01L21/76877 ,  H01L21/76885 ,  H01L21/76897 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/53242 ,  H01L23/53247 ,  H01L23/53252 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1036 ,  H01L2924/0002 ,  Y10S257/915 ,  H01L2924/00

摘要： A semiconductor device comprises a semiconductor substrate in which a semiconductor element is formed, an interlayer insulating film formed on the semiconductor substrate, an insulating barrier layer, formed on the interlayer insulating film by plasma nitriding, for preventing diffusion of a metal constituting a wiring layer, a conductive barrier layer, formed on the insulating barrier layer, for preventing diffusion of the metal, and a wiring layer formed of the metal on the conductive barrier layer. A bottom portion of the wiring layer is protected by the conductive barrier layer and the insulating barrier layer. Therefore, the diffusion of the metal constituting the wiring layer can be surely prevented.

摘要翻译： 半导体器件包括其中形成半导体元件的半导体衬底，形成在半导体衬底上的层间绝缘膜，通过等离子体氮化形成在层间绝缘膜上的绝缘阻挡层，用于防止构成布线层的金属的扩散 形成在绝缘阻挡层上的用于防止金属扩散的导电阻挡层，以及由金属形成的布线层在导电阻挡层上。 布线层的底部由导电阻挡层和绝缘阻挡层保护。 因此，可以可靠地防止构成布线层的金属的扩散。

公开(公告)号：US5929473A

公开(公告)日：1999-07-27

申请号：US842646

申请日：1997-04-15

申请人： Kazuya Nishihori ,  Yoshiaki Kitaura ,  Yoshikazu Tanabe ,  Tomonori Aoyama ,  Kyoichi Suguro ,  Kumi Okuwada ,  Shuichi Komatsu ,  Kazuhide Abe

发明人： Kazuya Nishihori ,  Yoshiaki Kitaura ,  Yoshikazu Tanabe ,  Tomonori Aoyama ,  Kyoichi Suguro ,  Kumi Okuwada ,  Shuichi Komatsu ,  Kazuhide Abe

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/06 ,  H01L27/095 ,  H01L29/92 ,  H01L29/812

CPC分类号： H01L27/0629 ,  H01L27/0605 ,  H01L27/10852 ,  H01L28/40

摘要： An SiO.sub.2 film and a first wiring layer are arranged in this order on a GaAs substrate. A capacitor is formed on the first wiring layer. The capacitor includes a lower electrode which has a multi-layer structure consisting of a Ti layer, an Mo layer, and a Pt layer in this order from underside. The capacitor also includes a dielectric film made of strontium titanate. The capacitor further includes an upper electrode which has a multi-layer structure consisting of a WN.sub.x layer (120 nm) and a W layer (300 nm) in this order from underside. That surface of the upper electrode, which is in contact with the dielectric film, is defined by the tungsten nitride layer.

摘要翻译： 在GaAs衬底上依次排列有SiO 2膜和第一布线层。 在第一布线层上形成电容器。 电容器包括从下侧依次具有由Ti层，Mo层和Pt层构成的多层结构的下电极。 电容器还包括由钛酸锶制成的电介质膜。 电容器还包括从下侧依次具有由WNx层（120nm）和W层（300nm）构成的多层结构的上部电极。 与电介质膜接触的上电极的表面由氮化钨层限定。

公开(公告)号：US07858524B2

公开(公告)日：2010-12-28

申请号：US11600794

申请日：2006-11-17

申请人： Tomonori Aoyama

发明人： Tomonori Aoyama

IPC分类号： H01L21/441

CPC分类号： H01L21/823835 ,  H01L29/1033

摘要： A semiconductor device includes a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a silicide gate electrode of an n-type MISFET formed on the gate insulation film; and a silicide gate electrode of a p-type MISFET formed on the gate insulation film and having a thickness smaller than that of the silicide gate electrode of the n-type MISFET, the silicide gate electrode of the p-type MISFET having a ratio of metal content higher than that of the silicide gate electrode of the n-type MISFET.

摘要翻译： 半导体器件包括半导体衬底; 形成在所述半导体基板上的栅极绝缘膜; 形成在栅极绝缘膜上的n型MISFET的硅化物栅电极; 以及形成在栅极绝缘膜上并且具有比n型MISFET的硅化物栅电极的厚度小的p型MISFET的硅化物栅电极，p型MISFET的硅化物栅电极的比例为 金属含量高于n型MISFET的硅化物栅电极。

公开(公告)号：US20100055854A1

公开(公告)日：2010-03-04

申请号：US12585555

申请日：2009-09-17

申请人： Takuya Kobayashi ,  Katsuyuki Sekine ,  Tomonori Aoyama ,  Hiroshi Tomita

发明人： Takuya Kobayashi ,  Katsuyuki Sekine ,  Tomonori Aoyama ,  Hiroshi Tomita

IPC分类号： H01L21/8234

CPC分类号： H01L21/02148 ,  C23C16/401 ,  H01L21/02271 ,  H01L21/0234 ,  H01L21/31645 ,  H01L21/823462 ,  H01L21/823857 ,  H01L29/517 ,  H01L29/66553 ,  H01L29/6656

摘要： A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.

摘要翻译： 制造半导体器件的方法包括在半导体衬底上的层间电介质膜中形成沟槽，沟槽到达半导体衬底并具有由氮化硅膜制成的侧壁; 在200摄氏度至260摄氏度的温度范围内沉积由HfSiO膜制成的栅极绝缘膜，使得HfSiO膜沉积在暴露于沟槽底表面的半导体衬底上，而不沉积HfSiO 膜上的氮化硅膜; 并用金属制成的栅电极填充沟槽。

公开(公告)号：US20090114996A1

公开(公告)日：2009-05-07

申请号：US12261770

申请日：2008-10-30

申请人： Seiji Inumiya ,  Takuya Kobayashi ,  Tomonori Aoyama

发明人： Seiji Inumiya ,  Takuya Kobayashi ,  Tomonori Aoyama

IPC分类号： H01L27/092 ,  H01L21/8238

CPC分类号： H01L21/823857 ,  H01L21/02148 ,  H01L21/02156 ,  H01L21/02161 ,  H01L21/02178 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/3162 ,  H01L21/31641 ,  H01L21/31645

摘要： A semiconductor device includes a substrate having first and second regions on a surface thereof, a first conductivity type first MISFET formed in the first region and a second conductivity type second MISFET formed in the second region. The first MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate and a first insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film and which has a first element forming electric dipoles that reduce a threshold voltage of the first MISFET and the second MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate, and a second insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film formed on the surface of the substrate and which has a second element forming electric dipoles in a direction opposite to that in the first MISFET.

摘要翻译： 半导体器件包括在其表面上具有第一和第二区域的衬底，在第一区域中形成的第一导电类型的第一MISFET和形成在第二区域中的第二导电类型的第二MISFET。 第一MISFET包括在基板的表面上形成的氧化硅膜或氮氧化硅膜，以及形成为与氧化硅膜或氮氧化硅膜接触形成的第一元件的第一绝缘膜，其具有形成电偶极子的第一元件， 降低第一MISFET的阈值电压，并且第二MISFET包括在衬底的表面上形成的氧化硅膜或氧氮化硅膜，以及形成为与氧化硅膜或氮氧化硅膜接触的第二绝缘膜 形成在基板的表面上，并且具有在与第一MISFET中的方向相反的方向上形成电偶极子的第二元件。

公开(公告)号：US07521309B2

公开(公告)日：2009-04-21

申请号：US11948344

申请日：2007-11-30

申请人： Akio Kaneko ,  Motoyuki Sato ,  Katsuyuki Sekine ,  Tomohiro Saito ,  Kazuaki Nakajima ,  Tomonori Aoyama

发明人： Akio Kaneko ,  Motoyuki Sato ,  Katsuyuki Sekine ,  Tomohiro Saito ,  Kazuaki Nakajima ,  Tomonori Aoyama

IPC分类号： H01L21/336

CPC分类号： H01L29/517 ,  H01L21/28097 ,  H01L21/3215 ,  H01L21/823814 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/66507

摘要： A method of manufacturing a semiconductor device having a MOSFET of a first conductivity type and a MOSFET of a second conductivity type different from the first conductivity type formed on a semiconductor substrate, the method has: forming a gate insulating film; forming a first gate electrode layer, and forming a second gate electrode layer; forming a first metal containing layer on said first gate electrode layer and said second gate electrode layer; forming a second metal containing layer for preventing diffusion of a metal on said first metal containing layer; forming a third metal containing layer on said second gate electrode layer from which said first metal containing layer and said second metal containing layer are selectively removed, the third metal containing layer having a thickness different from the thickness of said first metal containing layer in a case where the third metal containing layer contains the same metal or alloy as the metal or alloy contained in said first metal containing layer; and performing a thermal processing, thereby causing reaction between the metal contained in said first metal containing layer and said first gate electrode layer to convert said first gate electrode layer into an alloy and causing reaction between the metal contained in said third metal containing layer and said second gate electrode layer to convert said second gate electrode layer into an alloy, thereby forming gate electrodes of different compositions.

摘要翻译： 一种制造具有第一导电类型的MOSFET的半导体器件的方法和形成在半导体衬底上的与第一导电类型不同的第二导电类型的MOSFET，该方法具有：形成栅极绝缘膜; 形成第一栅电极层，形成第二栅电极层; 在所述第一栅电极层和所述第二栅电极层上形成第一含金属层; 形成用于防止金属在所述第一金属含有层上的扩散的第二含金属层; 在所述第二栅电极层上形成第三金属含有层，从所述第二金属含有层和所述第二金属含有层被选择性地除去，所述第三金属含有层的厚度与所述第一金属含有层的厚度不同 其中所述第三含金属层包含与所述第一含金属层中所含的金属或合金相同的金属或合金; 并进行热处理，从而使包含在所述第一金属含有层中的金属与所述第一栅极电极层之间产生反应，将所述第一栅电极层转换成合金，并引起所述第三金属含有层中含有的金属与所述 第二栅极电极层，以将所述第二栅电极层转换成合金，从而形成不同组成的栅电极。

公开(公告)号：US20090014809A1

公开(公告)日：2009-01-15

申请号：US11882012

申请日：2007-07-30

申请人： Katsuyuki Sekine ,  Tomonori Aoyama ,  Takuya Kobayashi

发明人： Katsuyuki Sekine ,  Tomonori Aoyama ,  Takuya Kobayashi

IPC分类号： H01L21/28 ,  H01L27/092 ,  H01L29/423

CPC分类号： H01L21/823842 ,  H01L21/02148 ,  H01L21/02178 ,  H01L21/02271 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/28097 ,  H01L21/3145 ,  H01L21/3162 ,  H01L21/31645 ,  H01L21/823857 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66507 ,  H01L29/66545

摘要： A semiconductor device includes a semiconductor substrate, and a p-channel MOS transistor provided on the semiconductor substrate, the p-channel MOS transistor comprising a first gate dielectric film including Hf, a second gate dielectric film provided on the first gate dielectric film and including aluminum oxide, and a first metal silicide gate electrode provided on the second gate dielectric film.

摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底上的p沟道MOS晶体管，所述p沟道MOS晶体管包括包括Hf的第一栅极电介质膜，设置在第一栅极电介质膜上的第二栅极电介质膜， 氧化铝和设置在第二栅极电介质膜上的第一金属硅化物栅电极。

公开(公告)号：US20060211502A1

公开(公告)日：2006-09-21

申请号：US10552400

申请日：2004-03-18

申请人： Tsutomu Kawakatsu ,  Naoto Shibata ,  Takahiro Ogura ,  Tomonori Aoyama ,  Masanori Kosugi

发明人： Tsutomu Kawakatsu ,  Naoto Shibata ,  Takahiro Ogura ,  Tomonori Aoyama ,  Masanori Kosugi

IPC分类号： F16D3/26

CPC分类号： F16C19/46 ,  F16D3/205 ,  F16D2003/2026

摘要： Roller members of a constant velocity universal joint are externally fitted to trunnions with a plurality of needle bearings interposed between the roller members and the trunnions. The roller member has an inner diameter portion having an L-shaped cross section by a flange section which protrudes radially inwardly and an annular recess section which is provided and defined by a gap with respect to the trunnion. The plurality of needle bearings are retained on the inner diameter portion of the roller member by paste wax.

摘要翻译： 等速万向接头的滚子部件外部安装在耳轴上，多个滚针轴承插在滚子部件和耳轴之间。 辊构件具有内径部分，其具有通过径向向内突出的凸缘部分的L形横截面，以及由相对于耳轴的间隙设置和限定的环形凹部。 多个针轴承通过糊蜡保持在辊构件的内径部分上。