摘要:
A transistor component having a shielding structure. One embodiment provides a source terminal, a drain terminal and control terminal. A source zone of a first conductivity type is connected to the source terminal. A drain zone of the first conductivity type is connected to the drain terminal. A drift zone is arranged between the source zone and the drain zone. A junction control structure is provided for controlling a junction zone in the drift zone between the drain zone and the source zone, at least including one control zone. A shielding structure is arranged in the drift zone between the junction control structure and the drain zone and at least includes a shielding zone of a second conductivity type being complementarily to the first conductivity type. The shielding zone is connected to a terminal for a shielding potential. The at least one control zone and the at least one shielding zone have different geometries or different orientations in a plain that is perpendicular to a current flow direction of the component.
摘要:
A method for making an integrated circuit including vertical junction field effect transistors is disclosed. One embodiment creates a vertical junction field effect transistor using a fault-tolerant or alignment-tolerant production process. The device performance is not harmed, even if misalignments in consecutive semiconductor processing steps occur.
摘要:
A method of manufacturing a device comprises depositing one or more metallization layers to a substrate, locally heating an area of the one or more metallization layers to obtain a substrate/metallization-layer compound or a metallization-layer compound, the compound comprising an etch-selectivity toward an etching medium which is different to that of the one or more metallization layers outside the area, and removing the one or more metallization layers in the area or outside the area, depending on the etching selectivity in the area or outside the area, by etching with the etching medium to form the device.
摘要:
The invention relates to a lateral semiconductor diode, in which contact metal fillings (6, 7), which run in trenches (3, 4) in particular in a silicon carbide body (1, 2), are interdigitated at a distance from one another, and a rectifying Schottky or pn junction (18) is provided.
摘要:
A method for treating a surface on an SiC semiconductor body produced by epitaxy. According to the method, the parts of the epitactic layer that are deposited in the final phase of the epitaxy are removed by etching and a wet chemical treatment is then carried out in order to remove a thin natural oxide on the surface. Alternatively, a metal layer configured as a Schottky contact and/or as an ohmic contact can also be applied to the surface immediately after the removal process.
摘要:
A semiconductor device is disclosed. One embodiment includes a first semiconductor die having a normally-off transistor. In a second semiconductor die a plurality of transistor cells of a normally-on transistor are formed, wherein one of a source terminal/drain terminal of the normally-on transistor is electrically coupled to a gate terminal of the normally-on transistor and the other one the source terminal/drain terminal of the normally-off transistor is electrically coupled to one of a source terminal/drain terminal of the normally-on transistor. The second semiconductor die includes a gate resistor electrically coupled between the gate terminal of the normally-off transistor and respective gates of the plurality of transistor cells. A voltage clamping element is electrically coupled between the gate terminal and the one of the source terminal/drain terminal of the normally-on transistor.
摘要:
An electronic device and manufacturing thereof. One embodiment provides a semiconductor chip having a control electrode and a first load electrode on a first surface and a second load electrode on a second surface. A first lead is electrically coupled to the control electrode. A second lead is electrically coupled to the first load electrode. A third lead is electrically coupled to the first load electrode, the third lead being separate from the second lead. A fourth lead is electrically coupled to the second load electrode, the second and third leads being arranged between the first and fourth leads.
摘要:
One aspect includes a semiconductor device with self-aligned contacts, integrated circuit and manufacturing method. One embodiment provides gate control structures. Each of the gate control structures is configured to control the conductivity of a channel region within a silicon carbide substrate by field effect. A contact hole is self-aligned to opposing sidewalls of adjacent gate control structures by intermediate spacers.
摘要:
An electronic device and manufacturing thereof. One embodiment provides a semiconductor chip having a control electrode and a first load electrode on a first surface and a second load electrode on a second surface. A first lead is electrically coupled to the control electrode. A second lead is electrically coupled to the first load electrode. A third lead is electrically coupled to the first load electrode, the third lead being separate from the second lead. A fourth lead is electrically coupled to the second load electrode, the second and third leads being arranged between the first and fourth leads.
摘要:
The invention relates to a lateral semiconductor diode, in which contact metal fillings (6, 7), which run in trenches (3, 4) in particular in a silicon carbide body (1, 2), are interdigitated at a distance from one another, and a rectifying Schottky or pn junction (18) is provided.