Method and system for treating a dielectric film
    21.
    发明申请
    Method and system for treating a dielectric film 失效
    电介质膜处理方法及系统

    公开(公告)号:US20050077597A1

    公开(公告)日:2005-04-14

    申请号:US10682196

    申请日:2003-10-10

    摘要: A method and system for treating a dielectric film includes exposing at least one surface of the dielectric film to a CxHy containing material, wherein x and y are each integers greater than or equal to a value of unity. The dielectric film can include a low dielectric constant film with or without pores having an etch feature formed therein following dry etch processing. As a result of the etch processing or ashing, exposed surfaces in the feature formed in the dielectric film can become damaged, or activated, leading to retention of contaminants, absorption of moisture, increase in dielectric constant, etc. Damaged surfaces, such as these, are treated by performing at least one of healing these surfaces to, for example, restore the dielectric constant (i.e., decrease the dielectric constant) and cleaning these surfaces to remove contaminants, moisture, or residue. Moreover, preparation for barrier layer and metallization of features in the film may include treating by performing sealing of sidewall surfaces of the feature to close exposed pores and provide a surface for barrier film deposition.

    摘要翻译: 用于处理电介质膜的方法和系统包括将电介质膜的至少一个表面暴露于含CxHy的材料,其中x和y各自为大于或等于一个值的整数。 介电膜可以包括具有或不具有在干蚀刻处理之后形成的蚀刻特征的孔的低介电常数膜。 作为蚀刻处理或灰化的结果,形成在电介质膜中的特征中的暴露表面可能被损坏或激活,导致污染物的保留,水分的吸收,介电常数的增加等。损坏的表面,例如这些 通过执行愈合这些表面中的至少一个来处理,例如恢复介电常数(即,降低介电常数)并清洁这些表面以去除污染物,水分或残留物。 此外,膜的特征的阻挡层和金属化的制备可以包括通过执行特征的侧壁表面的密封来封闭暴露的孔并提供用于阻挡膜沉积的表面来进行处理。

    Method of manufacturing semiconductor device
    25.
    发明授权
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US06746969B2

    公开(公告)日:2004-06-08

    申请号:US09982003

    申请日:2001-10-19

    IPC分类号: H01L2131

    摘要: A method of manufacturing a semiconductor device comprises preparing a substrate to be treated, and forming an insulation film above the substrate, which includes applying an insulation film raw material above the substrate, the insulation film raw material including a substance or a precursor of the substance, the insulation film comprising the substance, curing the insulation film raw material by irradiating an electron beam on the substrate while heating the substrate in a reactor chamber, changing at least one of parameter selected from the group consisting of pressure in the reactor chamber, temperature of the substrate, type of gas having the substrate exposed thereto, flow rate of gas introduced into the reactor chamber, position of the substrate, and quantity of electrons incident to the substrate per unit time when the electron beam is being irradiated on the substrate.

    摘要翻译: 一种制造半导体器件的方法包括:准备待处理的衬底,以及在衬底上方形成绝缘膜,该绝缘膜包括在衬底上施加绝缘膜原料,所述绝缘膜原料包括物质或物质的前体 所述绝缘膜包含该物质,通过在反应器室中加热基板同时在基板上照射电子束来固化绝缘膜原料,改变选自反应器室中的压力,温度 的基板,当电子束被照射在基板上时,具有暴露于其中的基板的气体类型,引入反应室的气体流量,基板的位置和每单位时间入射到基板的电子量。

    Interconnect structure with precise conductor resistance and method to form same
    26.
    发明授权
    Interconnect structure with precise conductor resistance and method to form same 有权
    具有精确导体电阻的互连结构和形成相同的方法

    公开(公告)号:US06710450B2

    公开(公告)日:2004-03-23

    申请号:US09795430

    申请日:2001-02-28

    IPC分类号: H01L23532

    摘要: An interconnect structure including a patterned multilayer of spun-on dielectrics as well as methods for manufacturing the same are provided. The interconnect structure includes a patterned multilayer of spun-on dielectrics formed on a surface of a substrate. The patterned multilayer of spun-on dielectrics is composed of a bottom low-k dielectric, a buried etch stop layer, and a top low-k dielectric, wherein the bottom and top low-k dielectrics have a first composition, the said buried etch stop layer has a second composition which is different from the first composition and the buried etch stop layer is covalently bonded to said top and bottom low-k dielectrics. The interconnect structure further includes a polish stop layer formed on the patterned multilayer of spun-on dielectrics; and metal conductive regions formed within the patterned multilayer of spun-on dielectrics. Covalent bonding is achieved by employing an organosilane having functional groups that are capable of bonding with the top and bottom dielectric layers.

    摘要翻译: 提供了包括旋涂电介质的图案化多层的互连结构及其制造方法。 互连结构包括形成在衬底的表面上的旋涂电介质的图案化多层。 旋涂电介质的图案化多层由底部低k电介质,掩埋蚀刻停止层和顶部低k电介质组成,其中底部和顶部低k电介质具有第一组成,所述掩埋蚀刻 停止层具有与第一组成不同的第二组成,并且掩埋蚀刻停止层共价键合到所述顶部和底部低k电介质。 互连结构还包括形成在旋涂电介质的图案化多层上的抛光停止层; 以及形成在旋涂电介质的图案化多层中的金属导电区域。 通过使用具有能够与顶部和底部电介质层结合的官能团的有机硅烷来实现共价键合。

    Oxidative annealing method for forming etched spin-on-glass (SOG) planarizing layer with uniform etch profile
    29.
    发明申请
    Oxidative annealing method for forming etched spin-on-glass (SOG) planarizing layer with uniform etch profile 审中-公开
    用于形成具有均匀蚀刻轮廓的蚀刻旋涂玻璃(SOG)平坦化层的氧化退火方法

    公开(公告)号:US20030148631A1

    公开(公告)日:2003-08-07

    申请号:US10361735

    申请日:2003-02-10

    IPC分类号: H01L021/31

    摘要: Within a method for forming a spin-on-glass (SOG) layer there is first provided a substrate. There is then formed over the substrate a spin-oil-glass (SOG) planarizing layer while employing a silsesquioxane spin-on-glass (SOG) planarizing material. There is then annealed thermally the spin-on-glass (SOG) planarizing layer while employing a first thermal annealing method employing a first gaseous atmosphere comprising a non-oxidizing gas to form a cured spin-on-glass (SOG) planarizing layer. Finally, there is then annealed thermally the cured spin-on-glass (SOG) planarizing layer while employing a second thermal annealing method employing a second gaseous atmosphere comprising an oxidizing gas to form firm the cured spin-on-glass (SOG) planarizing layer an oxidized cured spin-on-glass (SOG) planarizing layer. The oxidized cured spin-on-glass (SOG) planarizing layer when subsequently etched exhibits a more uniform etch profile, and the oxidized cured spin-on-glass (SOG) planarizing layer also exhibits enhanced adhesion to additional layers formed thereupon.

    摘要翻译: 在形成旋涂玻璃(SOG)层的方法中,首先提供基材。 然后在使用倍半硅氧烷旋涂玻璃(SOG)平面化材料的同时,在基板上形成旋转油玻璃(SOG)平面化层。 然后使用采用包含非氧化性气体的第一气体气氛的第一热退火方法,在旋涂玻璃(SOG)平面化层上进行热退火,以形成固化的旋涂玻璃(SOG)平坦化层。 最后,然后将固化的旋涂玻璃(SOG)平坦化层进行热处理,同时采用使用包含氧化气体的第二气态气氛的第二热退火方法,以形成固化的旋涂玻璃(SOG)平坦化层 氧化固化的旋涂玻璃(SOG)平坦化层。 随后蚀刻的氧化固化的旋涂玻璃(SOG)平坦化层表现出更均匀的蚀刻轮廓,并且氧化的固化旋涂玻璃(SOG)平坦化层也对其上形成的附加层显示出增强的粘合性。

    Method of avoiding dielectric layer deterioration with a low dielectric constant
    30.
    发明授权
    Method of avoiding dielectric layer deterioration with a low dielectric constant 有权
    避免介电层劣化的低介电常数的方法

    公开(公告)号:US06583067B2

    公开(公告)日:2003-06-24

    申请号:US09681987

    申请日:2001-07-03

    IPC分类号: H01L2100

    摘要: The present invention is a method to avoid deterioration of a dielectric characteristic of a dielectric layer having a low dielectric constant (low k) during a stripping process. The method involves first forming a low k dielectric layer on the surface of a substrate of a semiconductor wafer. Then, a patterned photoresist layer is formed over the surface of the low k dielectric layer. The patterned photoresist layer is then used as a hard mask to perform an etching process on the low k dielectric layer. A stripping process is then performed to remove the patterned photoresist layer. Finally, a surface treatment is utilized on the low k dielectric layer to remove Si—OH bonds in the low k dielectric layer so as to avoid moisture absorption of the low k dielectric layer that causes deterioration of the dielectric characteristic.

    摘要翻译: 本发明是一种避免剥离过程中介电常数低(低k)的电介质层的介电特性劣化的方法。 该方法包括首先在半导体晶片的衬底的表面上形成低k电介质层。 然后,在低k电介质层的表面上形成图案化的光致抗蚀剂层。 然后将图案化的光致抗蚀剂层用作硬掩模,以在低k电介质层上进行蚀刻工艺。 然后执行剥离过程以除去图案化的光致抗蚀剂层。 最后,在低k电介质层上利用表面处理来除去低k电介质层中的Si-OH键,以避免导致介电特性劣化的低k电介质层的吸湿。