摘要:
A solution for electroless deposition of palladium is provided. A reducing agent of Co2+ or Ti3+ ions is provided to the solution. Pd2+ ions are provided to the solution.
摘要:
A catalyst adsorption method can sufficiently adsorb a catalyst to a lower portion of a recess formed in a substrate. A substrate 20 in which a recess 22 is formed is prepared. Then, a catalyst 23 formed of nanoparticles coated with a dispersant is adsorbed to a surface of the substrate 20 by bringing the substrate 20 into contact with a catalyst solution 12 containing the catalyst by a catalyst adsorption device 10. At that time, a high frequency vibration is applied to the catalyst solution 12.
摘要:
After a copper interconnection is formed above a substrate, a surface of the copper interconnection is activated by performing acid cleaning. Thereafter, the substrate is immersed in a BTA (Benzo triazole) aqueous solution to form a protection film covering the surface of the copper interconnection. At this time, Cu—N—R bonds (R is an organic group) are formed in grain boundary portions in the surface of the copper interconnection. Thereafter, the protection film is removed by performing alkaline cleaning. The Cu—N—R bonds remain in the grain boundary portions in the surface of the copper interconnection even after the protection film is removed. Subsequently, the surface of the copper interconnection is subjected to an activation process, and a barrier layer is formed thereafter by electroless-plating the surface of the copper interconnection with NiP or CoWP.
摘要:
The present invention provides a method for forming a through-via, including the steps of (1) forming an alloy film as a diffusion-preventive layer that prevents diffusion of copper, in an area on a side wall of a hole formed in a substrate that extends from an entrance of the hole to a central part of the hole, by use of an electroless cobalt plating solution or an electroless nickel plating solution containing at least cobalt ion or nickel ion, a complexing agent, a reductant, and a pH adjusting agent; (2) forming an alloy film as a diffusion-preventive layer in an area on the side wall of the hole formed in the substrate that extends from the central part of the hole to a bottom of the hole, by use of an electroless cobalt plating solution or an electroless nickel plating solution containing at least the cobalt ion or the nickel ion, the complexing agent, the reductant, the pH adjusting agent, and an amino group-containing polymer; and (3) stacking a copper seed layer on the diffusion-preventive layer formed in each of steps (1) and (2) by use of an electroless copper plating solution.
摘要:
An interconnect structure for integrated circuits for copper wires in integrated circuits and methods for making the same are provided. Mn, Cr, or V containing layer forms a barrier against copper diffusing out of the wires, thereby protecting the insulator from premature breakdown, and protecting transistors from degradation by copper. The Mn, Cr, or V containing layer also promotes strong adhesion between copper and insulators, thus preserving the mechanical integrity of the devices during manufacture and use, as well as protecting against failure by electromigration of the copper during use of the devices and protecting the copper from corrosion by oxygen or water from its surroundings. In forming such integrated circuits, certain embodiments of the invention provide methods to selectively deposit Mn, Cr, V, or Co on the copper surfaces while reducing or even preventing deposition of Mn, Cr, V, or Co on insulator surfaces. Catalytic deposition of copper using a Mn, Cr, or V containing precursor and an iodine or bromine containing precursor is also provided.
摘要:
Disclosed herein are various methods of forming copper-based conductive structures on integrated circuit devices. In one example, the method includes forming a trench/via in a layer of insulating material, performing a deposition process to form an as-deposited copper-based seed layer above the layer of insulating material in the trench/via, wherein the copper-based seed layer has a first portion that is positioned above a bottom of the trench/via that is thicker than second portions of the copper seed layer that are positioned above sidewalls of the trench/via, performing an etching process on the as-deposited copper-based seed layer to substantially remove portions of the second portions of the as-deposited copper-based seed layer and performing an electroless deposition process to fill the trench/via with a copper-based material.
摘要:
An interconnect structure for integrated circuits for copper wires in integrated circuits and methods for making the same are provided. Mn, Cr, or V containing layer forms a barrier against copper diffusing out of the wires, thereby protecting the insulator from premature breakdown, and protecting transistors from degradation by copper. The Mn, Cr, or V containing layer also promotes strong adhesion between copper and insulators, thus preserving the mechanical integrity of the devices during manufacture and use, as well as protecting against failure by electromigration of the copper during use of the devices and protecting the copper from corrosion by oxygen or water from its surroundings. In forming such integrated circuits, certain embodiments of the invention provide methods to selectively deposit Mn, Cr, V, or Co on the copper surfaces while reducing or even preventing deposition of Mn, Cr, V, or Co on insulator surfaces. Catalytic deposition of copper using a Mn, Cr, or V containing precursor and an iodine or bromine containing precursor is also provided.
摘要:
According to one embodiment, a method for forming an interconnection pattern includes forming an insulating pattern, forming a self-assembled film, and forming a conductive layer. The insulating pattern has a side surface on a major surface of a matrix. The self-assembled film has an affinity with a material of the insulating pattern on the side surface of the insulating pattern. The forming the conductive layer includes depositing a conductive material on a side surface of the self-assembled film.
摘要:
Embodiments of the invention provide methods for forming conductive materials within contact features on a substrate by depositing a seed layer within a feature and subsequently filling the feature with a copper-containing material during an electroless deposition process. In one example, a copper electroless deposition solution contains levelers to form convexed or concaved copper surfaces. In another example, a seed layer is selectively deposited on the bottom surface of the aperture while leaving the sidewalls substantially free of the seed material during a collimated PVD process. In another example, the seed layer is conformably deposited by a PVD process and subsequently, a portion of the seed layer and the underlayer are plasma etched to expose an underlying contact surface. In another example, a ruthenium seed layer is formed on an exposed contact surface by an ALD process utilizing the chemical precursor ruthenium tetroxide.
摘要:
A plated product made of a substrate having formed thereon an alloy barrier thin film for preventing copper diffusion contains metal B, which has barrier properties in relation to copper and enables displacement plating with the copper ions contained in an electroless copper plating solution, and metal A, which tends to have less ionization than metal B in an electroless copper plating solution at a pH of 10 or higher; the alloy barrier thin film for preventing copper diffusion has a composition wherein metal A constitutes between 15 and 35 at % of the atoms; and a copper thin film is formed on the alloy barrier thin film by electroless plating using an electroless copper plating solution at a pH of 10 or higher.