公开(公告)号：US5654226A

公开(公告)日：1997-08-05

申请号：US305435

申请日：1994-09-07

申请人： Victor Albert Keith Temple ,  Stephen Daley Arthur

发明人： Victor Albert Keith Temple ,  Stephen Daley Arthur

IPC分类号： H01L21/02 ,  H01L21/18 ,  H01L21/20 ,  H01L21/331 ,  H01L21/762 ,  H01L21/784 ,  H01L21/302 ,  H01L21/304 ,  H01L21/463

CPC分类号： H01L21/78 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/76251 ,  H01L29/66333 ,  Y10S438/977

摘要： A method of processing wafers for power devices in which the wafer has a desired thickness less than the thickness necessary to provide mechanical support. A silicon wafer of the desired thickness is bonded to a carrier wafer until most, if not all, of the processing steps are completed, after which the silicon wafer is separated from its carrier wafer. The carrier wafer may serve as a diffusion source, and the areas of the bonding of the silicon wafer to the carrier wafer may be selected consistent with the devices or groups of devices to be formed by the separation of the two wafers. The carrier wafer may by bonded to the device wafer over nearly the full surface area and the carrier wafer remain a part of the final device.

摘要翻译： 一种处理用于功率器件的晶片的方法，其中晶片具有小于提供机械支撑所需的厚度的期望厚度。 将期望厚度的硅晶片结合到载体晶片，直到大多数（如果不是全部）处理步骤完成，之后硅晶片与其载体晶片分离。 载体晶片可以用作扩散源，并且硅晶片与载体晶片的接合区域可以与要通过分离两个晶片而形成的器件或器件组一致。 载体晶片可以通过在几乎整个表面积上结合到器件晶片，并且载体晶片保留在最终器件的一部分。

公开(公告)号：US09257283B2

公开(公告)日：2016-02-09

申请号：US13567791

申请日：2012-08-06

申请人： Joseph Darryl Michael ,  Stephen Daley Arthur ,  Tammy Lynn Johnson ,  David Alan Lilienfeld

发明人： Joseph Darryl Michael ,  Stephen Daley Arthur ,  Tammy Lynn Johnson ,  David Alan Lilienfeld

IPC分类号： H01L29/15 ,  H01L21/00 ,  H01L21/04 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/0485 ,  H01L29/66068 ,  H01L29/7827

摘要： A semiconductor device is disclosed along with methods for manufacturing such a device. In certain embodiments, the semiconductor device includes a source electrode formed using a metal that limits a shift, such as due to bias temperature instability, in a threshold voltage of the semiconductor device during operation. In certain embodiments the semiconductor device may be based on silicon carbide.

摘要翻译： 公开了一种半导体器件以及用于制造这种器件的方法。 在某些实施例中，半导体器件包括使用金属形成的源电极，其在操作期间限制半导体器件的阈值电压中的偏移，例如由于偏置温度不稳定性。 在某些实施例中，半导体器件可以基于碳化硅。

公开(公告)号：US08691634B2

公开(公告)日：2014-04-08

申请号：US13960971

申请日：2013-08-07

申请人： Ahmed Elasser ,  Stephen Daley Arthur ,  Alexey Vert ,  Stanislav Ivanovich Soloviev ,  Peter Almern Losee

发明人： Ahmed Elasser ,  Stephen Daley Arthur ,  Alexey Vert ,  Stanislav Ivanovich Soloviev ,  Peter Almern Losee

IPC分类号： H01L21/332

CPC分类号： H01L31/1113 ,  H01L27/0817 ,  H01L29/74

摘要： A thyristor device includes a semiconductor body and a conductive anode. The semiconductor body has a plurality of doped layers forming a plurality of dopant junctions and includes an optical thyristor, a first amplifying thyristor, and a switching thyristor. The conductive anode is disposed on a first side of the semiconductor body. The optical thyristor is configured to receive incident radiation to generate a first electric current, and the first amplifying thyristor is configured to increase the first electric current from the optical thyristor to at least a threshold current. The switching thyristor switches to the conducting state in order to conduct a second electric current from the anode and through the semiconductor body.

摘要翻译： 晶闸管器件包括半导体本体和导电阳极。 半导体本体具有形成多个掺杂剂结的多个掺杂层，并且包括光学晶闸管，第一放大晶闸管和开关晶闸管。 导电阳极设置在半导体本体的第一侧上。 光晶闸管被配置为接收入射辐射以产生第一电流，并且第一放大晶闸管被配置为将来自光晶闸管的第一电流增加到至少阈值电流。 开关晶闸管切换到导通状态，以便从阳极和半导体本体传导第二电流。

公开(公告)号：US20140070229A1

公开(公告)日：2014-03-13

申请号：US13610614

申请日：2012-09-11

申请人： Zachary Matthew Stum ,  Ahmed Elasser ,  Stephen Daley Arthur ,  Stanislav I. Soloviev ,  Peter Almern Losee

发明人： Zachary Matthew Stum ,  Ahmed Elasser ,  Stephen Daley Arthur ,  Stanislav I. Soloviev ,  Peter Almern Losee

IPC分类号： H01L29/20 ,  H01L21/768 ,  H01L29/161

CPC分类号： H01L29/0661 ,  H01L21/02107 ,  H01L29/063 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/73 ,  H01L29/7395 ,  H01L29/74 ,  H01L29/87

摘要： An electrical device includes a blocking layer disposed on top of a substrate layer, wherein the blocking layer and the substrate layer each are wide bandgap semiconductors, and the blocking layer and the substrate layer form a buried junction in the electrical device. The device comprises a termination feature disposed at a surface of the blocking layer and a filled trench disposed proximate to the termination feature. The filled trench extends through the blocking layer to reach the substrate layer and is configured to direct an electrical potential associated with the buried junction toward the termination feature disposed near the surface of the blocking layer to terminate the buried junction.

摘要翻译： 电气装置包括设置在基底层顶部的阻挡层，其中阻挡层和基底层各自是宽带隙半导体，并且阻挡层和基底层在电气装置中形成掩埋结。 该装置包括设置在阻挡层的表面处的端接特征和靠近端接特征设置的填充沟槽。 填充的沟槽延伸穿过阻挡层以到达衬底层并且被配置为将与掩埋结相关联的电势引导到设置在阻挡层表面附近的端接特征以终止掩埋结。

公开(公告)号：US20140034963A1

公开(公告)日：2014-02-06

申请号：US13567791

申请日：2012-08-06

申请人： Joseph Darryl Michael ,  Stephen Daley Arthur ,  Tammy Lynn Johnson ,  David Alan Lilienfeld

发明人： Joseph Darryl Michael ,  Stephen Daley Arthur ,  Tammy Lynn Johnson ,  David Alan Lilienfeld

IPC分类号： H01L29/24 ,  H01L21/20

CPC分类号： H01L21/0485 ,  H01L29/66068 ,  H01L29/7827

摘要： A semiconductor device is disclosed along with methods for manufacturing such a device. In certain embodiments, the semiconductor device includes a source electrode formed using a metal that limits a shift, such as due to bias temperature instability, in a threshold voltage of the semiconductor device during operation. In certain embodiments the semiconductor device may be based on silicon carbide.

摘要翻译： 公开了一种半导体器件以及用于制造这种器件的方法。 在某些实施例中，半导体器件包括使用金属形成的源电极，其在操作期间限制半导体器件的阈值电压中的偏移，例如由于偏置温度不稳定性。 在某些实施例中，半导体器件可以基于碳化硅。

公开(公告)号：US08530902B2

公开(公告)日：2013-09-10

申请号：US13281638

申请日：2011-10-26

申请人： Avinash Srikrishnan Kashyap ,  David Mulford Shaddock ,  Emad Andarawis Andarawis ,  Peter Micah Sandvik ,  Stephen Daley Arthur ,  Vinayak Tilak

发明人： Avinash Srikrishnan Kashyap ,  David Mulford Shaddock ,  Emad Andarawis Andarawis ,  Peter Micah Sandvik ,  Stephen Daley Arthur ,  Vinayak Tilak

IPC分类号： H01L29/15

CPC分类号： H01L21/56 ,  H01L23/3185 ,  H01L29/0657 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/861 ,  H01L29/8618 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a silicon carbide transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a semiconductor die in a mesa structure that includes a first layer of a first wide band gap semiconductor having a conductivity of a first polarity, a second layer of the first or a second wide band gap semiconductor having a conductivity of a second polarity coupled in electrical contact with the first layer wherein the second polarity is different than the first polarity. The TVS assembly also includes a third layer of the first, the second, or a third wide band gap semiconductor having a conductivity of the first polarity coupled in electrical contact with the second layer. The layer having a conductivity of the second polarity is lightly doped relative to the layers having a conductivity of the first polarity.

摘要翻译： 提供了形成碳化硅瞬态电压抑制器（TVS）组件的方法和用于瞬态电压抑制器（TVS）组件的系统。 TVS组件包括台面结构中的半导体管芯，其包括具有第一极性的导电率的第一宽带隙半导体的第一层，具有第二极导电率的第一或第二宽带隙半导体的第二层 极性与第一层电接触，其中第二极性不同于第一极性。 TVS组件还包括具有与第二层电接触的第一极性的导电性的第一，第二或第三宽带隙半导体的第三层。 相对于具有第一极性的导电性的层，具有第二极性的导电性的层被轻掺杂。

公开(公告)号：US08466007B2

公开(公告)日：2013-06-18

申请号：US13236748

申请日：2011-09-20

申请人： Eladio Clemente Delgado ,  Richard Alfred Beaupre ,  Stephen Daley Arthur ,  Ernest Wayne Balch ,  Kevin Matthew Durocher ,  Paul Alan McConnelee ,  Raymond Albert Fillion

发明人： Eladio Clemente Delgado ,  Richard Alfred Beaupre ,  Stephen Daley Arthur ,  Ernest Wayne Balch ,  Kevin Matthew Durocher ,  Paul Alan McConnelee ,  Raymond Albert Fillion

IPC分类号： H01L21/50

CPC分类号： H01L25/50 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/29 ,  H01L24/82 ,  H01L24/83 ,  H01L25/072 ,  H01L25/16 ,  H01L2224/04105 ,  H01L2224/2413 ,  H01L2224/24137 ,  H01L2224/2518 ,  H01L2224/2919 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/92144 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/12044 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15192 ,  H01L2924/1532 ,  H01L2924/18162 ,  H01L2924/00 ,  H01L2924/01014

摘要： A power semiconductor module includes: an interconnect layer including an electrical conductor patterned on a dielectric layer, the electrical conductor including a power coupling portion having a thickness sufficient to carry power currents and a control coupling portion having a thickness thinner than that of the power coupling portion; and a semiconductor power device physically coupled to the interconnect layer and electrically coupled to the power coupling portion of the electrical conductor.

摘要翻译： 功率半导体模块包括：互连层，其包括在电介质层上图案化的电导体，所述电导体包括具有足以承载电力电流的厚度的功率耦合部分和具有比功率耦合的厚度更薄的厚度的控制耦合部分 一部分; 以及物理耦合到所述互连层并且电耦合到所述电导体的功率耦合部分的半导体功率器件。

公开(公告)号：US20130075756A1

公开(公告)日：2013-03-28

申请号：US13431596

申请日：2012-03-27

申请人： Stephen Daley Arthur ,  Joseph Darryl Michael ,  Tammy Lynn Johnson ,  David Alan Lilienfeld ,  Kevin Sean Matocha ,  Jody Alan Fronheiser ,  William Gregg Hawkins

发明人： Stephen Daley Arthur ,  Joseph Darryl Michael ,  Tammy Lynn Johnson ,  David Alan Lilienfeld ,  Kevin Sean Matocha ,  Jody Alan Fronheiser ,  William Gregg Hawkins

IPC分类号： H01L29/78

CPC分类号： H01L29/78 ,  H01L21/045 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/4925 ,  H01L29/4933 ,  H01L29/7395 ,  H01L29/7455 ,  H01L29/7802

摘要： According to one embodiment, a semiconductor device, having a semiconductor substrate comprising silicon carbide with a gate electrode disposed on a portion of the substrate on a first surface with, a drain electrode disposed on a second surface of the substrate. There is a dielectric layer disposed on the gate electrode and a remedial layer disposed about the dielectric layer, wherein the remedial layer is configured to mitigate negative bias temperature instability maintaining a change in threshold voltage of less than about 1 volt. A source electrode is disposed on the remedial layer, wherein the source electrode is electrically coupled to a contact region of the semiconductor substrate.

摘要翻译： 根据一个实施例，一种半导体器件，其具有半导体衬底，该半导体衬底包括碳化硅，栅极设置在第一表面上的衬底的一部分上，漏电极设置在衬底的第二表面上。 设置在栅电极上的电介质层和围绕电介质层设置的补救层，其中补救层配置成减轻负偏压温度不稳定性，保持阈值电压的变化小于约1伏。 源电极设置在补救层上，其中源极电耦合到半导体衬底的接触区域。

公开(公告)号：US08278711B2

公开(公告)日：2012-10-02

申请号：US12952418

申请日：2010-11-23

申请人： Ramakrishna Rao ,  Stephen Daley Arthur ,  Peter Almern Losee ,  Kevin Dean Matocha

发明人： Ramakrishna Rao ,  Stephen Daley Arthur ,  Peter Almern Losee ,  Kevin Dean Matocha

IPC分类号： H01L29/66

CPC分类号： H01L29/1608 ,  H01L29/0615 ,  H01L29/1095 ,  H01L29/66068 ,  H01L29/66712 ,  H01L29/7802 ,  H01L29/7811

摘要： A substrate having semiconductor material and a surface that supports a gate electrode and defines a surface normal direction is provided. The substrate can include a drift region including a first dopant type. A well region can be disposed adjacent to the drift region and proximal to the surface, and can include a second dopant type. A termination extension region can be disposed adjacent to the well region and extend away from the gate electrode, and can have an effective concentration of second dopant type that is generally less than that in the well region. An adjust region can be disposed between the surface and at least part of the termination extension region. An effective concentration of second dopant type may generally decrease when moving from the termination extension region into the adjust region along the surface normal direction.

摘要翻译： 提供具有半导体材料的基板和支撑栅电极并限定表面法线方向的表面。 衬底可以包括包括第一掺杂剂类型的漂移区域。 阱区域可以布置成与漂移区域相邻并且靠近表面，并且可以包括第二掺杂剂类型。 端接延伸区域可以邻近阱区域设置并且远离栅电极延伸，并且可以具有通常小于阱区域中的第二掺杂剂类型的有效浓度。 可以在表面和终止延伸区域的至少一部分之间设置调整区域。 当从终止延伸区域沿着表面法线方向移动到调整区域中时，第二掺杂剂类型的有效浓度通常可以降低。

公开(公告)号：US20110024765A1

公开(公告)日：2011-02-03

申请号：US12533712

申请日：2009-07-31

申请人： Peter Almern Losee ,  Stephen Daley Arthur ,  Dale Marius Brown ,  Kevin Sean Matocha ,  Ravinuthala Ramakrishna Rao

发明人： Peter Almern Losee ,  Stephen Daley Arthur ,  Dale Marius Brown ,  Kevin Sean Matocha ,  Ravinuthala Ramakrishna Rao

IPC分类号： H01L29/12 ,  H01L21/04 ,  H01L29/78

CPC分类号： H01L29/7828 ,  H01L29/0623 ,  H01L29/0646 ,  H01L29/1608

摘要： There are provided semiconductor structures and devices comprising silicon carbide (SiC) and methods for making the same. The structures and devices comprise a base or shielding layer, channel and surface layer, all desirably formed via ion implantation. As a result, the structures and devices provided herein are hard, “normally off” devices, i.e., exhibiting threshold voltages of greater than about 3 volts.

摘要翻译： 提供了包括碳化硅（SiC）的半导体结构和器件及其制造方法。 结构和器件包括基底或屏蔽层，通道和表面层，所有这些都希望通过离子注入形成。 结果，本文提供的结构和装置是硬的“常关”装置，即呈现大于约3伏特的阈值电压。