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111 条记录 (耗时 0.026 秒)

    Stack structure of semiconductor packages and method for fabricating the stack structure
    32.
    发明申请
    Stack structure of semiconductor packages and method for fabricating the stack structure 有权
    半导体封装的堆叠结构和制造堆叠结构的方法

    公开(公告)号：US20070246811A1

    公开(公告)日：2007-10-25

    申请号：US11732853

    申请日：2007-04-04

    申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

    发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/02 ,  H01L21/00

    CPC分类号： H01L25/105 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/50 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01077 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A stack structure of semiconductor packages and a method for fabricating the stack structure are provided. A plurality of electrical connection pads and dummy pads are formed on a surface of a substrate of an upper semiconductor package and at positions corresponding to those around an encapsulant of a lower semiconductor package. Solder balls are implanted to the electrical connection pads and the dummy pads. The upper semiconductor package is mounted on the lower semiconductor package. The upper semiconductor package is electrically connected to the lower semiconductor package by the solder balls implanted to the electrical connection pads, and the encapsulant of the lower semiconductor package is surrounded and confined by the solder balls implanted to the dummy pads. Thereby, the upper semiconductor package is properly and securely positioned on the lower semiconductor package, without the occurrence of misalignment between the upper and lower semiconductor packages.

    摘要翻译： 提供半导体封装的堆叠结构以及制造叠层结构的方法。 在上半导体封装的衬底的表面上和与下半导体封装的密封剂周围的位置对应的位置处形成多个电连接焊盘和虚拟焊盘。 将焊球植入电连接焊盘和虚拟焊盘。 上半导体封装安装在下半导体封装上。 上半导体封装通过注入电连接焊盘的焊球电连接到下半导体封装，并且下半导体封装的密封剂被植入到虚拟焊盘中的焊球围绕并限制。 因此，上半导体封装被适当且牢固地定位在下半导体封装上，而不会发生上下半导体封装之间的未对准。

    Semiconductor package having heat dissipating device and fabrication method of the semiconductor package
    33.
    发明申请
    Semiconductor package having heat dissipating device and fabrication method of the semiconductor package 有权
    具有散热装置的半导体封装和半导体封装的制造方法

    公开(公告)号：US20070200228A1

    公开(公告)日：2007-08-30

    申请号：US11647832

    申请日：2006-12-29

    申请人： Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    发明人： Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/34

    CPC分类号： H01L23/473 ,  H01L21/563 ,  H01L23/3157 ,  H01L2224/16225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253

    摘要： A semiconductor package with a heat dissipating device and a fabrication method of the semiconductor package are provided. A chip is mounted on a substrate. The heat dissipating device is mounted on the chip, and includes an accommodating room, and a first opening and a second opening that communicate with the accommodating room. An encapsulant is formed between the heat dissipating device and the substrate to encapsulate the chip. A cutting process is performed to remove a non-electrical part of structure and expose the first and second openings from the encapsulant. A cooling fluid is received in the accommodating room to absorb and dissipate heat produced by the chip. The heat dissipating device covers the encapsulant and the chip to provide a maximum heat transfer area for the semiconductor package.

    摘要翻译： 提供了具有散热装置的半导体封装和半导体封装的制造方法。 芯片安装在基板上。 散热装置安装在芯片上，并且包括容纳室，以及与容纳室连通的第一开口和第二开口。 在散热装置和衬底之间形成密封剂以封装芯片。 执行切割处理以去除结构的非电气部分，并使第一和第二开口与密封剂暴露。 冷却流体容纳在容纳室中以吸收和散发由芯片产生的热量。 散热装置覆盖密封剂和芯片，以为半导体封装提供最大的传热面积。

    Semiconductor package with heat sink
    35.
    发明授权
    Semiconductor package with heat sink 有权
    半导体封装带散热片

    公开(公告)号：US07057276B2

    公开(公告)日：2006-06-06

    申请号：US10690921

    申请日：2003-10-21

    申请人： Chang-Fu Lin ,  Han-Ping Pu ,  Chien-Ping Huang

    发明人： Chang-Fu Lin ,  Han-Ping Pu ,  Chien-Ping Huang

    IPC分类号： H01L23/10 ,  H01L23/34

    CPC分类号： H01L23/367 ,  H01L23/3672 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2224/05599

    摘要： A semiconductor package with a heat sink is provided. At least one chip and a heat sink attached to the chip are mounted on a substrate. At least one slot is formed through at least one corner of the heat sink at a position attached to the substrate. An adhesive material is applied between the heat sink and substrate and over filled in the slot with an overflow of the adhesive material out of the slot. The adhesive material over filled in the slot provides an anchoring effect and increases its contact area with the heat sink to thereby firmly secure the heat sink on the substrate. Further, the slot formed at the corner of the heat sink can alleviate thermal stresses accumulated at the corner of the heat sink and thereby prevent delamination between the heat sink and the substrate.

    摘要翻译： 提供了具有散热器的半导体封装。 连接到芯片的至少一个芯片和散热片安装在基板上。 在连接到基板的位置处，通过散热器的至少一个角部形成至少一个槽。 将粘合剂材料施加在散热器和衬底之间并且在填充在槽中并且粘合剂材料溢出出槽之外。 填充在槽中的粘合剂材料提供锚定效果并增加其与散热器的接触面积，从而将散热器牢固地固定在基板上。 此外，形成在散热器角落处的槽可以减轻积聚在散热器拐角处的热应力，从而防止散热器和基板之间的分层。

    Chip carrier for semiconductor chip
    38.
    发明申请
    Chip carrier for semiconductor chip 有权
    半导体芯片芯片载体

    公开(公告)号：US20050040524A1

    公开(公告)日：2005-02-24

    申请号：US10909029

    申请日：2004-07-30

    申请人： Han-Ping Pu ,  Chang-Fu Lin ,  Chien-Ping Huang

    发明人： Han-Ping Pu ,  Chang-Fu Lin ,  Chien-Ping Huang

    IPC分类号： H01L23/498 ,  H01L23/48

    CPC分类号： H01L23/49816 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/01079 ,  H01L2924/15311

    摘要： A chip carrier for a semiconductor chip is provided. A plurality of solder pads for bump soldering are formed on a chip mounting surface of the chip carrier, to allow a flip chip to be mounted and electrically connected to the chip carrier. A solder mask layer is formed on the chip carrier, wherein a plurality of openings are provided in the solder mask layer to expose the solder pads, and an outwardly opening extended portion is formed respectively from the openings corresponding to the solder pads having a relatively narrower pitch therebetween, so as to prevent formation of voids during an underfill process for filing a gap between the flip chip and the chip carrier.

    摘要翻译： 提供了一种用于半导体芯片的芯片载体。 在芯片载体的芯片安装表面上形成用于凸块焊接的多个焊盘，以允许倒装芯片安装并电连接到芯片载体。 在芯片载体上形成焊料掩模层，其中在焊料掩模层中设置多个开口以露出焊盘，并且从对应于具有相对较窄的焊盘的开口分别形成向外开口的延伸部分 间隔，以防止在底部填充过程中形成空隙，以便在倒装芯片和芯片载体之间填充间隙。

    Chip carrier for semiconductor chip
    39.
    发明授权
    Chip carrier for semiconductor chip 有权
    半导体芯片芯片载体

    公开(公告)号：US07102239B2

    公开(公告)日：2006-09-05

    申请号：US10909029

    申请日：2004-07-30

    申请人： Han-Ping Pu ,  Chang-Fu Lin ,  Chien-Ping Huang

    发明人： Han-Ping Pu ,  Chang-Fu Lin ,  Chien-Ping Huang

    IPC分类号： H01L23/48

    CPC分类号： H01L23/49816 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/01079 ,  H01L2924/15311

    摘要： A chip carrier for a semiconductor chip is provided. A plurality of solder pads for bump soldering are formed on a chip mounting surface of the chip carrier, to allow a flip chip to be mounted and electrically connected to the chip carrier. A solder mask layer is formed on the chip carrier, wherein a plurality of openings are provided in the solder mask layer to expose the solder pads, and an outwardly opening extended portion is formed respectively from the openings corresponding to the solder pads having a relatively narrower pitch therebetween, so as to prevent formation of voids during an underfill process for filing a gap between the flip chip and the chip carrier.

    摘要翻译： 提供了一种用于半导体芯片的芯片载体。 在芯片载体的芯片安装表面上形成用于凸块焊接的多个焊盘，以允许倒装芯片安装并电连接到芯片载体。 在芯片载体上形成焊料掩模层，其中在焊料掩模层中设置多个开口以露出焊盘，并且从对应于具有相对较窄的焊盘的开口分别形成向外开口的延伸部分 间隔，以防止在底部填充过程中形成空隙，以便在倒装芯片和芯片载体之间填充间隙。