POLY SILICON HARD MASK
    32.
    发明申请

    公开(公告)号:US20080122107A1

    公开(公告)日:2008-05-29

    申请号:US11534553

    申请日:2006-09-22

    IPC分类号: H01L23/52 H01L21/311

    摘要: A method of forming an opening on a low-k dielectric layer using a polysilicon hard mask rather than a metal hard mask as used in prior art. A polysilicon hard mask is formed over a low-k dielectric layer and a photoresist layer is formed over the polysilicon hard mask. The photoresist layer is patterned and the polysilicon hard mask is etched with a gas plasma to create exposed portions of the low-k dielectric layer. The photoresist layer in stripped prior to the etching of the exposed portions of the low-k dielectric layer to avoid damage to the low-k dielectric layer.

    摘要翻译: 使用现有技术中使用的多晶硅硬掩模而不是金属硬掩模在低k电介质层上形成开口的方法。 在低k电介质层上形成多晶硅硬掩模,并且在多晶硅硬掩模上形成光致抗蚀剂层。 对光致抗蚀剂层进行构图,并用气体等离子体蚀刻多晶硅硬掩模以产生低k电介质层的暴露部分。 在蚀刻低k电介质层的暴露部分之前剥离的光致抗蚀剂层,以避免损坏低k电介质层。

    Protein For Improving Cell-Attachment Efficiency and Use Thereof
    33.
    发明申请
    Protein For Improving Cell-Attachment Efficiency and Use Thereof 审中-公开
    提高细胞附着效率和用途的蛋白质

    公开(公告)号:US20080096275A1

    公开(公告)日:2008-04-24

    申请号:US11552507

    申请日:2006-10-24

    IPC分类号: C07K14/435 C12N5/02

    CPC分类号: C07K14/37

    摘要: The present invention provides a method for improving cell-attachment efficiency comprising (a) preparing a protein in aqueous solution, wherein the protein has a formula A-B-C, wherein A represents a GRGDS amino acid sequence; B represents a cellulose binding domain (CBD); and C represents a GRGDS amino acid sequence, an RGD amino acid sequence, or an amino acid sequence of growth factor; (b) coating the protein solution into a carrier; and (c) seeding cells onto the carrier.

    摘要翻译: 本发明提供了一种改善细胞附着效率的方法,包括(a)在水溶液中制备蛋白质,其中蛋白质具有式A-B-C,其中A表示GRGDS氨基酸序列; B代表纤维素结合结构域(CBD); C代表GRGDS氨基酸序列,RGD氨基酸序列或生长因子的氨基酸序列; (b)将蛋白质溶液涂布到载体中; 和(c)将细胞接种到载体上。

    WEBPHONE VOICE & DATA COMMUNICATIONS INTERFACE UNDER SIP FRAMEWORK
    34.
    发明申请
    WEBPHONE VOICE & DATA COMMUNICATIONS INTERFACE UNDER SIP FRAMEWORK 审中-公开
    在SIP框架下的WEBPHONE语音和数据通信接口

    公开(公告)号:US20080056232A1

    公开(公告)日:2008-03-06

    申请号:US11468611

    申请日:2006-08-30

    IPC分类号: H04L12/66

    摘要: A system and method for allowing a person to place a call to another person under the SIP framework when viewing a display portion on a webpage with only one click of a mouse or one press of a keyboard key and using a stand-alone communication program is provided. The above system includes a client end, a server, a service end, an application program obtained from a server, a user-executable portion accessible at the client end on a webpage, a digital certificate authenticated against a digital signature, an active communication channel established between the client end and the service end, a ready message displayed on the webpage, an active communication session established at the client end and the service end, a session key for session registration, and one or more voice communication devices.

    摘要翻译: 一种系统和方法,用于仅通过鼠标的一次点击或者按下键盘键并使用独立的通信程序来查看网页上的显示部分时,允许人们在SIP框架下向另一个人发起呼叫, 提供。 上述系统包括客户端,服务器,服务端,从服务器获得的应用程序,在网页上的客户端可访问的用户可执行部分,针对数字签名认证的数字证书,活动通信信道 建立在客户端和服务端之间,在网页上显示的就绪消息,在客户端建立的活动通信会话和服务端,用于会话注册的会话密钥以及一个或多个语音通信设备。

    DRAM capacitor structure with increased electrode support for preventing process damage and exposed electrode surface for increasing capacitor area
    36.
    发明授权
    DRAM capacitor structure with increased electrode support for preventing process damage and exposed electrode surface for increasing capacitor area 有权
    DRAM电容器结构具有增加的电极支持,用于防止工艺损坏和暴露的电极表面,以增加电容器面积

    公开(公告)号:US07161204B2

    公开(公告)日:2007-01-09

    申请号:US11098112

    申请日:2005-04-04

    摘要: A method for fabricating a high-density array of crown capacitors with increased capacitance while reducing process damage to the bottom electrodes is achieved. The process is particularly useful for crown capacitors for future DRAM circuits with minimum feature sizes of 0.18 micrometer or less. A conformal conducting layer is deposited over trenches in an interlevel dielectric (ILD) layer, and is polished back to form capacitor bottom electrodes. A novel photoresist mask and etching are then used to pattern the ILD layer to provide a protective interlevel dielectric structure between capacitors. The protective structures prevent damage to the bottom electrodes during subsequent processing. The etching also exposes portions of the outer surface of bottom electrodes for increased capacitance (>50%). In a first embodiment the ILD structure is formed between pairs of adjacent bottom electrodes, and in a second embodiment the ILD structure is formed between four adjacent bottom electrodes.

    摘要翻译: 实现了一种用于制造具有增加的电容的高密度阵列的冠状电容器的方法,同时减少了对底部电极的工艺损伤。 该过程对于具有最小特征尺寸为0.18微米或更小的未来DRAM电路的冠电容器特别有用。 在层间电介质(ILD)层中的沟槽上沉积共形导电层,并将其抛光回形成电容器底部电极。 然后使用新颖的光致抗蚀剂掩模和蚀刻来对ILD层进行图案化,以在电容器之间提供保护层间电介质结构。 保护结构可防止在后续处理期间损坏底部电极。 蚀刻还暴露了底部电极的外表面的部分以增加电容(> 50%)。 在第一实施例中,ILD结构形成在成对的相邻底部电极之间,并且在第二实施例中,ILD结构形成在四个相邻的底部电极之间。

    Surface treatment of metal interconnect lines
    37.
    发明申请
    Surface treatment of metal interconnect lines 有权
    金属互连线的表面处理

    公开(公告)号:US20060001160A1

    公开(公告)日:2006-01-05

    申请号:US11213238

    申请日:2005-08-26

    摘要: Apparatus for forming a semiconductor structure comprising a first layer on top of a substrate wherein the first layer defines conductive regions such as copper interconnect lines and non-conductive regions such as dielectric materials. The conductive regions are covered by a second layer of a material different than the first layer such as for example nickel and then the structure is heat treated such that the interconnect lines and second metal, such as a copper interconnect line and a nickel second layer, interact with each other to form an alloy layer. The alloy layer has superior qualities for adhering to both the copper interconnect lines and a subsequently deposited dielectric material.

    摘要翻译: 用于形成半导体结构的装置,其包括在衬底的顶部上的第一层,其中第一层限定诸如铜互连线和非导电区域(例如介电材料)的导电区域。 导电区域被不同于第一层的材料的第二层(例如镍)覆盖,然后对该结构进行热处理,使得互连线和第二金属(例如铜互连线和镍第二层) 相互作用形成合金层。 合金层具有优异的粘附于铜互连线和随后沉积的电介质材料的品质。

    Surface treatment of metal interconnect lines
    38.
    发明授权
    Surface treatment of metal interconnect lines 有权
    金属互连线的表面处理

    公开(公告)号:US06955984B2

    公开(公告)日:2005-10-18

    申请号:US10439358

    申请日:2003-05-16

    摘要: Methods and apparatus for forming a semiconductor structure comprising a first layer on top of a substrate wherein the first layer defines conductive regions such as copper interconnect lines and non-conductive regions such as dielectric materials. The conductive regions are covered by a second layer of a material different than the first layer such as for example nickel and then the structure is heat treated such that the interconnect lines and second metal, such as a copper interconnect line and a nickel second layer, interact with each other to form an alloy layer. The alloy layer has superior qualities for adhering to both the copper interconnect lines and a subsequently deposited dielectric material.

    摘要翻译: 用于形成半导体结构的方法和装置包括在衬底的顶部上的第一层,其中第一层限定诸如铜互连线和非导电区域(例如介电材料)的导电区域。 导电区域被不同于第一层的材料的第二层(例如镍)覆盖,然后对该结构进行热处理,使得互连线和第二金属(例如铜互连线和镍第二层) 相互作用形成合金层。 合金层具有优异的粘附于铜互连线和随后沉积的电介质材料的品质。

    Variable transmittance phase shifter to compensate for side lobe problem on rim type attenuating phase shifting masks
    40.
    发明授权
    Variable transmittance phase shifter to compensate for side lobe problem on rim type attenuating phase shifting masks 有权
    可变透镜移相器补偿边缘型衰减相移掩模上的旁瓣问题

    公开(公告)号:US06294295B1

    公开(公告)日:2001-09-25

    申请号:US09519612

    申请日:2000-03-06

    IPC分类号: G03F900

    CPC分类号: G03F1/32 G03F1/26 G03F1/29

    摘要: This invention describes an attenuating phase shifting mask, a method of forming the attenuating phase shifting mask, and a method of using the attenuating phase shifting mask to expose a contact hole pattern having both dense and isolated contact holes on a layer of photosensitive dielectric. The mask has a rim of first attenuating phase shifting material, having a first transmittance and providing a phase shift of 180°, surrounding the dense holes and a rim of second attenuating phase shifting material, having a second transmittance and providing a phase shift of 180°, surrounding the isolated holes. The second transmittance is greater than the first transmittance. The dense holes have a duty ratio of less than 2.0 and the isolated holes have a duty ratio of greater than or equal to 2.0. The second attenuating phase shifting material results from treating the first attenuating phase shifting material for a first time with a first solution which increases the transmittance and changes the phase shift. The attenuating phase shifting material is then treated with a second solution for a second time to restore the phase shift to 180° and further increase the transmittance.

    摘要翻译: 本发明描述了衰减相移掩模,形成衰减相移掩模的方法,以及使用衰减相移掩模来曝光在光敏电介质层上具有密集和隔离接触孔的接触孔图案的方法。 掩模具有第一衰减相移材料的边缘,具有第一透射率并且提供180°的相移,围绕致密孔和第二衰减相移材料的边缘,具有第二透射率并提供180°的相移 °,围绕隔离孔。 第二透射率大于第一透射率。 密孔的占空比小于2.0,隔离孔的占空比大于或等于2.0。 第二衰减相移材料是通过用提高透射率并改变相移的第一溶液第一次处理第一衰减相移材料产生的。 然后衰减相移材料用第二溶液处理第二次以将相移恢复到180°并进一步增加透射率。