公开(公告)号：US09663355B2

公开(公告)日：2017-05-30

申请号：US14835001

申请日：2015-08-25

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Heiko Froehlich ,  Mirko Vogt ,  Maik Stegemann

IPC: B32B3/24 ,  B81C1/00 ,  G01N33/487 ,  G01N27/414 ,  G01N27/447 ,  H01L21/306 ,  H01L29/06

CPC classification number: B81C1/00619 ,  B81C1/00047 ,  B81C1/00476 ,  G01N27/414 ,  G01N27/4473 ,  G01N33/48721 ,  H01L21/30604 ,  H01L29/06

Abstract: Embodiments relate to structures, systems and methods for more efficiently and effectively etching sacrificial and other layers in substrates and other structures. In embodiments, a substrate in which a sacrificial layer is to be removed to, e.g., form a cavity comprises an etch dispersion system comprising a trench, channel or other structure in which etch gas or another suitable gas, fluid or substance can flow to penetrate the substrate and remove the sacrificial layer. The trench, channel or other structure can be implemented along with openings or other apertures formed in the substrate, such as proximate one or more edges of the substrate, to even more quickly disperse etch gas or some other substance within the substrate.

公开(公告)号：US09660112B2

公开(公告)日：2017-05-23

申请号：US15227353

申请日：2016-08-03

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch

IPC: H01L31/02 ,  H01L31/00 ,  H01L31/0232 ,  H01L31/0352 ,  H01L31/0236

CPC classification number: H01L31/02327 ,  H01L31/02363 ,  H01L31/0352 ,  Y02E10/50

Abstract: Embodiments relate to buried structures for silicon devices which can alter light paths and thereby form light traps. Embodiments of the lights traps can couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device, which can increase efficiency, improve device timing and provide other advantages appreciated by those skilled in the art.

公开(公告)号：US20170115452A1

公开(公告)日：2017-04-27

申请号：US15390178

申请日：2016-12-23

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch

IPC: G02B6/12 ,  G02B6/122

CPC classification number: G02B6/12002 ,  G02B6/1223 ,  G02B6/136 ,  G02B2006/12061 ,  G02B2006/121 ,  H01L31/02327 ,  H01L31/0547 ,  Y02E10/52

Abstract: Embodiments relate to buried structures for silicon devices which can alter light paths and thereby form light traps. Embodiments of the lights traps can couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device, which can increase efficiency, improve device timing and provide other advantages appreciated by those skilled in the art.

公开(公告)号：US20170089790A1

公开(公告)日：2017-03-30

申请号：US15372992

申请日：2016-12-08

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Heiko Froehlich ,  Mirko Vogt ,  Maik Stegemann ,  Andre Roeth ,  Bernhard Winkler ,  Boris Binder

IPC: G01L9/00

CPC classification number: G01L9/0072 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C1/00158 ,  G01L9/0041 ,  G01L9/0073

Abstract: Embodiments relate to sensors and more particularly to structures for and methods of forming sensors that are easier to manufacture as integrated components and provide improved deflection of a sensor membrane, lamella or other movable element. In embodiments, a sensor comprises a support structure for a lamella, membrane or other movable element. The support structure comprises a plurality of support elements that hold or carry the movable element. The support elements can comprise individual points or feet-like elements, rather than a conventional interconnected frame, that enable improved motion of the movable element, easier removal of a sacrificial layer between the movable element and substrate during manufacture and a more favorable deflection ratio, among other benefits.

公开(公告)号：US09560765B2

公开(公告)日：2017-01-31

申请号：US14098591

申请日：2013-12-06

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt ,  Franz Hirler ,  Anton Mauder ,  Wolfgang Scholz ,  Hans-Joachim Schulze ,  Francisco Javier Santos Rodriguez

IPC: H05K1/18 ,  H05K1/02 ,  H05K3/30 ,  H01L27/12

CPC classification number: H01L27/1207 ,  H01L21/761 ,  H01L21/76283 ,  H01L21/764 ,  H01L21/76895 ,  H01L21/823487 ,  H01L29/7397 ,  H01L29/7813 ,  H05K1/0256 ,  H05K1/0284 ,  H05K1/183 ,  H05K3/30 ,  H05K2201/10522 ,  Y10T29/4913

Abstract: According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to each other; an electrically insulating structure arranged in the first region of the carrier, wherein the second region of the carrier is free of the electrically insulating structure; a first electronic component arranged in the first region of the carrier over the electrically insulating structure; a second electronic component arranged in the second region of the carrier; wherein the electrically insulating structure includes one or more hollow chambers, wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material.

Abstract translation: 根据各种实施例，电子设备可以包括载体，其包括至少第一区域和彼此横向相邻的第二区域; 布置在所述载体的所述第一区域中的电绝缘结构，其中所述载体的所述第二区域没有所述电绝缘结构; 布置在电绝缘结构上的载体的第一区域中的第一电子部件; 布置在所述载体的第二区域中的第二电子部件; 其中所述电绝缘结构包括一个或多个中空室，其中所述一个或多个中空室的侧壁被电绝缘材料覆盖。

公开(公告)号：US09452923B2

公开(公告)日：2016-09-27

申请号：US13722248

申请日：2012-12-20

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Heiko Froehlich ,  Mirko Vogt ,  Maik Stegemann

IPC: H01L41/00 ,  B81C1/00 ,  H01L41/09

CPC classification number: B81C1/00158 ,  B81C1/00476 ,  B81C2203/0145 ,  H01L41/0933

Abstract: A method for manufacturing a micromechanical system includes creating a sacrificial layer at a substrate surface. A structural material is deposited at a sacrificial layer surface and at a support structure for later supporting the structural material. At least one hole is created in the structural material extending from an exposed surface of the structural material to the surface of the sacrificial layer. The at least one hole leads to a margin region of the sacrificial layer. The sacrificial layer is removed using a removal process through the at least one hole, to obtain a cavity between the surface of the substrate and the structural material. The method also includes filling the at least one hole and a portion of the cavity beneath the at least one hole close to the cavity. A corresponding micromechanical system and a microelectromechanical transducer are also described.

Abstract translation: 微机械系统的制造方法包括在基板表面上形成牺牲层。 结构材料沉积在牺牲层表面和支撑结构处，用于稍后支撑结构材料。 在从结构材料的暴露表面延伸到牺牲层的表面的结构材料中产生至少一个孔。 至少一个孔通向牺牲层的边缘区域。 使用通过至少一个孔的去除工艺去除牺牲层，以在基材的表面和结构材料之间获得空腔。 该方法还包括在靠近空腔的至少一个孔的下方填充至少一个孔和空腔的一部分。 还描述了相应的微机械系统和微机电换能器。

公开(公告)号：US20160104625A1

公开(公告)日：2016-04-14

申请号：US14512916

申请日：2014-10-13

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Heiko Fröhlich ,  Mirko Vogt ,  Maik Stegemann ,  Andre Röth ,  Steffen Bieselt

IPC: H01L21/3065 ,  H01L29/84

CPC classification number: B81B7/02 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81B2207/015 ,  B81C1/00246 ,  B81C2203/0764 ,  H01L21/3065 ,  H01L29/84

Abstract: Embodiments relate to integrated circuit sensors, and more particularly to sensors integrated in an integrated circuit structure and methods for producing the sensors. In an embodiment, a sensor device comprises a substrate; a first trench in the substrate; a first moveable element suspended in the first trench by a first plurality of support elements spaced apart from one another and arranged at a perimeter of the first moveable element; and a first layer arranged on the substrate to seal the first trench, thereby providing a first cavity containing the first moveable element and the first plurality of support elements

Abstract translation: 实施例涉及集成电路传感器，更具体地涉及集成在集成电路结构中的传感器和用于产生传感器的方法。 在一个实施例中，传感器装置包括衬底; 衬底中的第一沟槽; 第一可移动元件，其通过彼此间隔开并布置在第一可移动元件的周边的第一多个支撑元件悬挂在第一沟槽中; 以及布置在所述基板上以密封所述第一沟槽的第一层，从而提供包含所述第一可移动元件和所述第一多个支撑元件的第一空腔

公开(公告)号：US09236241B2

公开(公告)日：2016-01-12

申请号：US14269260

申请日：2014-05-05

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt ,  Uwe Rudolph ,  Marco Mueller ,  Boris Binder

IPC: H01L21/302 ,  H01L21/02

CPC classification number: H01L21/02002 ,  H01L21/02005 ,  H01L21/304 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/764 ,  H01L21/7806 ,  Y10T156/1057 ,  Y10T156/11 ,  Y10T428/13

Abstract: According to various embodiments, a method for processing a wafer may include: forming at least one hollow chamber and a support structure within the wafer, the at least one hollow chamber defining a cap region of the carrier located above the at least one hollow chamber and a bottom region of the carrier located below the at least one hollow chamber and an edge region surrounding the cap region of the carrier, wherein a surface area of the cap region is greater than a surface area of the edge region, and wherein the cap region is connected to the bottom region by the support structure; removing the cap region in one piece from the bottom region and the edge region.

Abstract translation: 根据各种实施例，用于处理晶片的方法可以包括：在晶片内形成至少一个中空室和支撑结构，所述至少一个中空室限定位于至少一个中空室上方的载体的盖区域， 位于所述至少一个中空室下方的所述载体的底部区域和围绕所述载体的所述盖区域的边缘区域，其中所述盖区域的表面积大于所述边缘区域的表面积，并且其中所述盖区域 通过支撑结构连接到底部区域; 从底部区域和边缘区域去除一个部分的帽区域。

公开(公告)号：US20140097521A1

公开(公告)日：2014-04-10

申请号：US13648170

申请日：2012-10-09

Applicant: INFINEON TECHNOLOGIES DRESDEN GMBH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt

IPC: H01L29/02 ,  H01L21/26 ,  H01L21/302

CPC classification number: H01L21/764 ,  B81B2203/0315 ,  B81C1/00047 ,  B81C2201/0116 ,  H01L21/3247 ,  H01L21/7624 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/7833

Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.

Abstract translation: 根据本发明的实施例，形成半导体器件的方法包括在衬底内形成第一空腔。 第一空腔设置在基板的一部分下方。 该方法还包括在第一腔内形成第一支柱以支撑衬底的该部分。

公开(公告)号：US11078072B2

公开(公告)日：2021-08-03

申请号：US16861669

申请日：2020-04-29

Applicant: Infineon Technologies Dresden GmbH & Co. KG

Inventor： Thoralf Kautzsch ,  Steffen Bieselt ,  Heiko Froehlich ,  Andre Roeth ,  Maik Stegemann ,  Mirko Vogt

IPC: H01L21/00 ,  B81B7/02 ,  B81B5/00 ,  B81C1/00

Abstract: A method for manufacturing a microelectromechanical systems (MEMS) device, includes forming a cavity in a bulk semiconductor substrate; defining a movably suspended mass in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate to the cavity; arranging a cap structure on the main surface area of the bulk semiconductor substrate; and forming a capacitive structure. Forming the capacitive structure includes arranging a first electrode structure on the movably suspended mass; and providing a second electrode structure at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a direction perpendicular to the main surface area of the bulk semiconductor substrate.