Abstract:
A molding method in which a control plate having a size which is equal to or larger than the width of the outlet port of a supply passage are disposed in a cavity adjacent to the resin supply passage of a mold and thereby, the resin molding can be effected substantially equally at upper and lower sides of the insert comprising a semiconductor device and a lead.
Abstract:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
Abstract:
Apparatus for producing semiconductor devices is provided with mold and lead frame suitable for improving the production efficiency and product quality. Also disclosed is a method of producing semiconductor devices by means of the apparatus. The mold is characterized by the shape of a die and has a plurality of pots for pressure-feeding resin, a flow passage communicating the pots with each other so as to uniformalize the molding pressure applied to the pots even if there are variations in the weights of the resin charged in the pots, and a plurality of cavities disposed in series.
Abstract:
By using a new pretreatment agent consisting essentially of a carboxylic acid-type cation exchange resin fiber or a siliconized glass fiber, the interfering components and the elements of turbidity present in a subject fluid for immunologic pregnancy test can be specifically removed without entailing a substantial loss of human chorionic gonadotropin contained in the subject fluid.
Abstract:
A power module includes a substrate having a surface on which a plurality of wiring patterns are formed, a semiconductor device mounted on the substrate and electrically connected to a part of the plurality of wiring patterns, and a terminal portion with a lead electrically connected to the other part of the plurality of wiring patterns, and is configured that the lead of the terminal portion is formed by laminating a plurality of metal members which contain a material substantially the same as or softer than the material for forming the other part of wiring patterns, and the material of the plurality of metal members, which is the same as or softer than the material for forming the other part of wiring patterns is electrically connected to the other part of wiring patterns through ultrasonic bonding.
Abstract:
A semiconductor device has a substrate with an electronic circuit, a semiconductor element provided at a first surface of the substrate and electrically connected by wire bonding to the electronic circuit, a metallic core layer electrically connected to the semiconductor element. A plurality of conductive bumps provided opposite the first surface of the substrate. A thermal hardenable resin seals at least the semiconductor element, and a metal plate is electrically connected to the metal core layer.
Abstract:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
Abstract:
In a link plate for use in a power transmission chain driven to run while a side edge of the link plate is in sliding contact with a shoe surface a chain guide member, the side edge of the link plate has a pair of contact portions near opposite longitudinal ends thereof for sliding contact with the shoe surface, and a recessed central portion extending between the contact portions. The recessed central portion together with the shoe surface forms a space which is capable of collecting and holding lubricating oil when the contact portions are in sliding contact with the shoe surface. As the link plate slides on the shoe surface, the lubricating oil trapped inside the space gradually enters between the contact portions and the shoe surface to thereby form an oil film. With this oil film, friction between the link plate and the shoe surface is reduced, leading to reduction of running resistance of the power transmission chain.
Abstract:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
Abstract:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.