公开(公告)号：US20090309186A1

公开(公告)日：2009-12-17

申请号：US12519706

申请日：2007-12-25

申请人： Naoya Inoue ,  Ippei Kume ,  Jun Kawahara ,  Yoshihiro Hayashi

发明人： Naoya Inoue ,  Ippei Kume ,  Jun Kawahara ,  Yoshihiro Hayashi

IPC分类号： H01L27/06 ,  H01L21/02

CPC分类号： H01L23/5228 ,  H01L23/5223 ,  H01L23/53238 ,  H01L27/0688 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A semiconductor device is produced by fabricating a capacitor element including a lower electrode, a capacitor insulating film, and an upper electrode, and a thin-film resistor element, in the same step. As the lower electrode of the capacitor element is lined with a lower layer wiring layer (Cu wiring), the lower electrode has extremely low resistance substantially. As such, even if the film thickness of the lower electrode becomes thinner, parasitic resistance does not increased. The resistor element is formed to have the same film thickness as that of the lower electrode of the capacitor element. Since the film thickness of the lower electrode is thin, it works as a resistor having high resistance. In the top layer of the passive element, a passive element cap insulating film is provided, which works as an etching stop layer when etching a contact of the upper electrode of the capacitor element.

摘要翻译： 通过在同一步骤中制造包括下电极，电容器绝缘膜和上电极的电容器元件和薄膜电阻器元件来制造半导体器件。 由于电容器元件的下电极衬有下层布线层（Cu布线），所以下电极具有极低的电阻。 因此，即使下电极的膜厚变薄，寄生电阻也不会增加。 电阻元件形成为具有与电容器元件的下电极相同的膜厚度。 由于下部电极的膜厚薄，所以作为具有高电阻的电阻器。 在无源元件的顶层中，设置无源元件帽绝缘膜，当蚀刻电容器元件的上电极的接触时，其被用作蚀刻停止层。

公开(公告)号：US20090278240A1

公开(公告)日：2009-11-12

申请号：US12453037

申请日：2009-04-28

申请人： Kishou Kaneko ,  Naoya Inoue ,  Yoshihiro Hayashi

发明人： Kishou Kaneko ,  Naoya Inoue ,  Yoshihiro Hayashi

IPC分类号： H01L23/552

CPC分类号： H01L23/552 ,  H01L23/5227 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a semiconductor apparatus that prevents diffusion of materials of a magnetic film during the process for manufacturing the semiconductor apparatus. The semiconductor apparatus includes: a substrate; a semiconductor device formed on a principal surface of the substrate and including an interconnect layer; a magnetic shielding film of a magnetic material covering the semiconductor device; and a buffer film disposed between the semiconductor device and the magnetic shielding film. The buffer film prevents diffusion of the magnetic material of the magnetic shielding film.

摘要翻译： 公开了一种在制造半导体装置的过程中防止磁性膜材料的扩散的半导体装置。 半导体装置包括：基板; 半导体器件，形成在所述衬底的主表面上并且包括互连层; 覆盖半导体器件的磁性材料的磁屏蔽膜; 以及设置在半导体器件和磁屏蔽膜之间的缓冲膜。 缓冲膜防止磁屏蔽膜的磁性材料的扩散。

公开(公告)号：US20070262417A1

公开(公告)日：2007-11-15

申请号：US11745673

申请日：2007-05-08

申请人： Hiroto Ohtake ,  Naoya Inoue ,  Ippei Kume ,  Takeshi Toda ,  Yoshihiro Hayashi

发明人： Hiroto Ohtake ,  Naoya Inoue ,  Ippei Kume ,  Takeshi Toda ,  Yoshihiro Hayashi

IPC分类号： H01L29/00

CPC分类号： H01L23/5223 ,  H01L27/10852 ,  H01L28/40 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device has a capacitive structure formed by sequentially layering, on a wiring or conductive plug, a lower electrode, a capacitive insulation film, and an upper electrode. The semiconductor device has, as the capacitive structure, a thin-film capacitor having a lower electrode structure composed of an amorphous or microcrystalline film or a laminate of these films formed on a polycrystalline film.

摘要翻译： 半导体器件具有通过在布线或导电插塞上依次层叠下电极，电容绝缘膜和上电极形成的电容结构。 半导体器件具有作为电容结构的具有由非晶或微晶膜构成的下电极结构的薄膜电容器或者形成在多晶膜上的这些膜的层压体。

公开(公告)号：US09263399B2

公开(公告)日：2016-02-16

申请号：US14002548

申请日：2012-03-06

申请人： Kishou Kaneko ,  Naoya Inoue ,  Yoshihiro Hayashi

发明人： Kishou Kaneko ,  Naoya Inoue ,  Yoshihiro Hayashi

IPC分类号： H01L23/552 ,  H01L27/02 ,  H01L27/06 ,  H01L27/12 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

CPC分类号： H01L27/0285 ,  H01L23/522 ,  H01L23/5283 ,  H01L23/53295 ,  H01L23/552 ,  H01L27/0255 ,  H01L27/0296 ,  H01L27/0688 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/24 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor substrate on which a semiconductor device is formed; first and second pads; a first insulating film which is formed above the semiconductor substrate; a plurality of wiring lines which are embedded in ditches provided in the first insulating film; a second insulating film provided to cover the first insulating film and the plurality of wiring lines; a semiconductor layer formed on the second insulating film; a source electrode connected with the semiconductor layer; and a drain electrode connected with the semiconductor layer. The plurality of wiring lines includes a gate electrode provided in a position which is opposite to the semiconductor layer. The semiconductor layer, the source electrode, the drain electrode and the gate electrode configure an ESD protection device to discharge a current by ESD surge from the first pad to the second pad.

摘要翻译： 半导体器件包括其上形成半导体器件的半导体衬底; 第一和第二垫; 形成在半导体衬底上的第一绝缘膜; 埋设在第一绝缘膜中的沟槽中的多条布线; 设置为覆盖所述第一绝缘膜和所述多条布线的第二绝缘膜; 形成在所述第二绝缘膜上的半导体层; 与半导体层连接的源电极; 以及与半导体层连接的漏电极。 多个布线包括设置在与半导体层相对的位置的栅电极。 半导体层，源电极，漏电极和栅电极构成ESD保护器件，以通过ESD浪涌从第一焊盘向第二焊盘放电。

公开(公告)号：US09035360B2

公开(公告)日：2015-05-19

申请号：US13610241

申请日：2012-09-11

申请人： Kishou Kaneko ,  Naoya Inoue ,  Yoshihiro Hayashi

发明人： Kishou Kaneko ,  Naoya Inoue ,  Yoshihiro Hayashi

IPC分类号： H01L23/52 ,  H01L27/06 ,  H01L21/822

CPC分类号： H01L27/0688 ,  H01L21/8221 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2924/00011 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/80001 ,  H01L2924/00012

摘要： A semiconductor device includes a logic circuit and an active element circuit. The logic circuit is provided with semiconductor elements formed in a semiconductor substrate. The active element circuit is provided with transistors formed using semiconductor layers formed over a diffusion insulating film formed above a semiconductor substrate. The active element circuit is controlled by the logic circuit.

摘要翻译： 半导体器件包括逻辑电路和有源元件电路。 逻辑电路设置有形成在半导体衬底中的半导体元件。 有源元件电路设置有使用在半导体衬底上形成的扩散绝缘膜上形成的半导体层形成的晶体管。 有源元件电路由逻辑电路控制。

公开(公告)号：US08810000B2

公开(公告)日：2014-08-19

申请号：US12864091

申请日：2009-01-22

申请人： Ippei Kume ,  Naoya Inoue ,  Yoshihiro Hayashi

发明人： Ippei Kume ,  Naoya Inoue ,  Yoshihiro Hayashi

IPC分类号： H01L21/02

CPC分类号： H01L28/60 ,  H01L21/28506 ,  H01L21/31637 ,  H01L21/32053 ,  H01L21/32105 ,  H01L23/5223 ,  H01L23/5283 ,  H01L23/5286 ,  H01L27/0688 ,  H01L28/75 ,  H01L2924/0002 ,  H01L2924/00

摘要： A capacitive element formed within a semiconductor device comprises an upper electrode, a capacitive insulating film containing an oxide and/or silicate of a transition metal element, and a lower electrode having a polycrystalline conductive film composed of a material having higher oxidation resistance than the transition metal element and an amorphous or microcrystalline conductive film formed below the polycrystalline conductive film.

摘要翻译： 形成在半导体器件内的电容元件包括上电极，含有过渡金属元素的氧化物和/或硅酸盐的电容绝缘膜，以及具有多晶导电膜的下电极，所述多晶导体膜由比所述转变 金属元素和形成在多晶导电膜下面的非晶或微晶导电膜。

公开(公告)号：US08390124B2

公开(公告)日：2013-03-05

申请号：US12656728

申请日：2010-02-16

申请人： Naoya Inoue ,  Yoshihiro Hayashi ,  Kishou Kaneko

发明人： Naoya Inoue ,  Yoshihiro Hayashi ,  Kishou Kaneko

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L29/32 ,  H01L29/74 ,  H01L31/111 ,  H01L29/423 ,  H01L29/49

CPC分类号： H01L21/76807 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1633

摘要： Provided is a semiconductor device including a substrate, and a first wiring layer, a second wiring layer, and a switch via formed on the substrate. The first wiring layer has first wiring formed therein and the second wiring layer has second wiring formed therein. The switch via connects the first wiring and the second wiring. The switch via includes at least at its bottom a switch element including a resistance change layer. A resistance value of the resistance change layer changes according to a history of an electric field applied thereto.

摘要翻译： 提供了一种半导体器件，其包括基板，以及形成在基板上的第一布线层，第二布线层和开关通孔。 第一布线层具有形成在其中的第一布线，并且第二布线层具有形成在其中的第二布线。 开关通孔连接第一布线和第二布线。 开关通孔至少在其底部包括包括电阻变化层的开关元件。 电阻变化层的电阻值根据施加到其上的电场的历史而变化。

公开(公告)号：US08227893B2

公开(公告)日：2012-07-24

申请号：US11571084

申请日：2005-06-23

申请人： Naoya Inoue ,  Yoshihiro Hayashi

发明人： Naoya Inoue ,  Yoshihiro Hayashi

IPC分类号： H01L27/08

CPC分类号： H01L23/5223 ,  H01L27/0629 ,  H01L27/11 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： In a capacitor element in which a highly dielectric metal oxide film formed between wiring layers is used as a capacitor insulation film, the diffusion and thermal oxidation of a lower-layer wiring material are reduced, and the surface on which a thin capacitor insulation film that constitutes a capacitor element is formed is kept flat. A lower electrode (111b) having the ability to prevent diffusion of the wiring material is embedded and formed so as to be in direct contact with a lower-layer wiring (105) in a prescribed area of a wiring cap film (103), and the surface on which the capacitor insulation film is formed is flat. The wiring cap film functions to prevent diffusion and oxidation of the wiring material formed on a wiring disposed in a lower layer of the capacitor element.

摘要翻译： 在使用在布线层之间形成的高介电金属氧化物膜作为电容绝缘膜的电容器元件中，下层布线材料的扩散和热氧化被降低，并且薄电容绝缘膜的表面 构成电容器元件形成时保持平坦。 具有防止布线材料扩散的能力的下电极（111b）嵌入并形成为与布线帽膜（103）的规定区域中的下层布线（105）直接接触，并且 形成电容器绝缘膜的表面是平坦的。 布线帽膜用于防止形成在布置在电容器元件的下层中的布线上的布线材料的扩散和氧化。

公开(公告)号：US6146906A

公开(公告)日：2000-11-14

申请号：US397199

申请日：1999-09-16

申请人： Naoya Inoue ,  Yoshihiro Hayashi

发明人： Naoya Inoue ,  Yoshihiro Hayashi

IPC分类号： H01L27/10 ,  C23C14/00 ,  C23C14/08 ,  H01L21/02 ,  H01L21/203 ,  H01L21/285 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L21/00 ,  H01L21/44

CPC分类号： H01L28/60 ,  C23C14/0084 ,  C23C14/08 ,  H01L28/55

摘要： In a method for manufacturing a capacitor including a lower electrode, a ferroelectric layer formed on the lower electrode, and an upper electrode formed on the ferroelectric layer, at least one of the lower and upper electrodes is made of laminated metal and conductive oxide. The laminated metal and conductive oxide are deposited by a DC magnetron reactive sputtering process using one metal target and mixture gas including oxygen wherein a ratio of oxygen in the mixture gas and a substrate temperature are definite and a DC input power is changed depending on the metal and the conductive oxide.

摘要翻译： 在制造包括下电极的电容器，形成在下电极上的铁电层和形成在铁电层上的上电极的电容器的制造方法中，下电极和上电极中的至少一个由层压金属和导电氧化物制成。 层叠金属和导电氧化物通过DC磁控管反应溅射工艺使用一种金属靶和包括氧的混合气体沉积，其中混合气体中的氧气比与衬底温度是一定的，并且DC输入功率根据金属而变化 和导电氧化物。

公开(公告)号：US08937023B2

公开(公告)日：2015-01-20

申请号：US13363638

申请日：2012-02-01

申请人： Fuminori Ito ,  Yoshihiro Hayashi

发明人： Fuminori Ito ,  Yoshihiro Hayashi

IPC分类号： H01L23/48 ,  H01L21/316 ,  C23C16/40 ,  C23C18/12 ,  C23C18/14 ,  H01L21/02

CPC分类号： H01L21/31695 ,  C23C16/401 ,  C23C18/1212 ,  C23C18/122 ,  C23C18/14 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/02362

摘要： A method includes forming an insulating film over a substrate by introducing a cyclic siloxane compound having a cyclic siloxane as a skeleton and having at least one volatile hydrocarbon group bonded to a side chain, and a silicon-containing compound into a plasma, and converting the insulating film to a porous insulating film by adding energy to the insulating film. The silicon-containing compound is decomposed using less energy as compared with the skeleton of the cyclic siloxane compound, the volatile hydrocarbon group, and the bond between the cyclic siloxane compound and the volatile hydrocarbon group.

摘要翻译： 一种方法包括通过引入具有环状硅氧烷作为骨架并具有至少一个与侧链结合的挥发性烃基的环状硅氧烷化合物，将含硅化合物引入等离子体中，在基板上形成绝缘膜， 通过向绝缘膜添加能量将绝缘膜与多孔绝缘膜接合。 与环状硅氧烷化合物，挥发性烃基，环状硅氧烷化合物和挥发性烃基的键相比，含硅化合物的分解能力较少。