公开(公告)号：US20180230614A1

公开(公告)日：2018-08-16

申请号：US15894233

申请日：2018-02-12

Applicant: Microfabrica Inc.

Inventor： Gregory P. Schmitz ,  Michael S. Lockard ,  Ming-Ting Wu ,  Eric C. Miller ,  Adam L. Cohen

IPC: C25D1/00 ,  B32B15/01 ,  C25D5/02 ,  C25D5/48 ,  B33Y70/00 ,  B33Y10/00 ,  B33Y80/00 ,  B33Y40/00

CPC classification number: C25D1/003 ,  B32B15/01 ,  B33Y10/00 ,  B33Y40/00 ,  B33Y70/00 ,  B33Y80/00 ,  C25D1/08 ,  C25D5/022 ,  C25D5/48 ,  C25D7/005

Abstract: A counterfeiting deterrent device according to one implementation of the disclosure includes a plurality of layers formed by an additive process. Each of the layers may have a thickness of less than 100 microns. At least one of the layers has a series of indentations formed in an outer edge of the layer such that the indentations can be observed to verify that the device originated from a predetermined source. According to another implementation, a counterfeiting deterrent device includes at least one raised layer having outer edges in the shape of a logo. A light source is configured and arranged to shine a light through a slit in a substrate layer of the device and past an intermediate layer to light up the outer edge of the raised layer. The layers of the device are formed by an additive process and have a thickness of less than 100 microns each.

公开(公告)号：US09714473B2

公开(公告)日：2017-07-25

申请号：US14191061

申请日：2014-02-26

Applicant: Microfabrica Inc.

Inventor： Uri Frodis ,  Adam L. Cohen ,  Michael S. Lockard

IPC: C25D5/02 ,  C25D5/10 ,  C25D5/48 ,  B33Y10/00 ,  B81C1/00 ,  B81C99/00 ,  C25D1/00 ,  C25D21/12 ,  H01L21/288 ,  H01L21/768

CPC classification number: C25D5/48 ,  B33Y10/00 ,  B81C1/00492 ,  B81C99/0065 ,  B81C2201/0104 ,  B81C2201/0197 ,  C25D1/00 ,  C25D1/003 ,  C25D5/022 ,  C25D5/10 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76885 ,  Y10T156/1052

Abstract: Some embodiments of the present invention provide processes and apparatus for electrochemically fabricating multilayer structures (e.g. mesoscale or microscale structures) with improved endpoint detection and parallelism maintenance for materials (e.g. layers) that are planarized during the electrochemical fabrication process. Some methods involve the use of a fixture during planarization that ensures that planarized planes of material are parallel to other deposited planes within a given tolerance. Some methods involve the use of an endpoint detection fixture that ensures precise heights of deposited materials relative to an initial surface of a substrate, relative to a first deposited layer, or relative to some other layer formed during the fabrication process. In some embodiments planarization may occur via lapping while other embodiments may use a diamond fly cutting machine.

公开(公告)号：US09620834B2

公开(公告)日：2017-04-11

申请号：US14194592

申请日：2014-02-28

Applicant: Microfabrica Inc.

Inventor： Elliott R. Brown ,  John D. Evans ,  Christopher A. Bang ,  Adam L. Cohen ,  Michael S. Lockard ,  Dennis R. Smalley ,  Morton Grosser

IPC: H01P3/00 ,  H01P1/202 ,  G01P15/08 ,  G01P15/125 ,  H01P3/06 ,  H01P5/18 ,  H01P11/00 ,  C25D1/00 ,  H05K3/46

CPC classification number: H01P1/202 ,  B33Y10/00 ,  B33Y70/00 ,  B81B2201/042 ,  C25D1/003 ,  G01P15/0802 ,  G01P15/125 ,  H01P3/06 ,  H01P5/183 ,  H01P11/00 ,  H01P11/005 ,  H01P11/007 ,  H05K3/4647 ,  Y10T29/49002 ,  Y10T29/49016 ,  Y10T29/49018

Abstract: Multi-layer, multi-material fabrication methods include depositing at least one structural material and at least one sacrificial material during the formation of each of a plurality of layers wherein deposited materials for each layer are planarized to set a boundary level for the respective layer and wherein during formation of at least one layer at least three materials are deposited with a planarization operation occurring before deposition of the last material to set a planarization level above the layer boundary level and wherein a planarization occurs after deposition of the last material level above the layer boundary level and wherein a planarization occurs after deposition of the last material whereby the boundary level for the layer is set. Some formation processes use electrochemical fabrication techniques (e.g. including selective depositions, bulk depositions, etching operations and planarization operations) and post-deposition processes (e.g. selective etching operations and/or back filling operations).

公开(公告)号：US09567682B2

公开(公告)日：2017-02-14

申请号：US15076490

申请日：2016-03-21

Applicant: Microfabrica Inc.

Inventor： Gregory P. Schmitz ,  Michael S. Lockard ,  Ming-Ting Wu ,  Eric C. Miller ,  Adam L. Cohen

IPC: G07F19/00 ,  C25D1/00 ,  B32B15/01 ,  C25D5/02 ,  C25D5/48 ,  B33Y10/00 ,  B33Y40/00 ,  B33Y70/00 ,  B33Y80/00

CPC classification number: C25D1/003 ,  B32B15/01 ,  B33Y10/00 ,  B33Y40/00 ,  B33Y70/00 ,  B33Y80/00 ,  C25D1/08 ,  C25D5/022 ,  C25D5/48 ,  C25D7/005

Abstract: A counterfeiting deterrent device according to one implementation of the disclosure includes a plurality of layers formed by an additive process. Each of the layers may have a thickness of less than 100 microns. At least one of the layers has a series of indentations formed in an outer edge of the layer such that the indentations can be observed to verify that the device originated from a predetermined source. According to another implementation, a counterfeiting deterrent device includes at least one raised layer having outer edges in the shape of a logo. A light source is configured and arranged to shine a light through a slit in a substrate layer of the device and past an intermediate layer to light up the outer edge of the raised layer. The layers of the device are formed by an additive process and have a thickness of less than 100 microns each.

Abstract translation: 根据本公开的一个实施方式的防伪装置包括通过添加过程形成的多个层。 每个层可以具有小于100微米的厚度。 层中的至少一个具有形成在层的外边缘中的一系列凹痕，使得可以观察到凹痕以验证装置源自预定源。 根据另一个实施方案，一种防伪装置包括至少一个具有标志形状的外边缘的凸起层。 光源被配置和布置成将光照射穿过设备的基底层中的狭缝并且经过中间层以照亮凸起层的外边缘。 装置的层通过添加工艺形成，并且具有小于每个100微米的厚度。

公开(公告)号：US20140326607A1

公开(公告)日：2014-11-06

申请号：US14203409

申请日：2014-03-10

Applicant: Microfabrica Inc.

Inventor： Adam L. Cohen ,  Jill R. Thomassian ,  Michael S. Lockard ,  Marvin M. Kilgo, III ,  Uri Frodis ,  Dennis R. Smalley

IPC: C25D5/02

CPC classification number: C25D1/003 ,  C25D1/00 ,  C25D1/20 ,  C25D5/02 ,  C25D5/022 ,  C25D5/10 ,  C25D5/14 ,  C25D5/48 ,  C25D5/50

Abstract: Numerous electrochemical fabrication methods and apparatus are provided for producing multi-layer structures (e.g. having meso-scale or micro-scale features) from a plurality of layers of deposited materials using adhered masks (e.g. formed from liquid photoresist or dry film), where two or more materials may be provided per layer where at least one of the materials is a structural material and one or more of any other materials may be a sacrificial material which will be removed after formation of the structure. Materials may comprise conductive materials that are electrodeposited or deposited in an electroless manner. In some embodiments special care is undertaken to ensure alignment between patterns formed on successive layers.

Abstract translation: 提供了多种电化学制造方法和装置，用于使用粘附的掩模（例如由液体光致抗蚀剂或干膜形成）从多层沉积材料制备多层结构（例如具有中尺度或微尺度特征），其中两个 或者可以在每层中提供更多的材料，其中至少一种材料是结构材料，并且任何其它材料中的一种或多种可以是在形成结构之后被去除的牺牲材料。 材料可以包括以无电解方式电沉积或沉积的导电材料。 在一些实施例中，特别注意确保在连续层上形成的图案之间的对准。

公开(公告)号：US20140231263A1

公开(公告)日：2014-08-21

申请号：US14191061

申请日：2014-02-26

Applicant: MICROFABRICA INC.

Inventor： Uri Frodis ,  Adam L. Cohen ,  Michael S. Lockard

IPC: C25D5/48

CPC classification number: C25D5/48 ,  B33Y10/00 ,  B81C1/00492 ,  B81C99/0065 ,  B81C2201/0104 ,  B81C2201/0197 ,  C25D1/00 ,  C25D1/003 ,  C25D5/022 ,  C25D5/10 ,  C25D21/12 ,  H01L21/2885 ,  H01L21/76885 ,  Y10T156/1052

Abstract: Some embodiments of the present invention provide processes and apparatus for electrochemically fabricating multilayer structures (e.g. mesoscale or microscale structures) with improved endpoint detection and parallelism maintenance for materials (e.g. layers) that are planarized during the electrochemical fabrication process. Some methods involve the use of a fixture during planarization that ensures that planarized planes of material are parallel to other deposited planes within a given tolerance. Some methods involve the use of an endpoint detection fixture that ensures precise heights of deposited materials relative to an initial surface of a substrate, relative to a first deposited layer, or relative to some other layer formed during the fabrication process. In some embodiments planarization may occur via lapping while other embodiments may use a diamond fly cutting machine.

Abstract translation: 本发明的一些实施例提供了用于电化学制造多层结构（例如中尺度或微结构）的方法和装置，其具有改进的端点检测和用于在电化学制造过程中被平坦化的材料（例如层）的并行维护。 一些方法涉及在平坦化期间使用夹具，其确保材料的平面化平面平行于给定公差内的其它沉积平面。 一些方法涉及使用端点检测夹具，其相对于第一沉积层或相对于在制造过程期间形成的一些其它层，相对于衬底的初始表面确保沉积材料的精确高度。 在一些实施例中，平面化可以通过研磨发生，而其他实施例可以使用金刚石切片机。

公开(公告)号：US20210172080A1

公开(公告)日：2021-06-10

申请号：US17069165

申请日：2020-10-13

Applicant: Microfabrica Inc.

Inventor： Gregory P. Schmitz ,  Michael S. Lockard ,  Ming-Ting Wu ,  Eric C. Miller ,  Adam L. Cohen

IPC: C25D1/00 ,  C25D5/02 ,  C25D1/08 ,  C25D5/48 ,  B32B15/01 ,  B33Y80/00 ,  B33Y10/00 ,  B33Y40/00 ,  B33Y70/00 ,  C25D7/00

Abstract: A counterfeiting deterrent device according to one implementation of the disclosure includes a plurality of layers formed by an additive process. Each of the layers may have a thickness of less than 100 microns. At least one of the layers has a series of indentations formed in an outer edge of the layer such that the indentations can be observed to verify that the device originated from a predetermined source. According to another implementation, a counterfeiting deterrent device includes at least one raised layer having outer edges in the shape of a logo. A light source is configured and arranged to shine a light through a slit in a substrate layer of the device and past an intermediate layer to light up the outer edge of the raised layer. The layers of the device are formed by an additive process and have a thickness of less than 100 microns each.

公开(公告)号：US10939934B2

公开(公告)日：2021-03-09

申请号：US15718734

申请日：2017-09-28

Applicant: Microfabrica Inc.

Inventor： Michael S. Lockard ,  Uri Frodis ,  Adam L. Cohen ,  Richard T. Chen ,  Gregory P. Schmitz ,  Eric C. Miller ,  Ming Ting Wu ,  Arun S. Veeramani ,  Juan Diego Perea

IPC: A61B17/3205 ,  A61B17/14 ,  A61B17/32 ,  A61B17/16 ,  A61B17/3207 ,  A61B17/221 ,  A61B10/02 ,  B33Y80/00 ,  A61B90/00 ,  F16H55/18 ,  F16H55/06 ,  A61B17/00 ,  A61B17/29 ,  F16H55/56

Abstract: The present disclosure relates generally to the field of tissue removal and more particularly to methods and devices for use in medical applications involving selective tissue removal. One exemplary method includes the steps of providing a tissue cutting instrument capable of distinguishing between target tissue to be removed and non-target tissue, urging the instrument against the target tissue and the non-target tissue, and allowing the instrument to cut the target tissue while automatically avoiding cutting of non-target tissue. Various tools for carrying out this method are also described.

公开(公告)号：US20190017189A1

公开(公告)日：2019-01-17

申请号：US16118267

申请日：2018-08-30

Applicant: Microfabrica Inc.

Inventor： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

IPC: C25D5/02 ,  C23C18/16 ,  C25D1/00 ,  B81C1/00

CPC classification number: C25D5/022 ,  B81C1/00126 ,  B81C2201/0109 ,  B81C2201/019 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  Y10T156/11 ,  Y10T156/19

Abstract: Some embodiments are directed to techniques for building single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while others use an intervening adhesion layer material. Some embodiments use different seed layer and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while others apply the materials in blanket fashion. Some embodiments remove extraneous material via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

公开(公告)号：US09597834B2

公开(公告)日：2017-03-21

申请号：US14194214

申请日：2014-02-28

Applicant: Microfabrica Inc.

Inventor： Adam L. Cohen ,  Vacit Arat ,  Michael S. Lockard ,  Dennis R. Smalley

IPC: C25D5/02 ,  C25D5/48 ,  B29C65/56

CPC classification number: B29C65/56 ,  B33Y10/00 ,  C25D5/02 ,  Y10T29/49885

Abstract: Forming multi-layer 3D structures involving the joining of at least two structural elements, at least one of which is formed as a multi-layer 3D structure, wherein the joining occurs via one of: (1) elastic deformation and elastic recovery, (2) relative deformation of an initial portion of at least one element relative to another portion of the at least one element until the at least two elements are in a desired retention position after which the deformation is reduced or eliminated, or (3) moving a retention region of one element into the retention region of the other element, without deformation of either element, along a path including a loading region of the other element and wherein during normal use the first and second elements are configured relative to one another so that the loading region of the second element is not accessible to the retention region of the first element.