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    Semiconductor device having an improved structure for high withstand voltage
    32.
    发明授权
    Semiconductor device having an improved structure for high withstand voltage 失效
    具有改进的高耐压结构的半导体器件

    公开(公告)号：US07772669B2

    公开(公告)日：2010-08-10

    申请号：US11540625

    申请日：2006-10-02

    申请人： Shigeo Tooi ,  Tetsujiro Tsunoda

    发明人： Shigeo Tooi ,  Tetsujiro Tsunoda

    IPC分类号： H01L29/93

    CPC分类号： H01L29/7395 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0834 ,  H01L29/402

    摘要： Second diffusion layers to be guard rings of a second conductivity type are formed on the major surface of a semiconductor substrate of a first conductivity type in a guard ring region. An insulating film is formed on these second diffusion layers. The semiconductor device has a structure wherein a conductive film is formed on the insulating film between adjacent electrodes among a first surface electrode, second surface electrodes, and a third surface electrode.

    摘要翻译： 在保护环区域中的第一导电类型的半导体衬底的主表面上形成第二导电类型的保护环的第二扩散层。 在这些第二扩散层上形成绝缘膜。 半导体器件具有其中在第一表面电极，第二表面电极和第三表面电极中的相邻电极之间的绝缘膜上形成导电膜的结构。

    INSULATED GATE TRANSISTOR
    33.
    发明申请
    INSULATED GATE TRANSISTOR 失效
    绝缘栅晶体管

    公开(公告)号：US20080224207A1

    公开(公告)日：2008-09-18

    申请号：US11843301

    申请日：2007-08-22

    申请人： Shunsuke SAKAMOTO ,  Eisuke Suekawa ,  Tetsujiro Tsunoda

    发明人： Shunsuke SAKAMOTO ,  Eisuke Suekawa ,  Tetsujiro Tsunoda

    IPC分类号： H01L29/94

    CPC分类号： H01L29/7397 ,  H01L29/0696 ,  H01L29/0834

    摘要： A charge storage layer of first conductive type is formed on the first principal surface of a semiconductor substrate. A base layer of second conductive type is formed on the charge storage layer. Each trench formed through the base layer and the charge storage layer is lined with an insulating film and filled with a trench gate electrode. Dummy trenches are formed on both sides of each trench. Source layers of first conductive type are selectively formed in the surface of the base layer and in contact with the sidewalls of the trenches. The source layers are spaced apart from each other and arranged in the longitudinal direction of the trenches. A contact layer of second conductive type is formed in the surface of the base layer and between each two adjacent source layers arranged in the longitudinal direction of the trenches. A collector layer of second conductive type is formed on the second principal surface of the semiconductor substrate.

    摘要翻译： 在半导体衬底的第一主表面上形成第一导电类型的电荷存储层。 在电荷存储层上形成第二导电类型的基极层。 通过基底层和电荷存储层形成的每个沟槽衬有绝缘膜并填充有沟槽栅电极。 在每个沟槽的两侧形成有虚拟的沟槽。 第一导电类型的源极层选择性地形成在基底层的表面中并且与沟槽的侧壁接触。 源层彼此间隔开并且沿着沟槽的纵向方向布置。 第二导电类型的接触层形成在基底层的表面和沿着沟槽的纵向方向布置的每个两个相邻的源层之间。 第二导电类型的集电极层形成在半导体衬底的第二主表面上。

    Semiconductor device having an improved structure for high withstand voltage
    34.
    发明申请
    Semiconductor device having an improved structure for high withstand voltage 失效
    具有改进的高耐压结构的半导体器件

    公开(公告)号：US20070278672A1

    公开(公告)日：2007-12-06

    申请号：US11540625

    申请日：2006-10-02

    申请人： Shigeo Tooi ,  Tetsujiro Tsunoda

    发明人： Shigeo Tooi ,  Tetsujiro Tsunoda

    IPC分类号： H01L21/44

    CPC分类号： H01L29/7395 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0834 ,  H01L29/402

    摘要： Second diffusion layers to be guard rings of a second conductivity type are formed on the major surface of a semiconductor substrate of a first conductivity type in a guard ring region. An insulating film is formed on these second diffusion layers. The semiconductor device has a structure wherein a conductive film is formed on the insulating film between adjacent electrodes among a first surface electrode, second surface electrodes, and a third surface electrode.

    摘要翻译： 在保护环区域中的第一导电类型的半导体衬底的主表面上形成第二导电类型的保护环的第二扩散层。 在这些第二扩散层上形成绝缘膜。 半导体器件具有其中在第一表面电极，第二表面电极和第三表面电极中的相邻电极之间的绝缘膜上形成导电膜的结构。

    Manufacturing method of semiconductor device
    38.
    发明授权
    Manufacturing method of semiconductor device 有权
    半导体器件的制造方法

    公开(公告)号：US06346464B1

    公开(公告)日：2002-02-12

    申请号：US09604100

    申请日：2000-06-27

    申请人： Toru Takeda ,  Tetsujiro Tsunoda

    发明人： Toru Takeda ,  Tetsujiro Tsunoda

    IPC分类号： H01L21425

    CPC分类号： H01L29/7802 ,  H01L21/261 ,  H01L21/266 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/66712

    摘要： A method of manufacturing a low power dissipation semiconductor power device is provided which is easy to perform and suitable for mass production. When a first and second conductivity-type regions are formed on a semiconductor substrate which is selectively irradiated by impurity ions, an excellent super junction is formed by controlling the ion acceleration energy and the width of each irradiated region so that the first and second conductivity-type regions may have a uniform impurity distribution and a uniform width along the direction of irradiation. Another method of manufacturing a low power dissipation semiconductor power device having an excellent super junction is provided which selectively irradiates a collimated neutron beam onto a P+ silicon ingot and forms an N+ region that has a uniform impurity distribution and a uniform width along the direction of irradiation in the P+ silicon ingot.

    摘要翻译： 提供了一种制造低功耗半导体功率器件的方法，其易于执行并且适于批量生产。 当在由杂质离子选择性照射的半导体衬底上形成第一和第二导电类型区域时，通过控制每个照射区域的离子加速能量和宽度来形成优异的超结，使得第一和第二导电型区域， 类型区域可以沿着照射方向具有均匀的杂质分布和均匀的宽度。 提供制造具有优异超结的低功耗半导体功率器件的另一种方法，其选择性地将准直的中子束照射到P +硅锭上，并形成沿着照射方向具有均匀杂质分布和均匀宽度的N +区 在P +硅锭中。

    Method of manufacturing a semiconductor device of an anode short circuit structure
    39.
    发明授权
    Method of manufacturing a semiconductor device of an anode short circuit structure 失效
    制造阳极短路结构的半导体器件的方法

    公开(公告)号：US5286655A

    公开(公告)日：1994-02-15

    申请号：US74618

    申请日：1993-06-11

    申请人： Tetsujiro Tsunoda

    发明人： Tetsujiro Tsunoda

    IPC分类号： H01L29/74 ,  H01L21/331 ,  H01L21/332 ,  H01L29/08 ,  H01L29/739 ,  H01L29/749 ,  H01L29/78

    CPC分类号： H01L29/66333 ,  H01L29/0834 ,  H01L29/66378 ,  Y10S148/126 ,  Y10S438/928

    摘要： The present invention provides a method of manufacturing a semiconductor device, comprising the steps of selectively diffusing an impurity of a first conductivity type and another impurity of a second conductivity type into a main surface region of a semiconductor substrate so as to form first semiconductor regions of the first conductivity type and second semiconductor regions of the second conductivity type, forming a first semiconductor layer of the second conductivity type on the semiconductor substrate, said first semiconductor layer being of at least a single layer structure, forming element regions of the first and second conductivity types by thermal diffusion of impurities into the first semiconductor layer, and polishing the opposite main surface of the semiconductor substrate to expose the first semiconductor regions of the first conductivity type and the second semiconductor regions of the second conductivity type. The first semiconductor layer may be of a laminate structure consisting of a plurality of semiconductor layers differing from each other in the impurity concentration.

    摘要翻译： 本发明提供一种制造半导体器件的方法，包括以下步骤：将第一导电类型的杂质和另一种导电类型的另一种杂质选择性地扩散到半导体衬底的主表面区域中，以形成半导体衬底的第一半导体区域 第二导电类型的第一导电类型和第二半导体区域，在半导体衬底上形成第二导电类型的第一半导体层，所述第一半导体层至少具有单层结构，形成第一和第二导电类型的元件区域 通过将杂质热扩散到第一半导体层中的导电类型，以及研磨半导体衬底的相对的主表面以暴露第一导电类型的第一半导体区域和第二导电类型的第二半导体区域。 第一半导体层可以是由杂质浓度彼此不同的多个半导体层组成的层叠结构。

    Method of manufacturing a semiconductor device by forming at least three regions of different lifetimes of carriers at different depths
    40.
    发明授权
    Method of manufacturing a semiconductor device by forming at least three regions of different lifetimes of carriers at different depths 失效
    通过在不同深度形成载体的不同寿命的至少三个区域来制造半导体器件的方法

    公开(公告)号：US5250446A

    公开(公告)日：1993-10-05

    申请号：US959465

    申请日：1992-10-09

    申请人： Akihiko Osawa ,  Yoshiro Baba ,  Mitsuhiko Kitagawa ,  Tetsujiro Tsunoda

    发明人： Akihiko Osawa ,  Yoshiro Baba ,  Mitsuhiko Kitagawa ,  Tetsujiro Tsunoda

    IPC分类号： H01L21/322 ,  H01L21/265 ,  H01L29/32

    CPC分类号： H01L21/263 ,  H01L21/26506 ,  H01L29/32 ,  Y10S148/128

    摘要： A mixture of at least two types of charged particles of ions having the same value obtained by dividing the electric charge of an ion by the mass of the ion, i.e., a mixture of charged particles including hydrogen molecular ions H.sub.2.sup.+ and deuterium ions D.sup.+, is accelerated in a charged particle accelerator. Since the mass spectrograph unit in the accelerator cannot divide the hydrogen molecular ions H.sub.2.sup.+ and the deuterium ion D.sup.+, both ions are accelerated together. When the hydrogen molecular ion H.sub.2.sup.+ collides against a silicon substrate, it is divided into two hydrogen ions 2H.sup.+. Since the hydrogen ion H.sup.+ and the deuterium ion D.sup.+ have different ranges in silicon, two regions including a great number of crystal defects are formed in the silicon substrate in one ion irradiating step. As a result, at least three regions of different lifetimes of carriers are formed at different depths of the semiconductor substrate.

    摘要翻译： 将离子电荷除以离子质量，即包含氢分子离子H 2 +和氘离子D +的带电粒子的混合物获得的具有相同值的至少两种类型的带电粒子的混合物是 在带电粒子加速器中加速。 由于加速器中的质谱仪单元不能分离氢分子离子H2 +和氘离子D +，所以两个离子一起被加速。 当氢分子离子H2 +碰撞硅衬底时，它被分为两个氢离子2H +。 由于氢离子H +和氘离子D +在硅中具有不同的范围，因此在一个离子照射步骤中在硅衬底中形成包括大量晶体缺陷的两个区域。 结果，在半导体衬底的不同深度形成载流子寿命不同的至少三个区域。