Gas distribution plate electrode for a plasma reactor
    31.
    发明授权
    Gas distribution plate electrode for a plasma reactor 有权
    用于等离子体反应器的气体分布板电极

    公开(公告)号:US06586886B1

    公开(公告)日:2003-07-01

    申请号:US10027732

    申请日:2001-12-19

    IPC分类号: H01J724

    CPC分类号: H01J37/3244

    摘要: The invention is embodied in a plasma reactor for processing a semiconductor wafer, the reactor having a gas distribution plate including a front plate in the chamber and a back plate on an external side of the front plate, the gas distribution plate comprising a gas manifold adjacent the back plate, the back and front plates bonded together and forming an assembly. The assembly includes an array of holes through the front plate and communicating with the chamber, at least one gas flow-controlling orifice through the back plate and communicating between the manifold and at least one of the holes, the orifice having a diameter that determines gas flow rate to the at least one hole. In addition, an array of pucks is at least generally congruent with the array of holes and disposed within respective ones of the holes to define annular gas passages for gas flow through the front plate into the chamber, each of the annular gas passages being non-aligned with the orifice.

    摘要翻译: 本发明体现在用于处理半导体晶片的等离子体反应器中,该反应器具有气体分配板,该气体分配板包括在该腔室中的前板和在前板的外侧上的后板,该气体分配板包括邻近的气体歧管 背板,后板和前板结合在一起并形成组件。 组件包括穿过前板并与腔室连通的孔阵列,至少一个通过后板的气体流量控制孔,并在歧管和至少一个孔之间连通,孔口具有确定气体的直径 至少一个孔的流速。 此外,一组圆盘至少大体上与孔阵列一致,并且设置在孔的相应孔内,以限定用于气体流过前板进入腔室的环形气体通道,每个环形气体通道是非限制性的, 与孔对齐。

    High density plasma process chamber
    33.
    发明授权
    High density plasma process chamber 失效
    高密度等离子体处理室

    公开(公告)号:US6095084A

    公开(公告)日:2000-08-01

    申请号:US893599

    申请日:1997-07-14

    IPC分类号: C23C16/00

    CPC分类号: C23C16/00

    摘要: A process chamber 55 for processing a semiconductor substrate 60 in a plasma, comprises a process gas distributor 100 for distributing process gas into a plasma zone 65 in the chamber. An inductor antenna 135 is used to form an inductive plasma from the process gas in the plasma zone. A primary bias electrode 145 on a ceiling 140 of the chamber 55 has a conducting surface 150 exposed to the plasma zone 65. A dielectric member 155 comprising a power electrode 165 embedded therein, has a receiving surface for receiving a substrate 60. A secondary bias electrode 170 below the dielectric member 155 has a conducting surface 175 exposed to the plasma zone 65. An electrode voltage supply 180 maintains the power electrode 165, primary bias electrode 145, and secondary bias electrode 170, at different electrical potentials to provide a high density, highly directional, plasma in the plasma zone 65 of the chamber 55.

    摘要翻译: 用于处理等离子体中的半导体衬底60的处理室55包括用于将处理气体分配到室中的等离子体区65中的处理气体分配器100。 电感天线135用于从等离子体区域中的处理气体形成感应等离子体。 腔室55的天花板140上的主偏压电极145具有暴露于等离子体区域65的导电表面150.包括嵌入其中的功率电极165的电介质构件155具有用于接收衬底60的接收表面。次级偏压 在电介质构件155下方的电极170具有暴露于等离子体区65的导电表面175.电极电压源180​​将功率电极165,初级偏压电极145和次级偏置电极170保持在不同的电位以提供高密度 ,在室55的等离子体区65中的高度方向性的等离子体。

    Multielectrode electrostatic chuck with fuses
    34.
    发明授权
    Multielectrode electrostatic chuck with fuses 失效
    带保险丝的多电极静电卡盘

    公开(公告)号:US5751537A

    公开(公告)日:1998-05-12

    申请号:US641938

    申请日:1996-05-02

    IPC分类号: B23Q3/15 H01L21/683 H02N13/00

    CPC分类号: H01L21/6833

    摘要: A failure resistant electrostatic chuck 20 for holding a substrate 35 during processing of the substrate 35, is described. The chuck 20 comprises a plurality of electrodes 25 covered by an insulator 30, the electrodes 25 capable of electrostatically holding a substrate 35 when a voltage is applied thereto. An electrical power bus 40 has a plurality of output terminals 45 that conduct voltage to the electrodes 25. Fuses 50 electrically connect the electrodes 25 to the output terminals 45 of the power bus 40, each fuse 50 connecting at least one electrode 25 in series to an output terminal from the power bus 40. The fuses 50 are capable of electrically disconnecting the electrode 25 from the output terminals 45 when the insulator 30 punctures and exposes the electrode 25 to the process environment causing a current to flow through the fuse 50. A current detector 175 and electrical counter 180 can be used to provide early detection and counting of the number of failures of the electrodes 25 by detecting the current discharges through the fuses 50.

    摘要翻译: 描述了用于在基板35的加工期间保持基板35的防破坏静电卡盘20。 卡盘20包括被绝缘体30覆盖的多个电极25,当施加电压时能够静电保持基板35的电极25。 电力总线40具有向电极25传导电压的多个输出端子45.保险丝50将电极25电连接到电力总线40的输出端子45,每个保险丝50将至少一个电极25串联连接到 来自电源总线40的输出端子。当绝缘体30刺穿并将电极25暴露于使电流流过保险丝50的处理环境时,熔断器50能够将电极25与输出端子45电断开。 电流检测器175和电计数器180可以用于通过检测通过保险丝50的电流放电来提供对电极25的故障数量的早期检测和计数。

    Maskless coating of metallurgical features of a dielectric substrate
    38.
    发明授权
    Maskless coating of metallurgical features of a dielectric substrate 失效
    介电基片的冶金特征的无掩模涂层

    公开(公告)号:US4442137A

    公开(公告)日:1984-04-10

    申请号:US359444

    申请日:1982-03-18

    申请人: Ananda H. Kumar

    发明人: Ananda H. Kumar

    摘要: Maskless technique for plating a protective metal layer on existing metallurgical pattern supported on a dielectric substrate by blanket coating said metal layer over said substrate, heating to diffuse the metal into said pattern, cooling to spall the metal on the non-patterned portions of the substrate surfaces by the stresses induced from the differences in the thermal contraction differentials between the metal and the substrate, and mechanically removing the metal layer from the non-patterned substrate surfaces. Optionally, the metal layer can also be blanket coated with a passivating metal film with interdiffusion between them at their interface during the noted heating step. In application to support carriers for mounting of semiconductor devices, the substrate will comprise an alumina based ceramic, the pattern will comprise a molybdenum based metal, and the protective metal layer can comprise a nickel based metal. In this application, the second passivating metal film can comprise gold.

    摘要翻译: 通过将所述金属层通过在所述衬底上方覆盖所述金属层,加热以将所述金属扩散到所述图案中,冷却以将所述金属分散在所述衬底的非图案化部分上,从而在保护金属层上电镀保护金属层 由金属和衬底之间的热收缩差异的差异引起的应力表面,以及从未图案化的衬底表面机械地去除金属层。 任选地,金属层也可以用钝化金属膜进行覆盖,钝化金属膜在所述加热步骤期间在它们的界面处在它们之间相互扩散。 在用于支撑用于安装半导体器件的载体的应用中,基底将包括氧化铝基陶瓷,该图案将包括钼基金属,并且保护金属层可以包括镍基金属。 在本申请中,第二钝化金属膜可以包含金。