公开(公告)号：US08099537B2

公开(公告)日：2012-01-17

申请号：US12295407

申请日：2007-02-20

申请人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Noriaki Takeda ,  Takaharu Yoshida

发明人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Noriaki Takeda ,  Takaharu Yoshida

IPC分类号： G06F13/42 ,  G06F13/00 ,  G06F13/24 ,  G06F1/00 ,  G06F1/04 ,  G06F1/12 ,  G06F5/06

CPC分类号： H04L25/14

摘要： It is an object of the invention to inhibit a drop in the data transmission efficiency due to the transmission of an interrupt signal. The invention provides a signal transmission method that is characterized in that a reception side and a transmission side partition data into a plurality of data fragments and send and receive the plurality of data fragments over at least two transmission lines, in that the transmission side transmits first data fragments of the plurality of data fragments over a first transmission line of the transmission lines, transmits data packets that include header information, a second data fragment that has the same bit length as the first data fragments, and footer information over a second transmission line other than the first transmission line, and transmits the first data fragments and the second data fragments in synchronization, and in that an interrupt signal for controlling the transmission side is transmitted from the reception side to the transmission side in a time slot that is an interval between first data fragments that are adjacent on the first transmission line.

摘要翻译： 本发明的一个目的是抑制由于中断信号的传输引起的数据传输效率的下降。 本发明提供了一种信号传输方法，其特征在于，接收侧和发送侧将数据划分成多个数据片段，并通过至少两条传输线发送和接收多个数据片段，其中发送侧首先发送 在传输线的第一传输线上的多个数据片段的数据片段，通过第二传输线传输包括标题信息的数据包，具有与第一数据片段相同的位长的第二数据片段，以及页脚信息 除了第一传输线之外，并且同步地发送第一数据片段和第二数据片段，并且用于控制发送侧的中断信号在作为间隔的时隙中的从接收侧发送到发送侧 在第一传输线上相邻的第一数据片段之间。

公开(公告)号：US20110280322A1

公开(公告)日：2011-11-17

申请号：US13142655

申请日：2010-10-13

申请人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Kohei Masuda ,  Yoshihide Komatsu ,  Masashi Suzuki

发明人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Kohei Masuda ,  Yoshihide Komatsu ,  Masashi Suzuki

IPC分类号： H04B3/00

CPC分类号： H04L25/0278

摘要： A data transmission system comprises: a pair of transmission lines connecting a plurality of apparatuses; a bridge termination resistor connected between the transmission lines and having a resistance value matching a differential impedance of the transmission lines; a first switch connecting the bridge termination resistor to the transmission lines when being turned on, and disconnecting the bridge termination resistor from the transmission lines when being turned off; pull-up/down resistors connected between the transmission lines and a fixed voltage node, and having resistance values respectively matching characteristic impedances of the transmission lines, the fixed voltage node being a power supply or a ground; and second switches connecting the pull-up/down resistors between the transmission lines and the fixed voltage node when being turned on, and disconnecting the pull-up/down resistors from the transmission lines when being turned off.

摘要翻译： 数据传输系统包括：一对连接多个设备的传输线; 连接在传输线之间并具有与传输线的差分阻抗匹配的电阻值的桥接终端电阻; 第一开关，其在接通时将桥接端接电阻器连接到传输线;以及当断开时将桥接终端电阻器与传输线路断开; 连接在传输线路和固定电压节点之间的上拉/下拉电阻器，具有分别匹配传输线路的特征阻抗，固定电压节点为电源或接地的电阻值; 以及第二开关，其在接通时将传输线和固定电压节点之间的上拉/下拉电阻连接起来，以及在断开时从传输线断开上拉/下拉电阻。

公开(公告)号：US07940086B2

公开(公告)日：2011-05-10

申请号：US12847161

申请日：2010-07-30

申请人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Masayuki Toyama ,  Kyoko Hirata

发明人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Masayuki Toyama ,  Kyoko Hirata

IPC分类号： H03K19/094

CPC分类号： H04L25/028 ,  H04L25/0272

摘要： An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system.

摘要翻译： 本发明的目的是实现在两个传输系统之间切换的接口电路中的输出级驱动器的面积的减小。 接口电路具有两个驱动电路和驱动控制电路，该电路可以在作为电压驱动系统和电流驱动系统的两个驱动系统之间切换。 两个驱动电路通过驱动控制电路连接到电源电位。 通过选择电路输入输入信号的两个输入信号和反相逻辑信号。 根据输入到驱动控制电路的控制信号，接口电路在电压驱动型单端传输系统和电流驱动型差动传输系统之间切换。

公开(公告)号：US07777687B2

公开(公告)日：2010-08-17

申请号：US12064890

申请日：2006-09-21

申请人： Osamu Shibata ,  Yoshiyuki Saito

发明人： Osamu Shibata ,  Yoshiyuki Saito

IPC分类号： H01Q1/52 ,  H01Q1/24

CPC分类号： A47B81/06 ,  H01Q1/526

摘要： A main object of the present invention is to reliably perform radio communication in an electronic device containing case without spoiling an aesthetic aspect thereof. In order to achieve the object, an electromagnetic shield body is provided on a wall surface of the case for containing an electronic device capable of the radio communication.

摘要翻译： 本发明的主要目的在于可靠地执行电子装置的电子装置的无线通信，而不损害其美学方面。 为了实现该目的，电磁屏蔽体设置在壳体的壁表面上，用于容纳能够进行无线电通信的电子设备。

公开(公告)号：US07748110B2

公开(公告)日：2010-07-06

申请号：US11826758

申请日：2007-07-18

申请人： Toshiyuki Asahi ,  Seiji Karashima ,  Takashi Ichiryu ,  Seiichi Nakatani ,  Tousaku Nishiyama ,  Koichi Hirano ,  Osamu Shibata ,  Takeshi Nakayama ,  Yoshiyuki Saito

发明人： Toshiyuki Asahi ,  Seiji Karashima ,  Takashi Ichiryu ,  Seiichi Nakatani ,  Tousaku Nishiyama ,  Koichi Hirano ,  Osamu Shibata ,  Takeshi Nakayama ,  Yoshiyuki Saito

IPC分类号： H05K3/36

CPC分类号： H05K3/403 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H01R13/2414 ,  H05K1/0218 ,  H05K1/0284 ,  H05K1/141 ,  H05K1/145 ,  H05K1/182 ,  H05K3/20 ,  H05K3/3442 ,  H05K3/361 ,  H05K3/366 ,  H05K3/368 ,  H05K2201/043 ,  H05K2201/048 ,  H05K2201/049 ,  H05K2201/055 ,  H05K2201/056 ,  H05K2201/09036 ,  H05K2201/10515 ,  H05K2201/10689 ,  H05K2203/302 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49208 ,  H01L2924/00

摘要： A connection member can be produced without a via-forming step. The connection member includes an insulating substrate which has an upper surface, a lower surface opposed to the upper surface, and a side surface which connects these surfaces; and at least one wiring which extends from the upper surface to the lower surface through the side surface.

摘要翻译： 可以在没有通孔形成步骤的情况下制造连接构件。 连接构件包括绝缘基板，其具有上表面，与上表面相对的下表面和连接这些表面的侧表面; 以及至少一个通过侧面从上表面延伸到下表面的布线。

公开(公告)号：US20090106460A1

公开(公告)日：2009-04-23

申请号：US12295051

申请日：2007-02-20

申请人： Hiroshi Suenaga ,  Osamu Shibata ,  Noriaki Takeda ,  Toru Iwata ,  Takaharu Yoshida ,  Yoshiyuki Saito

发明人： Hiroshi Suenaga ,  Osamu Shibata ,  Noriaki Takeda ,  Toru Iwata ,  Takaharu Yoshida ,  Yoshiyuki Saito

IPC分类号： G06F3/00

CPC分类号： H04L7/10 ,  G06F1/12 ,  H04L7/0008 ,  H04L7/033 ,  H04L7/044 ,  H04L7/046

摘要： An object of the present invention is to provide a technique to improve the data transmission efficiency which allows correct reception of the data at the same time. A removable memory device that transmits/receives data to and from a host terminal, which includes: a clock reception section 41 of receiving transmission/reception clock, which is used for transmitting/receiving data between the host terminal and the removable memory device, from the host terminal; a phase synchronization pattern generation section 45 of generating a phase synchronization pattern, which is for adjusting a phase of internal reception clock which the host terminal incorporates for receiving data from the removable memory device, based on the transmission/reception clock; and a transmission section of transmitting the generated phase synchronization pattern to the host terminal, and in which the phase synchronization pattern includes a first level signal which lasts for at least two cycles, and a second level signal which follows the first level signal and lasts for one cycle, is provided.

摘要翻译： 本发明的目的是提供一种提高数据传输效率的技术，其允许同时正确地接收数据。 一种向主机终端发送/接收数据的可移动存储装置，包括：用于在主机终端和可移动存储装置之间发送/接收数据的接收发送/接收时钟的时钟接收部分41， 主机终端; 生成相位同步模式的相位同步模式生成部45，用于基于发送/接收时钟来调整主机终端结合的用于从可移动存储装置接收数据的内部接收时钟的相位; 以及发送部，其将生成的相位同步模式发送到主机终端，并且其中相位同步模式包括持续至少两个周期的第一电平信号，以及跟随第一电平信号并持续的第二电平信号 提供一个循环。

公开(公告)号：US20090008131A1

公开(公告)日：2009-01-08

申请号：US11659131

申请日：2005-07-28

申请人： Osamu Shibata ,  Takeshi Nakayama ,  Yoshiyuki Saito

发明人： Osamu Shibata ,  Takeshi Nakayama ,  Yoshiyuki Saito

IPC分类号： H05K1/02

CPC分类号： H05K1/0219 ,  H05K1/0237 ,  H05K1/118 ,  H05K2201/055 ,  H05K2201/09236 ,  H05K2201/09445 ,  H05K2201/09727

摘要： A flexible printed board that is adapted to high-speed transmission and can mount a plurality of connectors at low cost is provided. The board comprises a flexible printed board body 100 that has a first side 100a and a second side 100b opposed to each other, and an overlap portion 105 formed by bending its one end; a plurality of wiring lines 101 that are arranged on the first side 100a of the body substantially in parallel to each other; first pads 103 that are connected to respective ends of wiring lines, wider than the wiring lines and formed on the first-side surface 105a of the overlap potion; and second pads 104 that are located at respective ends of wiring lines, wider than the wiring lines and formed on the second-side surface 105b of the overlap potion. The wiring lines 101a with the first pads connected thereto and the wiring lines 101b with the second pads 104 connected thereto are alternatively arranged on the first side.

摘要翻译： 提供了适用于高速传输并可以以低成本安装多个连接器的柔性印刷电路板。 板包括具有彼此相对的第一侧100a和第二侧面100b的柔性印刷电路板主体100和通过使其一端弯曲形成的重叠部分105; 布置在主体的第一侧100a上的多个布线101基本上彼此平行; 第一焊盘103，其连接到布线的相应端部，比布线宽，并形成在重叠部分的第一侧表面105a上; 以及第二焊盘104，其位于布线的相应端部，比布线宽，并且形成在重叠部分的第二侧表面105b上。 具有与其连接的第一焊盘的布线101a和与其连接的第二焊盘104的布线101b交替布置在第一侧上。

公开(公告)号：US20070252659A1

公开(公告)日：2007-11-01

申请号：US11664129

申请日：2005-08-01

申请人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Noboru Katta ,  Yuji Mizuguchi

发明人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Noboru Katta ,  Yuji Mizuguchi

IPC分类号： H03H7/38

CPC分类号： H01F17/0013 ,  H01F2017/0093 ,  H03H7/09 ,  H03H7/427 ,  H03H2001/0085 ,  H04B3/30 ,  H04L12/40032 ,  H04L2012/40215 ,  H04L2012/4026

摘要： In a filter circuit (1), a common mode choke (2) and a normal mode choke (3) have extremely high and low impedances, respectively, for common mode signals received through two input terminals (1a and 1b). The chokes have the opposite impedance characteristics for differential signals. In particular, the difference in impedance is large. Furthermore, the normal mode choke (3) is installed as a previous stage of the common mode choke (2). Accordingly, common mode noises which enter the two input terminals (1a and 1b) penetrate the normal mode choke (3), but neither penetrate the common mode choke (2) nor are reflected from the common mode choke (2). In particular, common mode currents flow through the normal mode choke (3) but do not flow through the common mode choke (2).

摘要翻译： 在滤波器电路（1）中，对于通过两个输入端子（1a和1b）接收的共模信号，共模扼流圈（2）和正常模式扼流圈（3）分别具有极高和低阻抗。 扼流圈对差分信号具有相反的阻抗特性。 特别地，阻抗的差异很大。 此外，正常模式扼流圈（3）安装为共模扼流圈（2）的前一级。 因此，进入两个输入端子（1a和1b）的共模噪声穿透正常模式扼流圈（3），但都不穿透共模扼流圈（2），也不会从共模扼流圈（2）反射。 特别地，共模电流流过正常模式扼流圈（3），但不流过共模扼流圈（2）。

公开(公告)号：US20050219006A1

公开(公告)日：2005-10-06

申请号：US11085078

申请日：2005-03-22

申请人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito

发明人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito

IPC分类号： H01F17/06 ,  H01P5/00 ,  H03H7/38 ,  H03H7/42 ,  H04B3/28 ,  H04B3/30 ,  H04L25/02

CPC分类号： H01F17/06 ,  H01F2017/0093 ,  H01F2017/067 ,  H04L25/0272

摘要： A first transmission line for transmitting a first signal and a second transmission line for transmitting a second signal, which has the reverse phase of the first signal, are connected in series with a common mode choke coil. A third transmission line and fourth transmission line are each connected in series with the common mode choke coil, and transmit the first and second signals. A semiconductor device is connected in series with the third and fourth transmission lines, so as to transmit and receive the first and second signals. One end of a first terminator is connected in parallel with the first transmission line, and the other end is connected to the common mode choke coil. One end of a second terminator is connected in parallel with the second transmission line, and the other end is connected to the common mode choke coil. The noise eliminating capability of the common mode choke coil is increase by means of this structure.

摘要翻译： 用于发送第一信号的第一传输线和用于发送具有第一信号的相反相位的第二信号的第二传输线与共模扼流线圈串联连接。 第三传输线和第四传输线各自与共模扼流线圈串联连接，并发送第一和第二信号。 半导体器件与第三和第四传输线串联连接，以便发送和接收第一和第二信号。 第一终端器的一端与第一传输线并联连接，另一端连接到共模扼流线圈。 第二终端器的一端与第二传输线并联连接，另一端连接到共模扼流线圈。 通过这种结构，增加了共模扼流线圈的噪声消除能力。

公开(公告)号：US08705637B2

公开(公告)日：2014-04-22

申请号：US13805456

申请日：2012-02-13

申请人： Osamu Shibata ,  Hiroshi Suenaga

发明人： Osamu Shibata ,  Hiroshi Suenaga

IPC分类号： H04B3/00

CPC分类号： H04B15/00 ,  H04L25/0266 ,  H04L25/0276

摘要： A signal transmission device including: a differential signal transmission unit having two output terminals for outputting a differential signal to a paired signal lines including first and second signal lines; a single-ended signal transmission unit having two output terminals for outputting independent two-channel single-ended signals to the paired signal lines; and a filter unit having first and second common mode filters. One terminal of the differential signal transmission unit and one terminal of the single-ended signal transmission unit are connected to the first signal line via one inductor of the first common mode filter of the filter unit. The other one terminal of the differential signal transmission unit and the other one terminal of the single-ended signal transmission unit are connected to the second signal line via one inductor of the second common mode filter of the filter unit.

摘要翻译： 一种信号传输装置，包括：差分信号传输单元，具有两个输出端，用于将差分信号输出到包括第一和第二信号线的成对信号线; 一个单端信号传输单元，具有两个输出端，用于向成对的信号线输出独立的双通道单端信号; 以及具有第一和第二共模滤波器的滤波器单元。 差分信号传输单元的一个端子和单端信号传输单元的一个端子通过滤波器单元的第一共模滤波器的一个电感器连接到第一信号线。 差分信号传输单元的另一个端子和单端信号传输单元的另一个端子通过滤波器单元的第二共模滤波器的一个电感器连接到第二信号线。