SYSTEM-IN-PACKAGE PLATFORM FOR ELECTRONIC-MICROFLUIDIC DEVICES
    35.
    发明申请
    SYSTEM-IN-PACKAGE PLATFORM FOR ELECTRONIC-MICROFLUIDIC DEVICES 有权
    用于电子微流体装置的系统级封装平台

    公开(公告)号:US20090072332A1

    公开(公告)日:2009-03-19

    申请号:US12293284

    申请日:2007-03-07

    IPC分类号: H01L29/00 H01L21/00

    摘要: The present invention relates to an integrated electronic-micro fluidic device an integrated electronic-micro fluidic device, comprising a semiconductor substrate (106) on a first (122) support, an electronic circuit (102, 104) on a first semiconductor-substrate side of the semiconductor substrate, and a signal interface structure to an external device. The signal interface structure is arranged on the first semiconductor-substrate side and configured to receive electrical signals from the electronic circuit. A micro fluidic structure (126) is formed in the semiconductor substrate, and is configured to confine a fluid and to allow a flow of the fluid to and from the microfluidic structure only on a second semiconductor-substrate side that is opposite to the first semiconductor-substrate side and faces away form the first support. The electronic-micro fluidic device forms a flexible platform for the formation of various System-in-Package applications. It achieves a clear separation between electrical and wet-chemical interfaces. The claimed method for fabricating the device of the invention also allows a simple formation of thermally isolated microfluidic structures.

    摘要翻译: 本发明涉及集成电子微流体装置,其集成电子微流体装置包括在第一(122)支撑件上的半导体衬底(106),在第一半导体衬底侧上的电子电路(102,104) 的半导体衬底,以及到外部设备的信号接口结构。 信号接口结构布置在第一半导体衬底侧并被配置为从电子电路接收电信号。 微流体结构(126)形成在半导体衬底中,并且被配置为限制流体并且允许仅在与第一半导体相反的第二半导体衬底侧上流体流过微流体结构 底部侧面和背面形成第一支撑。 电子 - 微流体装置形成用于形成各种系统级封装应用的灵活平台。 它实现了电气和湿化学界面之间的清晰分离。 所要求的制造本发明装置的方法还允许简单地形成热分离的微流体结构。

    Flexible semiconductor device and identification label
    36.
    发明申请
    Flexible semiconductor device and identification label 有权
    灵活的半导体器件和识别标签

    公开(公告)号:US20070108521A1

    公开(公告)日:2007-05-17

    申请号:US10563416

    申请日:2004-07-01

    申请人: Ronald Dekker

    发明人: Ronald Dekker

    IPC分类号: H01L27/12 H01L23/02

    摘要: Provided is a flexible device (100) having an integrated circuit (5) and an antenna (6) which is incorporated or directly coupled to the interconnect structure of the integrated circuit (5). The interconnect structure extends outside of the active area. An electrically insulating or dielectric layer (4) is present as support layer for both antenna (6) and integrated circuit (5). The substrate (10) is removed at non-silicon areas (1OB) outside the active areas (IOA) of the integrated circuit (5). This removal can be combined with the use of a substrate of monocrystalline silicon. The flexible device is very suitable for integration in identification labels and security paper, and can be manufactured using a temporarily attached carrier substrate.

    摘要翻译: 提供了具有集成电路(5)和天线(6)的柔性装置(100),天线(6)并入或直接耦合到集成电路(5)的互连结构。 互连结构延伸到有效区域的外部。 电绝缘或电介质层(4)作为天线(6)和集成电路(5)的支撑层而存在。 在集成电路(5)的有源区(10A)之外的非硅区(1 OB)处去除衬底(10)。 这种去除可以与使用单晶硅的衬底组合。 灵活的装置非常适用于识别标签和安全纸的集成,并可以使用临时附着的载体基板制造。

    Bipolar transistor with floating guard region under extrinsic base
    38.
    发明授权
    Bipolar transistor with floating guard region under extrinsic base 失效
    双极晶体管,外部基极具有浮动保护区域

    公开(公告)号:US5221856A

    公开(公告)日:1993-06-22

    申请号:US833599

    申请日:1992-02-10

    摘要: A first device region (10) of one conductivity type adjacent one major surface (1a) of a semiconductor body (1) has a relatively highly doped subsidiary region (11) spaced from the one major surface (1a) by a relatively lowly doped subsidiary region (12). A second device region (20) of the opposite conductivity type within the subsidiary region (12) has an intrinsic subsidiary region (21) and an extrinsic subsidiary region (23,24) surrounding the intrinsic subsidiary region (21) forming respective first and second pn junctions (22,25) with the relatively lowly doped subsidiary region (12). A third device region (30) of the one conductivity type is formed within the intrinsic subsidiary region (21) surface (1a). An additional region (60,60',61,62) is provided beneath the extrinsic subsidiary region (23,24) so as to lie within the spread of the depletion region (250) associated with the second pn junction (25) when the first and second pn junction (22,25) are reverse-biassed thereby extending the depletion region (250) beneath the emitter region (30) to cause an increase in the Early voltage (V.sub.eaf) of the device.

    摘要翻译: 与半导体本体(1)的一个主表面(1a)相邻的一种导电类型的第一器件区域(10)具有相对高度掺杂的辅助区域(11),该区域通过相对低掺杂的子元件与一个主表面(1a)间隔开 区域(12)。 在辅助区域(12)内具有相反导电类型的第二设备区域(20)具有内部辅助区域(21)和围绕内部辅助区域(21)的外在辅助区域(23,24),形成相应的第一和第二 pn结(22,25)与相对低掺杂的辅助区域(12)。 一个导电类型的第三器件区域(30)形成在本征辅助区域(21)表面(1a)内。 在外部辅助区域(23,24)的下方提供附加区域(60,60',61,62),以便当位于与第二pn结(25)相关联的耗尽区域(250)的扩展区内时 第一和第二pn结(22,25)被反向偏压,从而将耗尽区(250)延伸到发射极区(30)之下,以引起器件的早期电压(Veaf)的增加。