公开(公告)号：US20090217908A1

公开(公告)日：2009-09-03

申请号：US12395877

申请日：2009-03-02

申请人： Satoshi Watanabe ,  Hiroto Tanaka ,  Rihito Kaneko ,  Norihito Hanai ,  Kenji Senda ,  Satoshi Masuda

发明人： Satoshi Watanabe ,  Hiroto Tanaka ,  Rihito Kaneko ,  Norihito Hanai ,  Kenji Senda ,  Satoshi Masuda

IPC分类号： F02P5/152 ,  F01L1/34 ,  F02D43/00

CPC分类号： F02P5/1525 ,  F01L1/34 ,  F01L13/00 ,  F02P5/152 ,  G01L23/225 ,  Y02T10/46

摘要： An engine ECU executes a program including the steps of: calculating a knock magnitude N by dividing an integrated value lpkknk obtained by integrating the magnitude of vibration in the knock detection gate by BGL; controlling ignition timing according to a result of comparison between knock magnitude N and a determination value VJ; stopping updating of a standard deviation σ when it is determined that determination value VJ to be compared with knock magnitude N is to be changed; updating a median value VM by increasing an update amount of median value VM; and updating BGL according to median value VM and standard deviation σ.

摘要翻译： 发动机ECU执行程序，包括以下步骤：通过将通过将爆震检测门中的振动的积分积分得到的积分值lpkknk除以BGL来计算爆震大小N; 根据敲击量N与判定值VJ的比较结果控制点火正时; 当确定要与敲击量N进行比较的确定值VJ被改变时，停止标准偏差σ的更新; 通过增加中值VM的更新量来更新中值VM; 并根据中值VM和标准偏差σ更新BGL。

公开(公告)号：US20070288184A1

公开(公告)日：2007-12-13

申请号：US11717769

申请日：2007-03-14

申请人： Hideaki Konishi ,  Ryuji Shimizu ,  Masayasu Hojo ,  Haruhiko Abe ,  Satoshi Masuda ,  Naofumi Kobayashi

发明人： Hideaki Konishi ,  Ryuji Shimizu ,  Masayasu Hojo ,  Haruhiko Abe ,  Satoshi Masuda ,  Naofumi Kobayashi

IPC分类号： G01R29/02

CPC分类号： G01R31/31858 ,  G01R31/318552 ,  G01R31/318594

摘要： In a delay failure test circuit, a delay failure test between two clock domains among a plurality of clock domains having different operation clock rates is performed. The delay failure test circuit inputs, to a first clock domain, a clock signal having only a launch edge for transferring data from the first clock domain to a second clock domain, and to input, to the second clock domain, a clock signal having only a capture edge for capturing the data.

摘要翻译： 在延迟故障测试电路中，执行具有不同操作时钟速率的多个时钟域中的两个时钟域之间的延迟失败测试。 延迟故障测试电路向第一时钟域输入仅具有用于将数据从第一时钟域传送到第二时钟域的发射边缘的时钟信号，并将仅具有唯一的时钟信号输入到第二时钟域 用于捕获数据的捕获边。

公开(公告)号：US06480846B2

公开(公告)日：2002-11-12

申请号：US09927376

申请日：2001-08-13

申请人： Takeshi Kuribayashi ,  Yasuhiro Maenishi ,  Hiroyoshi Nishida ,  Nobuyuki Nakamura ,  Satoshi Masuda ,  Atsushi Tanaka

发明人： Takeshi Kuribayashi ,  Yasuhiro Maenishi ,  Hiroyoshi Nishida ,  Nobuyuki Nakamura ,  Satoshi Masuda ,  Atsushi Tanaka

IPC分类号： G06F1730

CPC分类号： H05K13/0084 ,  G05B19/4097 ,  G05B2219/35198 ,  G05B2219/36195 ,  G06F17/50 ,  G06F2217/02 ,  G06Q30/0643 ,  H05K13/085 ,  Y10S707/99936

摘要： Image data of various kinds of components and component text data required for mounting of components, e.g., shapes, dimensions, packing forms, colors, and the like of the components, are stored in a storage medium in a manner to be read out as part of a component electronic catalog. The storage medium is used to make a search for components on a screen and automatically read out necessary component text data. The component electronic catalog can be used not only to search for components on a screen, similar to a conventional component electronic catalog, but to automatically read out component text data so as to automatically form mounting data for components to be mounted which are selected through the screen search.

摘要翻译： 各种组件的图像数据和组件安装所需的组件文本数据（例如，组件的形状，尺寸，包装形式，颜色等）以被作为部分读出的方式存储在存储介质中 的组件电子目录。 存储介质用于搜索屏幕上的组件，并自动读取必要的组件文本数据。 组件电子目录不仅可以用于搜索屏幕上的组件，类似于常规组件电子目录，而且可以自动读取组件文本数据，以便自动形成要安装的组件的安装数据，这些组件通过 屏幕搜索。

公开(公告)号：US5754880A

公开(公告)日：1998-05-19

申请号：US501989

申请日：1995-07-13

申请人： Hideki Yoshihara ,  Tatsuya Kawamura ,  Satoshi Masuda ,  Kenichi Sato

发明人： Hideki Yoshihara ,  Tatsuya Kawamura ,  Satoshi Masuda ,  Kenichi Sato

IPC分类号： H05K13/04 ,  G05B19/4097 ,  G05B19/418 ,  G06F17/50 ,  G06F17/30

CPC分类号： G05B19/4097 ,  G05B19/4183 ,  G05B2219/35059 ,  G05B2219/35216 ,  G05B2219/36195 ,  Y02P90/04 ,  Y02P90/10 ,  Y02P90/14 ,  Y02P90/265

摘要： A method for mounting electronic components on circuit boards by operating an electronic component-mounting apparatus based on numerical control (NC) data involves the storage of component information, including supply numbers of components purchased from a plurality of makers, maker names of the purchased components, sizes thereof, configurations thereof, and mounting conditions, into a component mounting data base. A correspondence is established between factory numbers listed in a CAD data table and the supply numbers, thereby allowing the management of the supply numbers by grouping one or more supply numbers with each factory number. The supply numbers corresponding to a factory number are used as an index to obtain component information corresponding to each of the supply numbers. This obtained component information is used to generate the numerical control (NC) data for the component-mounting apparatus.

摘要翻译： 通过操作基于数控（NC）数据的电子部件安装装置来将电子部件安装在电路板上的方法包括存储组件信息，包括从多个制造商购买的部件的供应编号，购买的部件的制造商名称 ，其尺寸，结构以及安装条件放入部件安装数据库中。 在CAD数据表中列出的工厂编号和供应编号之间建立了对应关系，从而通过将一个或多个供应编号与每个工厂编号分组来管理供应编号。 将与出厂号对应的供给数量用作索引，以获得与每个供应编号对应的分量信息。 该获得的部件信息用于生成用于部件安装装置的数控（NC）数据。

公开(公告)号：US5644703A

公开(公告)日：1997-07-01

申请号：US554805

申请日：1995-11-07

申请人： Keiichi Kurakazu ,  Yoshikazu Aoto ,  Shiro Baba ,  Satoshi Masuda ,  Hiroyuki Kida ,  Shinji Kawashima ,  Yoshiaki Naruse

发明人： Keiichi Kurakazu ,  Yoshikazu Aoto ,  Shiro Baba ,  Satoshi Masuda ,  Hiroyuki Kida ,  Shinji Kawashima ,  Yoshiaki Naruse

IPC分类号： G06F11/36 ,  G06F9/44 ,  G06F9/46

CPC分类号： G06F11/3648 ,  G06F11/3656

摘要： A circuit by which an SWI instruction held in a memory circuit is switchedly input in response to a signal supplied externally is provided in a processor, whereby the substitution of a program word can be realized using such an internal circuit, so that a high-speed and reliable break in program execution can be effected. Moreover, an interrupt function separate from normal interrupts is established by setting a specified operation mode, whereby, when a data processor is used as an emulator, the break of a user program including the ordinary interrupt processes can be easily effected by utilizing the special interrupt function. Also, by additionally providing the function of delivering out a signal indicative of the break status, an external circuit can be simplified.

摘要翻译： 在处理器中设置有响应于外部提供的信号切换输入存储电路中保持的SWI指令的电路，由此可以使用这样的内部电路来实现对程序字的替换，从而高速 并且可以实现程序执行的可靠中断。 此外，通过设置指定的操作模式来建立与正常中断分离的中断功能，由此当使用数据处理器作为仿真器时，可以通过利用特殊中断来容易地实现包括普通中断处理的用户程序的中断 功能。 此外，通过附加地提供表示中断状态的信号的功能，可以简化外部电路。

公开(公告)号：US5564183A

公开(公告)日：1996-10-15

申请号：US129604

申请日：1993-09-30

申请人： Kenichi Satou ,  Makoto Kawai ,  Yoshifumi Nakao ,  Satoshi Masuda ,  Koichi Kanematsu ,  Setsuo Horimoto

发明人： Kenichi Satou ,  Makoto Kawai ,  Yoshifumi Nakao ,  Satoshi Masuda ,  Koichi Kanematsu ,  Setsuo Horimoto

IPC分类号： B23K31/12 ,  G01R31/28 ,  H05K3/12 ,  H05K3/34 ,  H05K13/08 ,  G06F19/00

CPC分类号： H05K13/08 ,  B23K31/12 ,  B23K2201/42 ,  G01R31/2806 ,  G01R31/2808 ,  H05K3/1216 ,  H05K3/3484 ,  Y10T29/49004 ,  Y10T29/49144 ,  Y10T29/53061 ,  Y10T29/53178

摘要： An assembly line includes a printing device for printing solder on a land of a circuit board, a mounting device for mounting an electric component at a predetermined position of the solder, and a soldering device for soldering the land to a terminal of the component. A monitored items detecting device detects predetermined to be monitored items of the board and equipment used in the printing, mounting, or soldering devices, and a control device analyzes a condition of the equipment and quality of the board with reference to warning criterion which do not exceed failure criterion, and then dynamically controls the various devices accordingly.

摘要翻译： 组装线包括用于在电路板的焊盘上印刷焊料的打印装置，用于将电气部件安装在焊料的预定位置的安装装置，以及用于将焊盘焊接到部件的端子的焊接装置。 监视项目检测装置检测预定的待监控的项目和打印，安装或焊接装置中使用的设备，并且控制装置参照不是的警告标准来分析设备的状况和板的质量 超过故障标准，然后相应地动态地控制各种设备。

公开(公告)号：US4998197A

公开(公告)日：1991-03-05

申请号：US215506

申请日：1988-07-06

申请人： Keiichi Kurakazu ,  Yoshikazu Aoto ,  Shiro Baba ,  Satoshi Masuda ,  Hiroyuki Kida ,  Shinji Kawashima ,  Yoshiaki Naruse

发明人： Keiichi Kurakazu ,  Yoshikazu Aoto ,  Shiro Baba ,  Satoshi Masuda ,  Hiroyuki Kida ,  Shinji Kawashima ,  Yoshiaki Naruse

IPC分类号： G06F11/36

CPC分类号： G06F11/3648 ,  G06F11/3656

摘要： A circuit by which an SWI instruction held in a memory circuit is switchedly input in response to a signal supplied externally is provided in a processor, whereby the substitution of a program word can be realized using such an internal circuit, so that a high-speed and reliable break in program excution can be effected. Moreover, an interrupt function separate from normal interrupts is established by setting a specified operation mode, whereby, when a data processor is used as an emulator, the break of a user program including the ordinary interrupt processes can be easily effected by utilizing the special interrupt function. Also, by additionally providing the function of delivering out a signal indicative of the break status, an external circuit can be simplified.

公开(公告)号：US09024242B2

公开(公告)日：2015-05-05

申请号：US13697785

申请日：2011-04-15

申请人： Satoshi Masuda

发明人： Satoshi Masuda

IPC分类号： H01L27/00 ,  H04N5/372 ,  H04N5/374 ,  H04N5/3745 ,  H04N5/378

CPC分类号： H04N5/37206 ,  H04N5/3743 ,  H04N5/37457 ,  H04N5/378

摘要： A solid-state image pickup device which is configured not to require transfer of signal charges between pixels performs TDI. An output control section 5 sequentially assigns a pixel signal output processing period to each pixel array group 10 in the order of the vertical direction at an interval of one horizontal processing period H obtained by dividing one frame period T into three. The one frame period T is a period when each pixel array 100 is moved in the vertical direction. An adder 50 sums up a pixel signal held in a signal holding portion 41_X, and a pixel signals held in a signal holding portion 41_R, 41_G, 41_B corresponding to the pixel signal under the control of the output control section 5, and outputs the summation result to an A/D converter 60.

摘要翻译： 被配置为不需要在像素之间传送信号电荷的固态图像拾取装置执行TDI。 输出控制部5以通过将一个帧周期T除以三个而获得的一个水平处理周期H的间隔，以垂直方向的顺序，顺序地向像素阵列组10分配像素信号输出处理周期。 一帧周期T是每个像素阵列100沿垂直方向移动的周期。 加法器50将保持在信号保持部分41_X中的像素信号和保持在与输出控制部分5的控制下的像素信号相对应的信号保持部分41_R，41_G，41_B中的像素信号相加，并输出求和 导致A / D转换器60。

公开(公告)号：US09007152B2

公开(公告)日：2015-04-14

申请号：US13306641

申请日：2011-11-29

申请人： Satoshi Masuda

发明人： Satoshi Masuda

IPC分类号： H03H7/38 ,  H01L23/66 ,  H01P5/12 ,  H03F3/60

CPC分类号： H01P5/12 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2223/6655 ,  H01L2224/49175 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H03F3/602 ,  H03H7/38 ,  H01L2924/00

摘要： A transmission line includes two tapered lines having a tapered planar shape and arranged in parallel, opposite lines provided in opposition to the narrower width sides of the two tapered lines, and a bonding wire for connecting the narrower width sides of the two tapered lines and the opposite lines, wherein the width between two outer edges on the narrower width sides of the two tapered lines arranged in parallel is greater than the width between outer edges on the opposite side of the opposite lines in opposition to the narrower width sides of the two tapered lines.

摘要翻译： 传输线包括具有锥形平面形状并且平行布置的两个锥形线，与两个锥形线的较窄宽度侧相对设置的相反线，以及用于连接两个锥形线的较窄宽度侧的接合线和 相反的线，其中平行布置的两个锥形线的较窄宽度侧上的两个外边缘之间的宽度大于相对于相反线的相反侧的外边缘之间的宽度，与两个锥形 线条。

公开(公告)号：US20130062505A1

公开(公告)日：2013-03-14

申请号：US13697785

申请日：2011-04-15

申请人： Satoshi Masuda

发明人： Satoshi Masuda

IPC分类号： H01L27/146

CPC分类号： H04N5/37206 ,  H04N5/3743 ,  H04N5/37457 ,  H04N5/378

摘要： A solid-state image pickup device which is configured not to require transfer of signal charges between pixels performs TDI. An output control section 5 sequentially assigns a pixel signal output processing period to each pixel array group 10 in the order of the vertical direction at an interval of one horizontal processing period H obtained by dividing one frame period T into three. The one frame period T is a period when each pixel array 100 is moved in the vertical direction. An adder 50 sums up a pixel signal held in a signal holding portion 41_X, and a pixel signals held in a signal holding portion 41_R, 41_G, 41_B corresponding to the pixel signal under the control of the output control section 5, and outputs the summation result to an A/D converter 60.

摘要翻译： 被配置为不需要在像素之间传送信号电荷的固态图像拾取装置执行TDI。 输出控制部5以通过将一个帧周期T除以三个而获得的一个水平处理周期H的间隔，以垂直方向的顺序，顺序地向像素阵列组10分配像素信号输出处理周期。 一帧周期T是每个像素阵列100沿垂直方向移动的周期。 加法器50将保持在信号保持部分41_X中的像素信号和保持在与输出控制部分5的控制下的像素信号相对应的信号保持部分41_R，41_G，41_B中的像素信号相加，并输出求和 导致A / D转换器60。