公开(公告)号：US07217611B2

公开(公告)日：2007-05-15

申请号：US10748383

申请日：2003-12-29

申请人： Jack Kavalieros ,  Justin K. Brask ,  Mark L. Doczy ,  Scott A. Hareland ,  Matthew V. Metz ,  Chris E. Barns ,  Robert S. Chau

发明人： Jack Kavalieros ,  Justin K. Brask ,  Mark L. Doczy ,  Scott A. Hareland ,  Matthew V. Metz ,  Chris E. Barns ,  Robert S. Chau

IPC分类号： H01L21/8238

CPC分类号： H01L29/517 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/66545 ,  Y10S438/926

摘要： Methods and associated structures of forming a microelectronic device are described. Those methods comprise providing a substrate comprising a first transistor structure comprising an n-type gate material and second transistor structure comprising a p-type gate material, selectively removing the n-type gate material to form a recess in the first gate structure, and then filling the recess with an n-type metal gate material.

摘要翻译： 描述形成微电子器件的方法和相关结构。 这些方法包括提供包括包括n型栅极材料的第一晶体管结构和包括p型栅极材料的第二晶体管结构的衬底，选择性地去除n型栅极材料以在第一栅极结构中形成凹陷，然后 用n型金属栅极材料填充凹部。

公开(公告)号：US07018549B2

公开(公告)日：2006-03-28

申请号：US10748617

申请日：2003-12-29

申请人： Matthew V. Metz ,  Scott A. Hareland ,  Robert S. Chau

发明人： Matthew V. Metz ,  Scott A. Hareland ,  Robert S. Chau

IPC分类号： B82B3/00

CPC分类号： B22F1/0025 ,  B22F1/0018 ,  B22F2998/00 ,  B22F2999/00 ,  B82Y30/00 ,  Y10S977/762 ,  Y10T117/10 ,  B22F1/004 ,  B22F9/16

摘要： A method is described for fabricating multiple nanowires of uniform length from a single precursor nucleation particle. The method includes growing a first nanowire segment from a nanoparticle and growing a second nanowire segment between the first nanowire segment and the nanoparticle. The first nanowire segment and the second nanowire segment have a different solubility.

摘要翻译： 描述了从单个前体成核颗粒制造具有均匀长度的多个纳米线的方法。 该方法包括从纳米颗粒生长第一纳米线段并在第一纳米线段和纳米颗粒之间生长第二纳米线段。 第一纳米线段和第二纳米线段具有不同的溶解度。

公开(公告)号：US06939815B2

公开(公告)日：2005-09-06

申请号：US10652796

申请日：2003-08-28

申请人： Justin K. Brask ,  Mark L. Doczy ,  Scott A. Hareland ,  John P. Barnak ,  Matthew V. Metz ,  Jack Kavalieros ,  Robert S. Chau

发明人： Justin K. Brask ,  Mark L. Doczy ,  Scott A. Hareland ,  John P. Barnak ,  Matthew V. Metz ,  Jack Kavalieros ,  Robert S. Chau

IPC分类号： H01L21/28 ,  H01L21/30 ,  H01L21/306 ,  H01L21/316 ,  H01L29/51 ,  H01L21/31

CPC分类号： H01L21/02244 ,  H01L21/02052 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/3003 ,  H01L21/31612 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31683 ,  H01L21/31691 ,  H01L29/513 ,  H01L29/517

摘要： A method for making a semiconductor device is described. That method comprises forming a metal oxide layer on a substrate, converting at least part of the metal oxide layer to a metal layer; and oxidizing the metal layer to generate a metal oxide high-k gate dielectric layer.

摘要翻译： 描述制造半导体器件的方法。 该方法包括在基板上形成金属氧化物层，将金属氧化物层的至少一部分转化为金属层; 并氧化金属层以产生金属氧化物高k栅极电介质层。

公开(公告)号：US06864145B2

公开(公告)日：2005-03-08

申请号：US10611109

申请日：2003-06-30

申请人： Scott A. Hareland ,  Mark L. Doczy ,  Robert S. Chau

发明人： Scott A. Hareland ,  Mark L. Doczy ,  Robert S. Chau

IPC分类号： H01L21/265 ,  H01L21/28 ,  H01L21/336 ,  H01L29/51

CPC分类号： H01L21/28185 ,  H01L21/26586 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/512 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545

摘要： A method is described for selectively treating the properties of a gate dielectric near corners of the gate without altering the gate dielectric in a center region of a gate channel. The method includes providing a structure having a gate opening and depositing a layer of dielectric with a high dielectric constant on a bottom surface and side walls of the gate opening. The corner regions of the high dielectric constant layer formed adjacent to the bottom surface and the side walls of the gate opening are selectively treated without altering the center region of the high dielectric constant layer formed at the bottom surface of the gate opening.

摘要翻译： 描述了一种方法，用于选择性地处理在栅极角附近的栅极电介质的性质，而不改变栅极沟道的中心区域中的栅极电介质。 该方法包括提供具有栅极开口并且在栅极开口的底表面和侧壁上沉积具有高介电常数的电介质层的结构。 选择性地处理邻近底表面和栅极开口形成的高介电常数层的角区域，而不改变形成在栅极开口底表面处的高介电常数层的中心区域。

公开(公告)号：US08626287B2

公开(公告)日：2014-01-07

申请号：US13221617

申请日：2011-08-30

申请人： Scott A. Hareland

发明人： Scott A. Hareland

IPC分类号： A61N1/39

CPC分类号： A61N1/3918 ,  A61N1/3931 ,  A61N1/3956

摘要： A device includes an energy storage device, a plurality of electrodes, a memory, a switching circuit, and a processing module. The energy storage device stores electrical energy for delivery of defibrillation therapy to a heart. The memory stores N therapy configurations that define which of the plurality of electrodes are used to deliver defibrillation therapy and a waveform to be applied during delivery of defibrillation therapy. The switching circuit connects the plurality of electrodes to the energy storage device. The processing module controls the switching circuit to deliver defibrillation therapy according to a first therapy configuration of the N therapy configurations, detects a short circuit fault during delivery of the defibrillation therapy according to the first therapy configuration, and selects a second therapy configuration of the N therapy configurations based on when the short circuit fault was detected during delivery of the defibrillation therapy according to the first therapy configuration.

摘要翻译： 一种装置包括能量存储装置，多个电极，存储器，开关电路和处理模块。 能量存储装置存储用于向心脏递送除颤疗法的电能。 存储器存储N种治疗配置，其限定多个电极中的哪一个用于递送除颤疗法和在除颤治疗递送期间施加的波形。 开关电路将多个电极连接到能量存储装置。 所述处理模块根据所述N种治疗方式的第一治疗结构，控制所述切换电路进行除颤治疗，根据所述第一治疗结构检测所述除颤疗法的输送期间的短路故障，并选择所述N次 基于根据第一治疗配置在除颤治疗递送期间检测到短路故障的治疗配置。

公开(公告)号：US20130053910A1

公开(公告)日：2013-02-28

申请号：US13221558

申请日：2011-08-30

申请人： Scott A. Hareland

发明人： Scott A. Hareland

IPC分类号： A61N1/39

CPC分类号： A61N1/3937 ,  A61N1/3918 ,  A61N1/3925 ,  A61N2001/083

摘要： A medical device includes an energy storage device, a plurality of electrodes, a memory, a switching circuit, and a processing module. The energy storage device stores electrical energy for delivery of defibrillation therapy to a heart. The memory stores N therapy configurations, each of the N therapy configurations defining which of the plurality of electrodes are used to deliver defibrillation therapy and further defining a waveform to be applied during delivery of defibrillation therapy. The switching circuit is configured to connect the plurality of electrodes to the energy storage device. The processing module is configured to control the switching circuit to deliver defibrillation therapy according to a first therapy configuration, detect a fault during delivery of the defibrillation therapy according to the first therapy configuration, and select a second therapy configuration based on when the fault was detected during delivery of the defibrillation therapy according to the first therapy configuration.

摘要翻译： 医疗装置包括能量存储装置，多个电极，存储器，开关电路和处理模块。 能量存储装置存储用于向心脏递送除颤疗法的电能。 存储器存储N个治疗配置，N个治疗配置中的每个配置限定多个电极中的哪一个用于递送除颤治疗，并进一步限定在递送除颤治疗期间应用的波形。 开关电路被配置为将多个电极连接到能量存储装置。 处理模块被配置为根据第一治疗配置来控制切换电路进行除颤治疗，根据第一治疗配置检测除颤治疗期间的故障，并且基于检测到故障时选择第二治疗配置 在根据第一疗法配置的除颤疗法递送期间。

公开(公告)号：US07045073B2

公开(公告)日：2006-05-16

申请号：US10324305

申请日：2002-12-18

申请人： Scott A. Hareland ,  Nick Lindert ,  Reza Arghavani ,  Robert Chau

发明人： Scott A. Hareland ,  Nick Lindert ,  Reza Arghavani ,  Robert Chau

IPC分类号： B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00

CPC分类号： H01L21/31111 ,  H01L21/26506 ,  H01L21/266 ,  H01L21/31053 ,  H01L21/3115

摘要： A method for anisotropically and selectively removing a dielectric thin film layer from a substrate layer is disclosed, wherein the dielectric layer is subjected to ion implantation prior to wet etching. This method may be applied adjacent to a structure such as a gate electrode within a microelectronic structure to prevent undercutting of the dielectric material to be preserved between the gate electrode and the substrate layer, as may happen with more isotropic etching techniques.

摘要翻译： 公开了一种从基底层各向异性地选择性去除电介质薄膜层的方法，其中介电层在湿蚀刻之前进行离子注入。 该方法可以与微电子结构内的诸如栅电极的结构相邻地施加，以防止在栅电极和衬底层之间保留的电介质材料的底切，这可能由于更多的各向同性蚀刻技术而发生。

公开(公告)号：US07145246B2

公开(公告)日：2006-12-05

申请号：US11064808

申请日：2005-02-23

申请人： Scott A. Hareland ,  Robert Chau

发明人： Scott A. Hareland ,  Robert Chau

IPC分类号： H01L23/52 ,  H01L29/40

CPC分类号： H01L29/775 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66818 ,  H01L29/7613 ,  H01L29/785 ,  Y10S977/762

摘要： A method of forming a nanowire is disclosed. A nanowire having a first dimension is deposited on a first dielectric layer that is formed on a substrate. A sacrificial gate stack having a sacrificial dielectric layer and a sacrificial gate electrode layer is deposited over a first region of the nanowire leaving exposed a second region and a third region of the nanowire. A first spacer is deposited on each side of the sacrificial gate stack. A second dielectric layer is deposited over the first dielectric layer to cover the second region and the third region. The sacrificial gate stack is removed. The first region of the nanowire is thinned by at least one thermal oxidation process and oxide removal process to thin said first region from said first dimension to a second dimension.

摘要翻译： 公开了形成纳米线的方法。 具有第一尺寸的纳米线沉积在形成在基底上的第一介电层上。 具有牺牲电介质层和牺牲栅极电极层的牺牲栅极堆叠沉积在纳米线的第一区域上，从而暴露出纳米线的第二区域和第三区域。 在牺牲栅极堆叠的每一侧上沉积第一间隔物。 第二电介质层沉积在第一介电层上以覆盖第二区域和第三区域。 去除牺牲栅极堆叠。 通过至少一个热氧化工艺和氧化物去除工艺来稀薄纳米线的第一区域，以使所述第一区域从所述第一维度稀薄到第二维度。

公开(公告)号：US06897098B2

公开(公告)日：2005-05-24

申请号：US10629039

申请日：2003-07-28

申请人： Scott A. Hareland ,  Robert Chau

发明人： Scott A. Hareland ,  Robert Chau

IPC分类号： H01L21/335 ,  H01L29/76 ,  H01L29/775 ,  H01L21/82

CPC分类号： H01L29/775 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66818 ,  H01L29/7613 ,  H01L29/785 ,  Y10S977/762

摘要： A method of forming a nanowire is disclosed. A nanowire having a first dimension is deposited on a first dielectric layer that is formed on a substrate. A sacrificial gate stack having a sacrificial dielectric layer and a sacrificial gate electrode layer is deposited over a first region of the nanowire leaving exposed a second region and a third region of the nanowire. A first spacer is deposited on each side of the sacrificial gate stack. A second dielectric layer is deposited over the first dielectric layer to cover the second region and third region. The sacrificial gate stack is removed. The first region of the nanowire is thinned by at least one thermal oxidation process and oxide removal process to thin said first region from said first dimension to a second dimension.

摘要翻译： 公开了形成纳米线的方法。 具有第一尺寸的纳米线沉积在形成在基底上的第一介电层上。 具有牺牲电介质层和牺牲栅极电极层的牺牲栅极堆叠沉积在纳米线的第一区域上，从而暴露出纳米线的第二区域和第三区域。 在牺牲栅极堆叠的每一侧上沉积第一间隔物。 第二电介质层沉积在第一电介质层上以覆盖第二区域和第三区域。 去除牺牲栅极堆叠。 通过至少一个热氧化工艺和氧化物去除工艺来稀薄纳米线的第一区域，以使所述第一区域从所述第一维度稀薄到第二维度。

公开(公告)号：US08467872B2

公开(公告)日：2013-06-18

申请号：US13221558

申请日：2011-08-30

申请人： Scott A. Hareland

发明人： Scott A. Hareland

IPC分类号： A61N1/00

CPC分类号： A61N1/3937 ,  A61N1/3918 ,  A61N1/3925 ,  A61N2001/083

摘要： A medical device includes an energy storage device, a plurality of electrodes, a memory, a switching circuit, and a processing module. The energy storage device stores electrical energy for delivery of defibrillation therapy to a heart. The memory stores N therapy configurations, each of the N therapy configurations defining which of the plurality of electrodes are used to deliver defibrillation therapy and further defining a waveform to be applied during delivery of defibrillation therapy. The switching circuit is configured to connect the plurality of electrodes to the energy storage device. The processing module is configured to control the switching circuit to deliver defibrillation therapy according to a first therapy configuration, detect a fault during delivery of the defibrillation therapy according to the first therapy configuration, and select a second therapy configuration based on when the fault was detected during delivery of the defibrillation therapy according to the first therapy configuration.

摘要翻译： 医疗装置包括能量存储装置，多个电极，存储器，开关电路和处理模块。 能量存储装置存储用于向心脏递送除颤疗法的电能。 存储器存储N个治疗配置，N个治疗配置中的每个配置限定多个电极中的哪一个用于递送除颤治疗，并进一步限定在递送除颤治疗期间应用的波形。 开关电路被配置为将多个电极连接到能量存储装置。 处理模块被配置为根据第一治疗配置来控制切换电路进行除颤治疗，根据第一治疗配置检测除颤治疗期间的故障，并且基于检测到故障时选择第二治疗配置 在根据第一疗法配置的除颤疗法递送期间。