公开(公告)号：US10283599B2

公开(公告)日：2019-05-07

申请号：US15670135

申请日：2017-08-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Fu-Wei Yao ,  Chun-Wei Hsu ,  Chen-Ju Yu ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Chih-Wen Hsiung ,  King-Yuen Wong

IPC分类号： H01L29/20 ,  H01L29/40 ,  H01L29/66 ,  H01L29/778

摘要： A transistor includes a first layer over a substrate. The transistor also includes a second layer over the first layer. The transistor further includes a carrier channel layer at an interface of the first layer and the second layer. The transistor additionally includes a gate structure, a drain, and a source over the second layer. The transistor also includes a passivation material in the second layer between an edge of the gate structure and an edge of the drain in a top-side view. The carrier channel layer has a smaller surface area than the first layer between the edge of the gate structure and the edge of the drain in the top-side view.

公开(公告)号：US10164047B2

公开(公告)日：2018-12-25

申请号：US15443861

申请日：2017-02-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Ju Yu ,  Chih-Wen Hsiung ,  Fu-Wei Yao ,  Chun-Wei Hsu ,  King-Yuen Wong ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang

IPC分类号： H01L29/20 ,  H01L29/778 ,  H01L29/66 ,  H01L21/02 ,  H01L29/423 ,  H01L29/10 ,  H01L21/225 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/324 ,  H01L29/201 ,  H01L29/205 ,  H01L29/06 ,  H01L29/08

摘要： A high electron mobility transistor (HEMT) includes a silicon substrate, an unintentionally doped gallium nitride (UID GaN) layer over the silicon substrate. The HEMT further includes a donor-supply layer over the UID GaN layer, a gate structure, a drain, and a source over the donor-supply layer. The HEMT further includes a dielectric layer having one or more dielectric plug portions in the donor-supply layer and top portions between the gate structure and the drain over the donor-supply layer. A method for making the HEMT is also provided.

公开(公告)号：US10050117B2

公开(公告)日：2018-08-14

申请号：US15645463

申请日：2017-07-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Fu-Wei Yao ,  Chen-Ju Yu ,  Fu-Chih Yang ,  Chun Lin Tsai

IPC分类号： H01L29/66 ,  H01L29/778 ,  H01L21/02 ,  H01L29/10 ,  H01L29/20 ,  H01L29/267 ,  H01L29/417 ,  H01L29/43

摘要： A high electron mobility transistor (HEMT) includes a first III-V compound layer and a second III-V compound layer disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A source feature and a drain feature are disposed on the second III-V compound layer. A p-type layer is disposed on a portion of the second III-V compound layer between the source feature and the drain feature. A gate electrode is disposed on the p-type layer. A capping layer is disposed on the second III-V compound layer.

公开(公告)号：US20180197856A1

公开(公告)日：2018-07-12

申请号：US15911263

申请日：2018-03-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chung-Yen Chou ,  Sheng-De Liu ,  Fu-Chih Yang ,  Shih-Chang Liu ,  Chia-Shiung Tsai

IPC分类号： H01L27/088 ,  H01L27/06 ,  H01L27/085 ,  H01L29/51 ,  H01L29/66 ,  H01L29/778 ,  H01L21/8252 ,  H01L29/20 ,  H01L29/10

CPC分类号： H01L27/088 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/085 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/778 ,  H01L29/7786

摘要： A semiconductor structure with a MISFET and a HEMT region includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A third III-V compound layer is disposed on the second III-V compound layer is different from the second III-V compound layer in composition. A source feature and a drain feature are disposed in each of the MISFET and HEMT regions on the third III-V compound layer. A gate electrode is disposed over the second III-V compound layer between the source feature and the drain feature. A gate dielectric layer is disposed under the gate electrode in the MISFET region but above the top surface of the third III-V compound layer.

公开(公告)号：US20170271511A1

公开(公告)日：2017-09-21

申请号：US15613526

申请日：2017-06-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Hao Yeh ,  Chih-Chang Cheng ,  Ru-Yi Su ,  Ker Hsiao Huo ,  Po-Chih Chen ,  Fu-Chih Yang ,  Chun Lin Tsai

IPC分类号： H01L29/78 ,  H03K17/22 ,  H01L29/40 ,  H01L29/66 ,  H01L29/423 ,  H01L29/417 ,  H01L29/06 ,  H01L29/808

CPC分类号： H01L29/7832 ,  H01L29/0692 ,  H01L29/404 ,  H01L29/41758 ,  H01L29/42356 ,  H01L29/66893 ,  H01L29/66901 ,  H01L29/808 ,  H03K17/223

摘要： A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of the first conductivity type is disposed on a first side of the insulation region and in a top surface region of the first HVW region. A first well region and a second well region of a second conductivity type opposite the first conductivity type are on the second side of the insulation region. A second HVW region of the first conductivity type is disposed between the first and the second well regions, wherein the second HVW region is connected to the buried well region. A source region of the first conductivity type is in a top surface region of the second HVW region, wherein the source region, the drain region, and the buried well region form a JFET.

公开(公告)号：US09748372B2

公开(公告)日：2017-08-29

申请号：US14926783

申请日：2015-10-29

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： King-Yuen Wong ,  Chen-Ju Yu ,  Fu-Wei Yao ,  Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Chih-Wen Hsiung ,  Fu-Chih Yang

IPC分类号： H01L29/778 ,  H01L29/51 ,  H01L29/66 ,  H01L21/28 ,  H01L29/20 ,  H01L29/207

CPC分类号： H01L29/7786 ,  H01L21/28264 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66462 ,  H01L29/7787

摘要： A method of forming a semiconductor structure includes growing a second III-V compound layer over a first III-V compound layer, wherein the second III-V compound layer has a different band gap from the first III-V compound layer. The method further includes forming a source feature and a drain feature over the second III-V compound layer. The method further includes forming a gate dielectric layer over the second III-V compound layer, the source feature and the drain feature. The method further includes implanting at least one fluorine-containing compound into a portion of the gate dielectric layer. The method further includes forming a gate electrode over the portion of the gate dielectric layer.

公开(公告)号：US09728613B2

公开(公告)日：2017-08-08

申请号：US14855460

申请日：2015-09-16

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Fu-Wei Yao ,  Chun-Wei Hsu ,  Chen-Ju Yu ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Chih-Wen Hsiung ,  King-Yuen Wong

IPC分类号： H01L29/66 ,  H01L29/40 ,  H01L29/778 ,  H01L29/20

CPC分类号： H01L29/402 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

摘要： A transistor includes a first layer over a substrate. The transistor also includes a second layer over the first layer. The transistor further includes a carrier channel layer at an interface of the first layer and the second layer. The transistor additionally includes a gate structure, a drain, and a source over the second layer. The transistor also includes a passivation material in the second layer between an edge of the gate structure and an edge of the drain in a top-side view. The carrier channel layer has a smaller surface area than the first layer between the edge of the gate structure and the edge of the drain in the top-side view.

公开(公告)号：US09583588B2

公开(公告)日：2017-02-28

申请号：US14533864

申请日：2014-11-05

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chen-Ju Yu ,  Chih-Wen Hsiung ,  Fu-Wei Yao ,  Chun-Wei Hsu ,  King-Yuen Wong ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang

IPC分类号： H01L29/778 ,  H01L29/06 ,  H01L21/335 ,  H01L21/336 ,  H01L29/66 ,  H01L29/423 ,  H01L29/10 ,  H01L29/20 ,  H01L21/02 ,  H01L21/225 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/324 ,  H01L29/201 ,  H01L29/205

CPC分类号： H01L29/66462 ,  H01L21/0254 ,  H01L21/2258 ,  H01L21/3065 ,  H01L21/32051 ,  H01L21/321 ,  H01L21/32133 ,  H01L21/324 ,  H01L29/0653 ,  H01L29/0843 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/42316 ,  H01L29/66431 ,  H01L29/7787

摘要： A method includes epitaxially growing a gallium nitride (GaN) layer over a silicon substrate. The method further includes epitaxially growing a donor-supply layer over the GaN layer. The method further includes forming a source and a drain on the donor-supply layer. The method further includes forming a gate structure between the source and the drain on the donor-supply layer. The method further includes plasma etching a portion of a drift region of the donor-supply layer to a depth of less than 60% of a donor-supply layer thickness. The method further includes depositing a dielectric layer over the donor-supply layer.

摘要翻译： 一种方法包括在硅衬底上外延生长氮化镓（GaN）层。 该方法还包括在GaN层上外延生长施主供体层。 该方法还包括在供体层上形成源极和漏极。 该方法还包括在供体层上的源极和漏极之间形成栅极结构。 该方法还包括将供体供体层的漂移区域的一部分等离子体蚀刻到小于施主供体层厚度的60％的深度。 该方法还包括在供体供体层上沉积介电层。

公开(公告)号：US20160308024A1

公开(公告)日：2016-10-20

申请号：US15196776

申请日：2016-06-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： King-Yuen Wong ,  Chen-Ju Yu ,  Jiun-Lei Jerry Yu ,  Po-Chih Chen ,  Fu-Wei Yao ,  Fu-Chih Yang

IPC分类号： H01L29/66 ,  H01L21/266 ,  H01L21/28 ,  H01L29/417 ,  H01L21/3065 ,  H01L21/311 ,  H01L29/20 ,  H01L29/423 ,  H01L21/265 ,  H01L29/778

CPC分类号： H01L29/66462 ,  H01L21/26546 ,  H01L21/266 ,  H01L21/28264 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/41716 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/66621 ,  H01L29/7786 ,  H01L29/7787

摘要： An integrated circuit device includes a first III-V compound layer, a second III-V compound layer over the first III-V compound layer, a gate dielectric over the second III-V compound layer, and a gate electrode over the gate dielectric. An anode electrode and a cathode electrode are formed on opposite sides of the gate electrode. The anode electrode is electrically connected to the gate electrode. The anode electrode, the cathode electrode, and the gate electrode form portions of a rectifier.

公开(公告)号：US09443969B2

公开(公告)日：2016-09-13

申请号：US13948925

申请日：2013-07-23

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： King-Yuen Wong ,  Po-Chih Chen ,  Chen-Ju Yu ,  Fu-Chih Yang ,  Jiun-Lei Jerry Yu ,  Fu-Wei Yao ,  Ru-Yi Su ,  Yu-Syuan Lin

IPC分类号： H01L29/778

CPC分类号： H01L29/66462 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/518 ,  H01L29/7786 ,  H01L29/7787

摘要： A transistor includes a substrate, a channel layer over the substrate, an active layer over the channel layer, a metal diffusion barrier over the active layer, and a gate over the metal diffusion barrier. The active layer has a band gap discontinuity with the channel layer.

摘要翻译： 晶体管包括衬底，衬底上的沟道层，沟道层上的有源层，有源层上的金属扩散势垒以及金属扩散势垒上的栅极。 有源层与沟道层具有带隙不连续性。