公开(公告)号：US07816696B2

公开(公告)日：2010-10-19

申请号：US11908430

申请日：2006-03-09

申请人： Yoshiaki Hasegawa ,  Gaku Sugahara ,  Naomi Anzue ,  Akihiko Ishibashi ,  Toshiya Yokogawa

发明人： Yoshiaki Hasegawa ,  Gaku Sugahara ,  Naomi Anzue ,  Akihiko Ishibashi ,  Toshiya Yokogawa

IPC分类号： H01L29/267 ,  H01L21/332

CPC分类号： H01S5/32341 ,  H01L21/28575 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/861 ,  H01L33/20 ,  H01L33/382 ,  H01L33/40 ,  H01S5/0207 ,  H01S5/0421 ,  H01S5/0425 ,  H01S2301/173

摘要： An nitride semiconductor device according to the present invention is a nitride semiconductor device including: an n-GaN substrate 10; a semiconductor multilayer structure 100 formed on a principal face of the n-GaN substrate 10, the semiconductor multilayer structure 100 including a p-type region and an n-type region; a p-side electrode 32 which is in contact with a portion of the p-type region included in the semiconductor multilayer structure 100; and an n-side electrode 34 provided on the rear face of the n-GaN substrate 10. The rear face of the n-GaN substrate includes a nitrogen surface, such that a carbon concentration at an interface between the rear face and the n-side electrode 34 is adjusted to 5 atom % or less.

摘要翻译： 根据本发明的氮化物半导体器件是氮化物半导体器件，其包括：n-GaN衬底10; 形成在n-GaN衬底10的主面上的半导体多层结构100，包括p型区和n型区的半导体层叠结构100; p侧电极32，其与包含在半导体多层结构体100中的p型区域的一部分接触; 以及设置在n-GaN衬底10的背面上的n侧电极34.n-GaN衬底的背面包括氮表面，使得在背面和n- 侧电极34被调整为5原子％以下。

公开(公告)号：US07704860B2

公开(公告)日：2010-04-27

申请号：US10597575

申请日：2005-11-15

申请人： Toshitaka Shimamoto ,  Yasutoshi Kawaguchi ,  Yoshiaki Hasegawa ,  Akihiko Ishibashi ,  Isao Kidoguchi ,  Toshiya Yokogawa

发明人： Toshitaka Shimamoto ,  Yasutoshi Kawaguchi ,  Yoshiaki Hasegawa ,  Akihiko Ishibashi ,  Isao Kidoguchi ,  Toshiya Yokogawa

IPC分类号： H01L21/20

CPC分类号： H01S5/22 ,  H01L21/02389 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265 ,  H01S5/32341 ,  H01S2304/12

摘要： A nitride-based semiconductor device according to the present invention includes a semiconductor multilayer structure supported on a substrate structure 101 with electrical conductivity. The principal surface of the substrate structure 101 has at least one vertical growth region, which functions as a seed crystal for growing a nitride-based semiconductor vertically, and a plurality of lateral growth regions for allowing the nitride-based semiconductor that has grown on the vertical growth region to grow laterally. The sum ΣX of the respective sizes of the vertical growth regions as measured in the direction pointed by the arrow A and the sum ΣY of the respective sizes of the lateral growth regions as measured in the same direction satisfy the inequality ΣX/ΣY>1.0.

摘要翻译： 根据本发明的氮化物基半导体器件包括支撑在具有导电性的衬底结构101上的半导体多层结构。 衬底结构101的主表面具有至少一个垂直生长区，其起垂直生长氮化物基半导体的晶种的作用，以及用于允许在其上生长的氮化物基半导体的多个横向生长区 垂直生长区域横向生长。 在箭头A所示的方向上测量的垂直生长区域的各自尺寸的总和＆Sgr X以及在相同方向上测量的横向生长区域的各自尺寸的总和＆Sgr; Y满足不等式＆lt; Sgr; X /＆S; Y> 1.0。

公开(公告)号：US20080272462A1

公开(公告)日：2008-11-06

申请号：US10597575

申请日：2005-11-15

申请人： Toshitaka Shimamoto ,  Yasutoshi Kawaguchi ,  Yoshiaki Hasegawa ,  Akihiko Ishibashi ,  Isao Kidoguchi ,  Toshiya Yokogawa

发明人： Toshitaka Shimamoto ,  Yasutoshi Kawaguchi ,  Yoshiaki Hasegawa ,  Akihiko Ishibashi ,  Isao Kidoguchi ,  Toshiya Yokogawa

IPC分类号： H01L21/20 ,  H01L29/201

CPC分类号： H01S5/22 ,  H01L21/02389 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265 ,  H01S5/32341 ,  H01S2304/12

摘要： A nitride-based semiconductor device according to the present invention includes a semiconductor multilayer structure supported on a substrate structure 101 with electrical conductivity. The principal surface of the substrate structure 101 has at least one vertical growth region, which functions as a seed crystal for growing a nitride-based semiconductor vertically, and a plurality of lateral growth regions for allowing the nitride-based semiconductor that has grown on the vertical growth region to grow laterally. The sum ΣX of the respective sizes of the vertical growth regions as measured in the direction pointed by the arrow A and the sum ΣY of the respective sizes of the lateral growth regions as measured in the same direction satisfy the inequality ΣX/ΣY>1.0.

摘要翻译： 根据本发明的氮化物基半导体器件包括支撑在具有导电性的衬底结构101上的半导体多层结构。 衬底结构101的主表面具有至少一个垂直生长区，其起垂直生长氮化物基半导体的晶种的作用，以及用于允许在其上生长的氮化物基半导体的多个横向生长区 垂直生长区域横向生长。 在箭头A所指的方向上测量的垂直生长区域的各自尺寸的大小和在相同方向上测量的横向生长区域的各自尺寸的总和SigmaY的和ΣX满足SigmaX / SigmaY> 1.0的不等式。

公开(公告)号：US07338827B2

公开(公告)日：2008-03-04

申请号：US10547968

申请日：2004-03-09

申请人： Gaku Sugahara ,  Yasutoshi Kawaguchi ,  Akihiko Ishibashi ,  Isao Kidoguchi ,  Toshiya Yokogawa

发明人： Gaku Sugahara ,  Yasutoshi Kawaguchi ,  Akihiko Ishibashi ,  Isao Kidoguchi ,  Toshiya Yokogawa

IPC分类号： H01L21/00

CPC分类号： H01S5/227 ,  H01S5/0202 ,  H01S5/0421 ,  H01S5/2205 ,  H01S5/32341

摘要： A method for fabricating nitride semiconductor devices according to the present invention includes the steps of: (A) providing a nitride semiconductor substrate, which will be split into chip substrates, which includes device portions that will function as the respective chip substrates when the substrate is split and interdevice portions that connect the device portions together, and in which the average thickness of the interdevice portions is smaller than the thickness of the device portions; (B) defining a masking layer, which has striped openings over the device portions, on the upper surface of the nitride semiconductor substrate; (C) selectively growing nitride semiconductor layers on portions of the upper surface of the nitride semiconductor substrate, which are exposed through the openings of the masking layer; and (D) cleaving the nitride semiconductor substrate along the interdevice portions of the nitride semiconductor substrate, thereby forming nitride semiconductor devices on the respectively split chip substrates.

摘要翻译： 根据本发明的制造氮化物半导体器件的方法包括以下步骤：（A）提供将被分成芯片衬底的氮化物半导体衬底，其包括当衬底为基底时用作各个芯片衬底的器件部分 将装置部分连接在一起的分割和互连部分，并且其中，所述装置间部分的平均厚度小于所述装置部分的厚度; （B）在氮化物半导体衬底的上表面上限定在器件部分上具有条纹开口的掩模层; （C）在氮化物半导体衬底的上表面的通过掩模层的开口露出的部分上选择性地生长氮化物半导体层; 以及（D）沿着氮化物半导体衬底的间隙部分切割氮化物半导体衬底，从而在分别的芯片衬底上形成氮化物半导体器件。

公开(公告)号：US20070217460A1

公开(公告)日：2007-09-20

申请号：US11568336

申请日：2005-04-20

申请人： Akihiko Ishibashi ,  Toshiya Yokogawa ,  Toshitaka Shimamoto ,  Yoshiaki Hasegawa ,  Yasutoshi Kawaguchi ,  Isao Kidoguchi

发明人： Akihiko Ishibashi ,  Toshiya Yokogawa ,  Toshitaka Shimamoto ,  Yoshiaki Hasegawa ,  Yasutoshi Kawaguchi ,  Isao Kidoguchi

IPC分类号： H01S5/30 ,  H01L21/20

CPC分类号： H01S5/34333 ,  B82Y20/00 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02636 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/0265 ,  H01L33/0075 ,  H01S5/2201 ,  H01S5/305 ,  H01S5/3216 ,  H01S2301/173 ,  H01S2304/04 ,  H01S2304/12

摘要： A process for producing a nitride semiconductor according to the present invention includes: step (A) of provided an n-GaN substrate 101; step (B) of forming on the substrate 101 a plurality of stripe ridges having upper faces which are parallel to a principal face of the substrate 101; step (C) of selectively growing AlxGayInzN crystals (0≦x, y, z≦1: x+y+z=1) 104 on the upper faces of the plurality of stripe ridges, the AlxGayInzN crystals containing an n-type impurity at a first concentration; and step (D) of growing an Alx′Gay′Inz′N crystal (0≦x′, y′, z′≦1: x′+y′+z′=1) 106 on the AlxGayInzN crystals 104, the Alx′Gay′Inz′N crystal 106 containing an n-type impurity at a second concentration which is lower than the first concentration, and linking every two adjoining AlxGayInzN crystals 104 with the Alx′Gay′Inz′N crystal 106 to form one nitride semiconductor layer 120.

摘要翻译： 根据本发明的制造氮化物半导体的方法包括：提供n-GaN衬底101的步骤（A）; 在基板101上形成具有平行于基板101的主面的上表面的多个条纹脊的步骤（B）; 选择性地生长Al x N晶体的步骤（C）（0≤x，y，z <= 1：x + y + z = 1）104，在多个条纹脊的上表面上，含有N，N，N， 第一浓度的n型杂质; 和步骤（D），生长Al 2 O 3 / （0 <= x'，y'，z'<= 1：x'）。 + y'+ z'= 1）106在Al x N y晶体104中，Al x x < 包含低于第一浓度的第二浓度的n型杂质，并且连接每两个相邻的Al x x的子晶体106 在具有Al x Si 2 O 3的N z晶体104中，Ga 3+ 在＆lt; SUB＆gt;＆lt; SUB＆gt;＆lt; / SUB＆gt;＆lt;＆lt;＆lt; 形成一个氮化物半导体层120。

公开(公告)号：US07056756B2

公开(公告)日：2006-06-06

申请号：US10611851

申请日：2003-07-03

申请人： Gaku Sugahara ,  Yoshiaki Hasegawa ,  Akihiko Ishibashi ,  Toshiya Yokogawa

发明人： Gaku Sugahara ,  Yoshiaki Hasegawa ,  Akihiko Ishibashi ,  Toshiya Yokogawa

IPC分类号： H01L21/00

CPC分类号： H01S5/32341 ,  H01S5/0213 ,  H01S5/0224 ,  H01S5/02272 ,  H01S5/0425

摘要： A method for fabricating a nitride semiconductor laser device including a step to expose surfaces of an n-type nitride semiconductor layer (102) and a p-type nitride semiconductor layer (108); a step to cover the surface of the multi-layered semiconductor; with an insulating film (109) that has a thickness greater than the difference in levels between the exposed surface of the n-type nitride semiconductor layer (102) and the outermost surface of the p-type nitride semiconductor layer (108); a step to flatten the surface of the insulating film (109); and a step to form an n-type electrode (111) and a p-type electrode (110) electrically connected to the n-type nitride semiconductor layer (102) and the p-type nitride semiconductor layer (108), respectively. This method makes it possible to obtain a nitride semiconductor laser device that is highly reliable and exhibits an excellent heat diffusing property.

摘要翻译： 一种用于制造氮化物半导体激光器件的方法，包括：暴露n型氮化物半导体层（102）和p型氮化物半导体层（108）的表面的步骤; 覆盖多层半导体表面的步骤; 具有大于n型氮化物半导体层（102）的露出表面与p型氮化物半导体层（108）的最外表面之间的电平差的绝缘膜（109）; 平坦化绝缘膜（109）的表面的步骤; 以及分别形成与n型氮化物半导体层（102）和p型氮化物半导体层（108）电连接的n型电极（111）和p型电极（110）的步骤。 该方法可以获得高可靠性并且具有优异的散热性能的氮化物半导体激光器件。

公开(公告)号：US06995396B2

公开(公告)日：2006-02-07

申请号：US10279119

申请日：2002-10-24

申请人： Kunimasa Takahashi ,  Masao Uchida ,  Makoto Kitabatake ,  Toshiya Yokogawa ,  Osamu Kusumoto ,  Kenya Yamashita ,  Ryoko Miyanaga

发明人： Kunimasa Takahashi ,  Masao Uchida ,  Makoto Kitabatake ,  Toshiya Yokogawa ,  Osamu Kusumoto ,  Kenya Yamashita ,  Ryoko Miyanaga

IPC分类号： H01L31/0312 ,  H01L29/80 ,  H01L31/112 ,  H01L29/76 ,  H01L27/095

CPC分类号： H01L29/365 ,  C30B25/02 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02584 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/0445 ,  H01L29/0657 ,  H01L29/1608 ,  H01L29/66068

摘要： A SiC bulk substrate whose top face has been flattened is placed in a vertical thin film growth system to be annealed in an inert gas atmosphere. A material gas of Si is then supplied at a flow rate of 1 mL/min. at a substrate temperature of 1200° C. through 1600° C. Subsequently, the diluent gas is changed to a hydrogen gas at a temperature of 1600° C., and material gases of Si and carbon are supplied with nitrogen intermittently supplied, so as to deposit SiC thin films on the SiC bulk substrate. In a flat δ-doped multilayered structure thus formed, an average height of macro steps formed on the top face and on interfaces therein is 30 nm or less. When the resultant substrate is used, a semiconductor device with a high breakdown voltage and high mobility can be realized.

公开(公告)号：US06940127B2

公开(公告)日：2005-09-06

申请号：US10631086

申请日：2003-07-31

申请人： Toshiya Yokogawa ,  Kunimasa Takahashi ,  Masao Uchida ,  Makoto Kitabatake ,  Osamu Kusumoto

发明人： Toshiya Yokogawa ,  Kunimasa Takahashi ,  Masao Uchida ,  Makoto Kitabatake ,  Osamu Kusumoto

IPC分类号： H01L21/82 ,  H01L27/06 ,  H01L29/10 ,  H01L29/15 ,  H01L29/24 ,  H01L29/36 ,  H01L29/772 ,  H01L29/812 ,  H01L29/872 ,  H03D7/12 ,  H03F3/60 ,  H01L29/76

CPC分类号： H03F3/601 ,  H01L21/8213 ,  H01L27/0605 ,  H01L29/105 ,  H01L29/157 ,  H01L29/1608 ,  H01L29/365 ,  H01L29/7725 ,  H01L29/812 ,  H01L29/872 ,  H03D7/125 ,  H03F2200/294

摘要： Equipment for a communication system has a semiconductor device formed by integrating a Schottky diode, a MOSFET, a capacitor, and an inductor in a SiC substrate. The SiC substrate has a first multilayer portion and a second multilayer portion provided upwardly in this order. The first multilayer portion is composed of δ-doped layers each containing an n-type impurity (nitrogen) at a high concentration and undoped layers which are alternately stacked. The second multilayer portion is composed of δ-doped layers each containing a p-type impurity (aluminum) at a high concentration and undoped layers which are alternately stacked. Carriers in the δ-doped layers spread out extensively to the undoped layers. Because of a low impurity concentration in each of the undoped layers, scattering by impurity ions is reduced so that a low resistance and a high breakdown voltage are obtained.

摘要翻译： 用于通信系统的设备具有通过将肖特基二极管，MOSFET，电容器和电感器集成在SiC衬底中而形成的半导体器件。 SiC衬底具有依次向上设置的第一多层部分和第二多层部分。 第一多层部分由各自含有高浓度的n型杂质（氮）和交替层叠的未掺杂层的δ掺杂层组成。 第二多层部分由各自含有高浓度的p型杂质（铝）和交替层叠的未掺杂层的δ掺杂层组成。 δ掺杂层中的载体广泛扩展到未掺杂的层。 由于每个未掺杂的层中的杂质浓度低，所以杂质离子的散射被降低，从而获得低的电阻和高的击穿电压。

公开(公告)号：US06927149B2

公开(公告)日：2005-08-09

申请号：US10890263

申请日：2004-07-14

申请人： Gaku Sugahara ,  Yasutoshi Kawaguchi ,  Akihiko Ishibashi ,  Toshiya Yokogawa ,  Atsushi Matsubara

发明人： Gaku Sugahara ,  Yasutoshi Kawaguchi ,  Akihiko Ishibashi ,  Toshiya Yokogawa ,  Atsushi Matsubara

IPC分类号： H01L21/20 ,  H01S5/02 ,  H01S5/323 ,  H01L21/18 ,  C30B29/38 ,  C30B29/40 ,  H01L29/20 ,  H01L31/0304

CPC分类号： H01S5/32341 ,  H01L21/02378 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/0265 ,  H01S5/0207 ,  H01S5/0213 ,  H01S5/0217 ,  H01S5/1017 ,  H01S5/22 ,  H01S2304/00 ,  H01S2304/12

摘要： A nitride semiconductor device comprising a substrate (101) having trenches (102b) each formed of a cavity and peaks (102a) formed from a group III nitride on the surface thereof; a nitride semiconductor layer (106) formed on the substrate (101); and a nitride semiconductor multilayered structure that is formed on the nitride semiconductor layer (106) and has an active layer, wherein the lattice constant of the substrate (101) is different from that of the group III nitride substance (102a), the substrate (101) has a mask (104a) formed from a dielectric (104), the mask (104a) is formed only on the side surfaces of the peaks (102a), the upper surfaces of the peaks (102a) are exposed and the substrate (101) is exposed in the trenches (102b), a height L1 of the mask (104a) is not less than 50 nm and not more than 5000 nm, a width L2 of the trench (102b) is not less than 5000 nm and not more than 50000 nm, and an aspect ratio L1/L2 of the trenches (102b) is not less than 0.001 and not more than 1.0. This structure enhances the reliability of the nitride semiconductor devices.

摘要翻译： 一种氮化物半导体器件，包括具有由空腔形成的沟槽（102b）的衬底（101）和在其表面上由III族氮化物形成的峰（102a）; 形成在所述基板（101）上的氮化物半导体层（106） 以及氮化物半导体多层结构，其形成在所述氮化物半导体层上并具有活性层，其中所述衬底（101）的晶格常数与所述III族氮化物物质（102a）的晶格常数不同，所述衬底 （101）具有由电介质（104）形成的掩模（104a），所述掩模（104a）仅形成在所述峰（102a）的侧表面上，所述峰（102a）的上表面 露出并且衬底（101）暴露在沟槽（102b）中，掩模（104a）的高度L 1不小于50nm且不大于5000nm，沟槽（102）的宽度L 2 b）不小于5000nm且不大于50000nm，并且沟槽（102b）的纵横比L 1 / L 2不小于0.001且不大于1.0。 这种结构提高了氮化物半导体器件的可靠性。

公开(公告)号：US06903383B2

公开(公告)日：2005-06-07

申请号：US10343097

申请日：2001-11-21

申请人： Toshiya Yokogawa ,  Asamira Suzuki ,  Masahiro Deguchi ,  Shigeo Yoshii ,  Hiroyuki Furuya

发明人： Toshiya Yokogawa ,  Asamira Suzuki ,  Masahiro Deguchi ,  Shigeo Yoshii ,  Hiroyuki Furuya

IPC分类号： H01L21/8252 ,  H01L27/06 ,  H01L29/20 ,  H01L29/778 ,  H03F3/60 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L27/0605 ,  H01L21/8252 ,  H01L29/2003 ,  H01L29/7785 ,  H03F3/601 ,  H03F2200/294

摘要： A HEMT has an InAlAs layer (202), an InGaAs layer (203), a multiple δ-doped InAlAs layer (204) composed of n-type doped layers (204a) and undoped layers (204b) which are alternately stacked, an InP layer (205), a Schottky gate electrode (210), a source electrode (209a), and a drain electrode (209b) on an InP substrate (201). When a current flows in a region (channel region) of the InGaAs layer (203) adjacent the interface between the InGaAs layer (203) and the multiple δ-doped InAlAs layer (204), a breakdown voltage in the OFF state can be increased, while resistance to the movement of carriers passing through the multiple δ-doped InAlAs layer (204) as a carrier supplying layer is reduced.

摘要翻译： HEMT具有InAlAs层（202），InGaAs层（203），由交替层叠的n型掺杂层（204a）和未掺杂层（204b）构成的多重δ掺杂InAlAs层（204） InP层（205），肖特基栅电极（210），源极电极（209a）和漏极电极（209b）。 当电流在与InGaAs层（203）和多重δ掺杂的InAlAs层（204）之间的界面相邻的InGaAs层（203）的区域（沟道区）中流动时，可以增加关断状态下的击穿电压 ，同时抵抗通过作为载流子供给层的多个δ-掺杂InAlAs层（204）的载流子的移动。