-
31.
公开(公告)号:US11769632B2
公开(公告)日:2023-09-26
申请号:US17103789
申请日:2020-11-24
Applicant: TAIYO YUDEN CO., LTD.
Inventor: Kazumi Kaneda
CPC classification number: H01G4/30 , H01G2/065 , H01G4/008 , H01G4/1227 , H05K1/181 , H05K2201/10015
Abstract: A ceramic capacitor includes: a multilayer structure in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked, wherein a main component of the plurality of dielectric layers is BaTiO3, wherein the plurality of dielectric layers include Mn as a first sub-component, Mg as a second sub-component, a rare earth element which is at least one of Ho and Dy as a third sub-component, V as a fourth sub-component, Si as a fifth sub-component, Ca as a sixth sub-component, wherein an average grain diameter of ceramic grains of the plurality of dielectric layers is 280 nm or more and 380 nm or less.
-
公开(公告)号:US20230276576A1
公开(公告)日:2023-08-31
申请号:US18174619
申请日:2023-02-25
Applicant: Zhuhai ACCESS Semiconductor Co., Ltd.
Inventor: Xianming CHEN , Wenjian LIN , Gao HUANG , Lei FENG , Jindong FENG , Benxia HUANG , Zhijun ZHANG
CPC classification number: H05K1/186 , H01L21/56 , H01L23/3121 , H01L24/19 , H01L24/20 , H05K1/113 , H05K3/423 , H05K3/108 , H05K3/305 , H01L2224/19 , H01L2224/2101 , H05K2201/10015 , H05K2201/10022 , H05K3/0023
Abstract: A package substrate and a manufacturing method thereof are disclosed. The method includes: providing an inner substrate; processing an adhesive photosensitive material on a surface of a first side of the inner substrate to obtain an adhesive first insulating dielectric layer; mounting a component on the first insulating dielectric layer; and processing a photosensitive packaging material on the first side of the inner substrate to obtain a second insulating dielectric layer, where the second insulating dielectric layer covers the component.
-
公开(公告)号:US20230276574A1
公开(公告)日:2023-08-31
申请号:US18135551
申请日:2023-04-17
Applicant: KEMET Electronics Corporation
Inventor: Brandon Summey , Peter A. Blais , Robert Andrew Ramsbottom , Jeffrey Poltorak , Courtney Elliott
CPC classification number: H05K1/185 , H01G9/045 , H05K1/0393 , H05K3/30 , H05K3/4697 , H05K2201/10015
Abstract: An improved circuit board core material, and method of making the circuit board core material, is provided wherein the circuit board core material is particularly suitable for use in a circuit board. The circuit board core material comprises a laminate. The laminate comprises a prepreg layer with a first clad layer on the prepreg layer wherein the prepreg layer comprises a pocket. An electronic component is in the pocket wherein the electronic component comprises a first external termination and a second external termination. The first external termination is laminated to, and in electrical contact with, the first clad layer and said second external termination is in electrical contact with a conductor.
-
34.
公开(公告)号:US20230268120A1
公开(公告)日:2023-08-24
申请号:US18012530
申请日:2020-12-24
Applicant: TDK Corporation
Inventor: Daiki ISHII , Yoshihiko YANO , Yuki YAMASHITA , Kenichi YOSHIDA , Tetsuhiro TAKAHASHI
CPC classification number: H01G4/005 , H01G4/33 , H05K1/18 , H05K2201/10015
Abstract: A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; a second electrode layer contacting the dielectric film without contacting the metal foil; and an insulating member separating the first and second electrode layers. The insulating member has a tapered shape in cross section. With the above configuration, both the first and second electrode layers can be disposed on the upper surface of the metal foil. In addition, since the insulating member has a tapered shape in cross section, adhesion performance of the insulating member can be enhanced, thus making it possible to prevent short-circuit between the first and second electrode layers.
-
公开(公告)号:US11729914B2
公开(公告)日:2023-08-15
申请号:US17660701
申请日:2022-04-26
Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Inventor: Hiroshi Taneda , Noriyoshi Shimizu , Rie Mizutani , Masaya Takizawa , Yoshiki Akiyama
CPC classification number: H05K1/186 , H05K1/113 , H01G4/33 , H05K2201/10015
Abstract: A wiring board includes an insulating layer, a thin film capacitor laminated on the insulating layer, an interconnect layer electrically connected to the thin film capacitor, and an encapsulating resin layer laminated on the thin film capacitor. The interconnect layer includes a pad protruding from the thin film capacitor. The encapsulating resin layer is a mold resin having a non-photosensitive thermosetting resin as a main component thereof. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad.
-
公开(公告)号:US11716026B2
公开(公告)日:2023-08-01
申请号:US17307486
申请日:2021-05-04
Applicant: Infineon Technologies Austria AG
Inventor: Kennith K. Leong , Matthias J. Kasper , Luca Peluso , Gerald Deboy
IPC: H05K3/32 , H02M3/158 , H01F27/24 , H01F27/28 , H01F41/02 , H01F41/04 , H02M7/00 , H05K1/18 , H02M3/335 , H02M3/00
CPC classification number: H02M3/1584 , H01F27/24 , H01F27/28 , H01F41/0206 , H01F41/04 , H02M3/33573 , H02M7/003 , H05K1/181 , H05K3/32 , H02M3/003 , H05K2201/1003 , H05K2201/10015 , H05K2201/10053 , H05K2201/10189
Abstract: According to one configuration, an inductor device comprises: core material and one or more electrically conductive paths. The core material is magnetically permeable and surrounds (envelops) the one or more electrically conductive paths. Each of the electrically conductive paths extends through the core material of the inductor device from a first end of the inductor device to a second end of the inductor device. The magnetically permeable core material is operative to confine (guide, carry, convey, localize, etc.) respective magnetic flux generated from current flowing through a respective electrically conductive path. The core material stores the magnetic flux energy (i.e., first magnetic flux) generated from the current flowing through the first electrically conductive path. One configuration herein includes a power converter assembly comprising a stack of components including the inductor device as previously described as well as a first power interface, a second power interface, and one or more switches.
-
公开(公告)号:US11711909B2
公开(公告)日:2023-07-25
申请号:US17398725
申请日:2021-08-10
Applicant: KIOXIA CORPORATION
Inventor: Akitoshi Suzuki
CPC classification number: H05K7/20436 , H05K1/0203 , H05K5/006 , H05K5/0008 , H05K7/20136 , H05K7/20472 , H05K1/144 , H05K1/181 , H05K2201/042 , H05K2201/10015 , H05K2201/10159 , H05K2201/10189 , H05K2201/10409 , H05K2201/10424 , H05K2201/10522
Abstract: An electronic device includes a top plate having a first surface and a second surface that is positioned at an elevation that is lower than an elevation of the first surface, the second surface extending from a first end part of the top plate to a second end part of the top plate, a bottom plate provided under the top plate, and a circuit board placed between the top plate and the bottom plate and mounted with an electronic component. The top plate has opposing first and second edges and opposing third and fourth edges that are perpendicular to the first and the second edges, the first end part being formed at the first edge and the second end part being formed at the second edge.
-
公开(公告)号:US20230200032A1
公开(公告)日:2023-06-22
申请号:US18166551
申请日:2023-02-09
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Shota HAYASHI , Nobuaki OGAWA , Yuki ASANO , Takanori UEJIMA , Hiromichi KITAJIMA , Takahiro EGUCHI
IPC: H05K9/00 , H01L25/065 , H01L25/16 , H01L23/552 , H01L21/56 , H05K3/28 , H05K1/18
CPC classification number: H05K9/0022 , H01L21/56 , H01L23/552 , H01L25/165 , H01L25/0655 , H05K1/181 , H05K3/284 , H05K9/0039 , H05K2201/1003 , H05K2201/10015 , H05K2201/10022 , H05K2201/10371 , H05K2203/025 , H05K2203/1316
Abstract: A metal member includes a plate-shaped portion provided on an upper main surface of a substrate, and includes a front main surface and a back main surface arranged in a front-back direction when viewed in an up-down direction. A first electronic component is mounted on the upper main surface of the substrate and is disposed in front of the metal member. A second electronic component is mounted on the upper main surface of the substrate and is disposed behind the metal member. A sealing resin layer is provided on the upper main surface of the substrate and covers the metal member and the one or more electronic components. The plate-shaped portion is provided with one or more upper notches extending downward from the upper side. The metal member further includes one or more foot portions extending forward or backward from the lower side.
-
公开(公告)号:US20230199992A1
公开(公告)日:2023-06-22
申请号:US18109660
申请日:2023-02-14
Applicant: APPLIED MATERIALS, INC.
Inventor: Phillip A. Criminale , Zhiqiang Guo , Philip A. Kraus , Andrew Myles , Martin Perez-Guzman
CPC classification number: H05K5/069 , H05K1/181 , H05K5/03 , H05K7/1427 , H05K2201/10151 , H05K2201/10015
Abstract: A method includes establishing, by a diagnostic disc, a secure wireless connection with a computing system using a wireless communication circuit of the diagnostic disc before or after the diagnostic disc is placed into a processing chamber. The method further includes generating, at a vacuum of about 0.1 mTorr to about 50 mTorr and a temperature of about −20° C. to about 120° C., by at least one non-contact sensor of the diagnostic disc, sensor data of a component disposed within the processing chamber. The method further includes wirelessly transmitting the sensor data to the computing system via the secure wireless connection using the wireless communication circuit. The diagnostic disc includes a disc-shaped body, a printed circuit board (PCB), a power source coupled to the PCB, a casing that encapsulates the power source, and a cover positioned over the PCB and the power source.
-
公开(公告)号:US20230197696A1
公开(公告)日:2023-06-22
申请号:US17553519
申请日:2021-12-16
Applicant: NVIDIA Corp.
Inventor: Shuo Zhang , Eric Zhu , Minto Zheng , Michael Zhai , Town Zhang , Jie Ma
IPC: H01L25/10 , H01L25/16 , H01L23/538 , H05K1/18
CPC classification number: H01L25/105 , H01L23/5386 , H01L25/16 , H05K1/181 , H01L2225/107 , H01L2225/1094 , H05K2201/10015 , H05K2201/10522 , H05K2201/10545 , H05K2201/10704
Abstract: Layout techniques for chip packages on printed circuit boards are disclosed that address the multivariate problem of minimizing routing distances for high-speed I/O pins between chip packages while simultaneously providing for the rapid provision of transient power demands to the chip packages. The layout techniques may also enable improved thermal management for the chip packages.
-
-
-
-
-
-
-
-
-