公开(公告)号：US20170271470A1

公开(公告)日：2017-09-21

申请号：US15464763

申请日：2017-03-21

Applicant: Commissariat a l'energie atomique et aux energies alternatives ,  STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

Inventor： Cyrille LE ROYER ,  Frederic Boeuf ,  Laurent Grenouillet ,  Louis Hutin ,  Yves Morand

IPC: H01L29/49 ,  H01L21/768 ,  H01L29/06 ,  H01L29/66 ,  H01L29/51 ,  H01L23/535

CPC classification number: H01L29/4983 ,  H01L21/76895 ,  H01L23/535 ,  H01L29/0649 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66606 ,  H01L29/66628

Abstract: A method of fabrication, including the steps for supplying a substrate including a layer of semiconductor material covered by a sacrificial gate including a sacrificial gate insulator including a middle part, and edges covered by sacrificial spacers and having a thickness tox; removal of the sacrificial gate insulator and the sacrificial gate material; formation of a conformal deposition of thickness thk of dielectric material inside of the groove formed in order to form a gate insulator, with tox>thk≧tox/2; formation of a gate electrode within the groove; removal of the sacrificial spacers so as to open up edges of the gate insulator layer; formation of spacers on the edges of the gate insulator layer on either side of the gate electrode, these spacers having a dielectric constant at the most equal to 3.5.

公开(公告)号：US09762276B2

公开(公告)日：2017-09-12

申请号：US13490909

申请日：2012-06-07

Applicant: Sébastien Pruvost ,  Samuel Foulon ,  Christophe Loyez ,  Nathalie Rolland

Inventor： Sébastien Pruvost ,  Samuel Foulon ,  Christophe Loyez ,  Nathalie Rolland

IPC: H03C3/00 ,  H03K7/06 ,  H04L27/12 ,  H04B1/30 ,  H04B1/24

CPC classification number: H04B1/30 ,  H04B1/24

Abstract: A wireless data transmitter including: a data modulator adapted to modulate a data signal based on a frequency signal; and at least one antenna adapted to wirelessly transmit the modulated data signal and the frequency signal independently.

公开(公告)号：US20170256625A1

公开(公告)日：2017-09-07

申请号：US15601115

申请日：2017-05-22

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Pierre Caubet ,  Florian Domengie ,  Carlos Augusto Suarez Segovia ,  Aurelie Bajolet ,  Onintza Ros Bengoechea

IPC: H01L29/49 ,  H01L29/40

CPC classification number: H01L21/28088 ,  H01L29/4966

Abstract: Local variability of the grain size of work function metal, as well as its crystal orientation, induces a variable work function and local variability of transistor threshold voltage. If the metal nitride for the work function metal of the transistor gate is deposited using a radio frequency physical vapor deposition, equiaxed grains are produced. The substantially equiaxed structure for the metal nitride work function metal layer (such as with TiN) reduces local variability in threshold voltage.

公开(公告)号：US09728337B2

公开(公告)日：2017-08-08

申请号：US14416978

申请日：2013-07-12

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES ,  STMICROELECTRONICS SA

Inventor： Yann Lamy ,  Olivier Guiller ,  Sylvain Joblot

IPC: H01G4/30 ,  H05K1/18 ,  H01G4/33 ,  H01G4/38 ,  H01L49/02

CPC classification number: H01G4/306 ,  H01G4/33 ,  H01G4/38 ,  H01L28/87 ,  H01L28/91 ,  H05K1/181

Abstract: A method for producing a capacitor stack in one portion of a substrate, the method including: forming a cavity along a thickness of the portion of the substrate from an upper face of the substrate, depositing a plurality of layers contributing to the capacitor stack onto the wall of the cavity and onto the surface of the upper face, and removing matter from the layers until the surface of the upper face is reached. The forming of the cavity includes forming at least one trench and, associated with each trench, at least one box. The at least one trench includes a trench outlet that opens into the box. The box includes a box outlet that opens at the surface of the upper face, and the box outlet being shaped to be larger than the trench outlet.

公开(公告)号：US09712116B2

公开(公告)日：2017-07-18

申请号：US14955969

申请日：2015-12-01

Applicant: STMicroelectronics SA

Inventor： Lionel Vogt ,  Baudouin Martineau ,  Aurelien Larie

IPC: H03F3/45 ,  H03F1/02 ,  H03F3/193 ,  H03F3/21 ,  H03F3/195 ,  H03F3/24

CPC classification number: H03F1/0205 ,  H03F1/0261 ,  H03F3/193 ,  H03F3/195 ,  H03F3/211 ,  H03F3/245 ,  H03F3/45179 ,  H03F2200/432 ,  H03F2200/451 ,  H03F2200/516 ,  H03F2203/21106 ,  H03F2203/45394

Abstract: An amplifier includes at least two amplification stages coupled in parallel. Each amplification stage includes at differential pair of amplifying MOS transistors having gates connected to a first and second input nodes common to amplifying stages, and bulk regions connected to each other but insulated from bulk regions of the amplifying MOS transistors of the other amplification stages. A configuration circuit generates bias voltage for application to the bulk terminals in each amplification stage to set the threshold voltages of the amplifying MOS transistors, and thus configuring the operating range of each amplification stage so that different amplification stages have different operating ranges.

公开(公告)号：US09710722B1

公开(公告)日：2017-07-18

申请号：US14983150

申请日：2015-12-29

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics SA

Inventor： Mahesh Chandra ,  Antoine Drouot

IPC: G06K9/62 ,  G06K9/46

CPC classification number: G06T5/20 ,  G06K9/4604 ,  G06K9/4671 ,  G06K9/56 ,  G06T5/002 ,  G06T11/60 ,  G06T2207/10016

Abstract: Various embodiments provide an optimized image filter. The optimized image and video obtains an input image and selects a target pixel for modification. Difference values are then determined between the selected target pixel and each reference pixel of a search area. Subsequently, a weighting function is used to determine weight values for each of the reference pixels of the search area based on their respective difference value. The selected target pixel is then modified by the optimized image filter using the determined weight values. A new target pixel in an apply patch is then selected for modification. The new target pixel is modified using the previously determined weight values reassigned to a new set of reference pixels. The previously determined weight values are reassigned to the new set of reference pixels based on each of the new set of reference pixels' position relative to the new target pixel.

公开(公告)号：US20170179196A1

公开(公告)日：2017-06-22

申请号：US15387850

申请日：2016-12-22

Applicant: Commissariat A L'Energie Atomique et aux Energies Alternatives ,  STMICROELECTRONICS (CROLLES 2) SAS ,  STMICROELECTRONICS SA

Inventor： Laurent GRENOUILLET ,  Sotirios Athanasiou ,  Philippe Galy

IPC: H01L27/24 ,  H01L27/12 ,  G11C13/00 ,  H01L45/00

CPC classification number: H01L27/2454 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2213/53 ,  H01L27/101 ,  H01L27/1207 ,  H01L27/2436 ,  H01L28/00 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/147

Abstract: The invention relates to an integrated circuit (1), comprising: a field-effect transistor (2), comprising: first and second conduction electrodes (201, 202); a channel zone (203) arranged between the first and second conduction electrodes; a gate stack (220) arranged vertically in line with the channel zone, and comprising a gate electrode (222); an RRAM-type memory point (31) formed under the channel zone, or formed in the gate stack under the gate electrode.

公开(公告)号：US20170162672A1

公开(公告)日：2017-06-08

申请号：US15372930

申请日：2016-12-08

Applicant: Commissariat a l'energie atomique et aux energies alternatives ,  STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

Inventor： Louis HUTIN ,  Julien BORREL ,  Yves MORAND ,  Fabrice NEMOUCHI

IPC: H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66643 ,  H01L29/0895 ,  H01L29/66636 ,  H01L29/7839

Abstract: A process for manufacturing a Schottky barrier field-effect transistor is provided. The process includes: providing a structure including a control gate and a semiconductive layer positioned under the gate and having protrusions that protrude laterally with respect to the gate; anisotropically etching at least one of the protrusions by using the control gate as a mask, so as to form a recess in this protrusion, this recess defining a lateral face of the semiconductive layer; depositing a layer of insulator on the lateral face of the semiconductive layer; and depositing a metal in the recess on the layer of insulator so as to form a contact of metal/insulator/semiconductor type between the deposit of metal and the lateral face of the semiconductive layer.

公开(公告)号：US09648724B2

公开(公告)日：2017-05-09

申请号：US14956512

申请日：2015-12-02

Applicant: STMICROELECTRONICS (CROLLES 2) SAS ,  STMICROELECTRONICS SA

Inventor： Nicolas Hotellier ,  François Guyader ,  Vincent Fiori ,  Richard Fournel ,  Frédéric Gianesello

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H01L21/762 ,  H01L21/764

CPC classification number: H05K1/0216 ,  H01L21/762 ,  H01L21/7624 ,  H01L21/764 ,  H01L24/03 ,  H01L24/05 ,  H01L29/0657 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2924/00014 ,  H05K1/111 ,  H05K1/181 ,  H05K3/0011 ,  H01L2224/05599

Abstract: An electronic device has a rear plate that includes a substrate rear layer, a substrate front layer and a dielectric intermediate layer between the substrate rear and front layers. An electronic structure is on the substrate front layer and includes electronic components and electrical connections. The substrate rear layer includes a solid local region and a hollowed-out local region. The hollowed-out local region extends over all of the substrate rear layer. The substrate rear layer does not cover at least one local zone of the dielectric intermediate layer corresponding to the hollowed-out local region.

公开(公告)号：US09647724B2

公开(公告)日：2017-05-09

申请号：US13714151

申请日：2012-12-13

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

Inventor： Pascal Urard ,  Christophe Regnier ,  Daniel Gloria ,  Olivier Hinsinger ,  Philippe Cavenel ,  Lionel Balme

IPC: H04B7/00 ,  H04B5/00 ,  G06F21/35 ,  H04W12/06 ,  H04W12/08 ,  H04W4/00

CPC classification number: H04B5/0031 ,  G06F1/1694 ,  G06F1/1698 ,  G06F3/017 ,  G06F21/35 ,  H04B7/24 ,  H04L63/0869 ,  H04L63/18 ,  H04W4/008 ,  H04W4/80 ,  H04W12/06 ,  H04W12/08

Abstract: A wireless unit includes a first motion sensitive device; communications circuitry for wirelessly communicating with a further wireless unit; and a processing device configured to compare at least one first motion vector received from the first motion sensitive device with at least one second motion vector received from a second motion sensitive device of the further wireless unit.